Distal interlocking screw placement in the femur: free-hand versus electromagnetic assisted technique (sureshot).

OBJECTIVES To compare the free-hand (FH) technique of placing interlocking screws to a commercially available electromagnetic (EM) targeting system in terms of operating time, radiation dose, and accuracy of screw placement. METHODS Between September 2011 and July 2012, we prospectively randomized 100 consecutive femur shaft fractures in 99 patients requiring intramedullary nails to either FH using fluoroscopy (n = 43) or EM targeting (n = 38; Sureshot). SETTING Single Level 1 University Hospital Trauma Center. MAIN OUTCOME MEASUREMENTS The 2 groups were assessed for distal locking with respect to time, radiation, and accuracy. RESULTS Eight-one fractures had data accurately recorded (38 EM/43 FH). The average total operative time was 50 minutes (range, 25-88 minutes; SD, 13.9 minutes) for the FH group and 57 minutes (range, 40-103 minutes; SD, 16.12 minutes) for the EM group. The average time for distal locking was 10 minutes (range, 4-16 minutes; SD, 3.56 minutes) with FH and 11 minutes (range, 6-28 minutes; SD, 10.24 minutes) with EM. Average radiation dose for distal locking was significantly less (P < 0.0001) for EM at 230.54 μGy (range, 51-660 μGy; SD, 0.17 μGy) compared with 690.27 μGy (range, 200-2310 μGy; SD, 0.52 μGy) for FH. There were 2 misplaced drill bits in FH and 3 in EM. This was not statistically significant (P = 0.888). CONCLUSIONS The electromagnetic targeting device (Sureshot) significantly reduced radiation exposure during placement of distal interlocking screws, without sacrificing operative time, and was equivalent in accuracy when compared with the FH technique. LEVEL OF EVIDENCE Therapeutic level II.

Profile in occupational counselling and placement and employment services: social policies axis

This paper presents the gestation of a new model of Occupational Counselling, centred in the joint action of State, Third Sector and Private Organizations. Different programmes are identified which involve the treatment of issues related to Labour, Employment and Education within the framework of objectives of social development, community participation and respect for diversity. The data of the investigation make it possible to establish connections between the tasks, professional profiles and professional training of the counsellors who participate in the different programmes.

Profile in occupational counselling and placement and employment services: social policies axis

This paper presents the gestation of a new model of Occupational Counselling, centred in the joint action of State, Third Sector and Private Organizations. Different programmes are identified which involve the treatment of issues related to Labour, Employment and Education within the framework of objectives of social development, community participation and respect for diversity. The data of the investigation make it possible to establish connections between the tasks, professional profiles and professional training of the counsellors who participate in the different programmes.

Profile in occupational counselling and placement and employment services: social policies axis

This paper presents the gestation of a new model of Occupational Counselling, centred in the joint action of State, Third Sector and Private Organizations. Different programmes are identified which involve the treatment of issues related to Labour, Employment and Education within the framework of objectives of social development, community participation and respect for diversity. The data of the investigation make it possible to establish connections between the tasks, professional profiles and professional training of the counsellors who participate in the different programmes.

On-Chip Thermal Monitoring: Design, Placement and Interconnection of Temperature Sensors

La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

Core correlation data and revised composite depth scale of Exp302 (ACEX) cores

Expedition 302 of the Integrated Ocean Drilling Program (IODP), also known as the Arctic Coring Expedition (ACEX), successfully penetrated a sequence of Cenozoic sediments draping the crest of the Lomonosov Ridge in the central Arctic Ocean. The cumulative sedimentary record spans the last 57 m.y. and was recovered from three sites located within 15 km of each other. Merging the recovered cores onto a common depth scale that accurately reflects their stratigraphic placement below the seafloor is a fundamental step toward interpreting this unique sedimentary record. However, the lack of overlapping recovery in adjacent holes and intervals of high core disturbance complicated traditional methods of stratigraphic correlation. Here we present a revised composite depth scale for the ACEX sediments, generated in part by performing a regional stratigraphic correlation with sediments recovered from previous expeditions to the Lomonosov Ridge. The revised depth scale also reassesses the offsets for cores in the upper 55 meters below seafloor, where no overlapping recovery was acquired, and proposes modifications to these depths.

The role of the undergraduate work placement in developing employment competences:results from a 5 year study of employers

There is increasing research interest into the nature of competences required to secure a graduate job. This paper examines the role of the undergraduate work placement in developing such employment competences. In order to do this we draw upon a framework of generic competences developed in a previous project by one of the authors, together with data on how these competences are valued by graduates and employers. We also draw upon a survey of employers and students who have participated in an Aston Business School work placement. The work placement year is an integral feature of Aston’s undergraduate business programme and gives up to 600 students a year the experience of working with well known companies. For the past five years we have conducted a survey of these companies to assess their experience of employing our undergraduates on work placements and to examine the skills and competencies developed by students in the learning process. In this paper we compare data from both pieces of research to examine how competences developed during the undergraduate work placement contribute to the enhancement of graduate employment.

Placement year academic benefit revisited:effects of demographics, prior achievement and degree programme

Investigations of whether students taking undergraduate work placements show greater academic improvement than those who do not have shown inconsistent results. In most studies, sample sizes have been relatively small and few studies have taken into account pre-existing student differences.Here data from over 6000 students at one university over six cohorts and a range of programmes are analysed. Consistent academic benefit from placement experience, regardless of ethnicity, gender, socioeconomic background and subject is shown. However the impact of demographic factors on both achievement and on the probability of taking a placement suggests that future research should take these factors into account. The role of placements in promoting employability is contextualised as a secondary benefit to the primary goal of educating the mind in the Newman (1852) tradition. Possible causes of, and further research into, the improved academic performance identified are discussed.

No regrets? Measuring the career benefits of a psychology placement year

We report an analysis of whether a psychology placement year provides a significant benefit to graduates’ careers. Destination of Leavers from Higher Education (DLHE) survey data six months post-graduation suggested that placement programme graduates across the university are more likely to be (i) in work and (ii) in graduate level jobs. For psychology, the association between graduates’ placement status and employment status at six months post graduation was not significant overall. However, when analyses were split by degree classification obtained, it was shown that amongst those graduates with 2.1 classification degrees reporting themselves as working, more placement programme vs. non-placement programme graduates had obtained graduate level jobs (63% vs. 33%). In 2.2 graduates there was no significant association. This pattern persisted in the data from a survey of psychology alumni (from 18 months to six and a half years post graduation). Psychology placement programme alumni were more satisfied with their careers even when ethnicity, gender, degree classification and entry year were taken into account. They also earn more, although not when background factors are taken into account. This study was therefore able to show some measurable and persistent effects of a psychology placement year, although whether the benefits can be claimed to outweigh the costs is inconclusive. Limitations and implications are discussed.

The effect of the advanced placement examination for credit policy by the Florida State universities on the acceleration of a student's postsecondary education

The purpose of this research study was to determine if the Advanced Placement program as it is recognized by the universities in the Florida State University System (SUS) truly serves as an acceleration mechanism for those students who enter an SUS institution with passing AP scores. Despite mandates which attempt to control uniformity of policy, each public university in Florida determines which courses will be exempted and the number of credits they will grant for passing Advanced Placement courses.^ This is a descriptive study in which the AP policies of each of the SUS institutions were compared. Additionally, the college attendance and graduation data on members of a cohort of 593 Broward County high school graduates of the class of June, 1992 were compared. Approximately 28% of the cohort members entered university with passing Advanced Placement scores.^ The rate of early and on time graduation was significantly dependent on the Advanced Placement standing of the students in the cohort. Given the financial and human cost involved, it is recommended that all state universities bring their Advanced Placement policies into line with each other and implement a uniform Advanced Placement policy. It is also recommended that a follow-up study be conducted with a new cohort bound under the current 120 credit limitation for graduation. ^

Differences in learning style preference among students of diverse ethnicities, gender, academic placement level, and academic achievement

This investigation studied the differences in learning styles among ethnically diverse secondary science students from a multicultural urban high school. It examined whether there were learning style differences among samples based on ethnicity, gender, academic grouping, and academic achievement. The learning style elements were based on scores of the Dunn, Dunn, and Price Learning Style Inventory (LSI) (1997). The sample (n = 476) consisted of students enrolled in Life Science courses. The analyses of data were made by one way analysis of variance (ANOVA) and multivariate analysis of variance (MANOVA). ^ Significant differences were found among students for three of the four groups tested. The largest numbers of differences in learning style element preference were in academic grouping, with eight significant differences showing small or medium effect sizes. There were four significant differences between genders and one significant difference among ethnic groups. Effect size was small. The data analyses showed that individual differences have a much bigger effect than group differences on learning style, and that proportions in learning style element categories reveal more information than means of groups. ^ This study implied the need to increase awareness of differences in learning styles among students and help educators to understand them. Other predictors of learning styles might account for a large amount of the unexplained variation. Overall, this study reinforces the body of existing literature. ^

Class placement and academic and behavioral variables as predictors of graduation for students with disabilities

Dropout rates impacting students with high-incidence disabilities in American schools remain staggering (Bost, 2006; Hehir, 2005). Of this group, students with Emotional Behavioral Disorders (EBD) are at greatest risk. Despite the mandated national propagation of inclusion, students with EBD remain the least included and the least successful when included (Bost). Accordingly, this study investigated the potential significance of inclusive settings and other school-related variables within the context of promoting the graduation potential of students with Specific Learning Disabilities (SLD) or EBD. This mixed-methods study investigated specified school-related variables as likely dropout predictors, as well as the existence of first-order interactions among some of the variables. In addition, it portrayed the perspectives of students with SLD or EBD on the school-related variables that promote graduation. Accordingly, the sample was limited to students with SLD or EBD who had graduated or were close to graduation. For the quantitative component the numerical data were analyzed using linear and logistic regressions. For the qualitative component guided student interviews were conducted. Both strands were subsequently analyzed using Ridenour and Newman’s (2008) model where the quantitative hypotheses are tested and are later built-upon by the related qualitative meta-themes. Results indicated that a successful academic history, or obtaining passing grades was the only significant predictor of graduation potential when statistically controlling all the other variables. While at a marginal significance, results also yielded that students with SLD or EBD in inclusive settings experienced better academic results and behavioral outcomes than those in self-contained settings. Specifically, students with SLD or EBD in inclusive settings were found to be more likely to obtain passing grades and less likely to be suspended from school. Generally, the meta-themes yielded during the student interviews corroborated these findings as well as provided extensive insights on how students with disabilities view school within the context of promoting graduation. Based on the results yielded, provided the necessary academic accommodations and adaptations are in place, along with an effective behavioral program, inclusive settings can be utilized as drop-out prevention tools in special education.

A study of the relationship between educational placement and the achievement of urban low socioeconomic Hispanic middle school students with and without specific learning disabilities

Public schools traditionally have been held accountable for educating the majority of the nation’s school children, and through the years, these schools have been evaluated in a variety of ways. Currently, evaluation measures for accountability purposes consist solely of standardized test scores. In the past, only test scores of general education students were analyzed. Laws governing the education of students with disabilities, however, have extended accountability measures not only to include those students, but to report their scores in a disaggregated form (No Child Left Behind Act, 2001). The recent emphasis on accountability and compliance has resulted in the need for schools to carefully examine how programs, services, and policies impact student achievement (Bowers & Figgers, 2003). ^ Standard-based school reform and accountability systems have raised expectations about student learning outcomes for all students, including those with disabilities and minority students. Yet, overall, racial/ethnic minority students are performing well below their White non-Hispanic peers in most academic areas. Additionally, with respect to special education, there exists an enduring problem of disproportionate representation of racial/ethnic minority students (National Research Council, 2000). ^ This study examined classroom placement (inclusive versus non-inclusive) relative to academic performance of urban, low socioeconomic Hispanic students with and without disabilities in secondary content area classrooms. A mixed method research design was used to investigate this important issue using data from a local school district and results from field observations. The study compared performance levels of four middle school Hispanic student subgroups (students with disabilities in inclusive settings, students without disabilities in inclusive settings, students with disabilities in resource settings, and student without disabilities in general education settings) each in their respective placements for two consecutive years, exploring existing practices within authentic settings. ^ Significant differences were found in the relationship of educational placement and achievement between grade level and disability in the areas of math and reading. Additionally, clear and important differences were observed in student-teacher interactions. Recommendations for further researchers and stakeholders include soliciting responses from teams at the schools composed of general education and special education teachers, administrative personnel, and students as well as broadening the study across grade levels and exceptionalities. ^

The relationship between educational placement, instructional practices, and achievement gains of Black students with specific learning disabilities in secondary urban school settings

Black students, in general, are underserved academically (Darling-Hammond, 2000; Townsend, 2002) and overrepresented in special education (Donovan & Cross, 2002). Black students with disabilities are further overrepresented in more restrictive educational environments (Skiba, Poloni-Staudinger, Gallini, Simmons & Feggins-Azziz, 2006). Although the National Longitudinal Transition Study 2 (NLTS2) revealed that the academic performance of students with learning disabilities is positively related to the percentage of courses taken in the general education setting (Newman, 2006), the research specifically on placement of Black students with disabilities, particularly at the secondary level, as it relates to academic achievement is lacking. While previous studies have sought to determine which placement is better for students with disabilities, no study was found that specifically examined the impact of placement specific to Black students with specific learning disabilities (SLD) in urban settings (Fore, III, Hagan-Burke, Burke, Boon & Smith, 2008; Rea, McLaughlin & Walther-Thomas, 2002). This study examined educational placement, instructional best practices, and achievement gains of Black students with SLD in urban secondary settings using an ex post facto research design. Achievement, placement, and demographic data were collected and analyzed on approximately 314 Black eighth grade students with SLD. The Teacher Instructional Practices Survey was developed and used to collect and analyze data from the teachers of 78 of these students as it relates to instructional best practices. Results indicate no significant difference in reading but a significant difference in math gains of students served in inclusive settings as compared to resource settings with a small effect size. Also, no significant relationship was found between achievement gains and the reported use of instructional best practices. However, there was a relationship between educational placement and the use of instructional best practices. The results implied that there is a need for training with both general and special education teachers on instructional best practices for SWD and that there should be certain IEP team considerations when making placement decisions for this population of students with disabilities. It is recommended that future research in this area include classroom observations and factors other than test scores to measure growth in achievement.