An efficient low power FFT implementation for multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power solutions biased toward the competitive consumer electronics market.

Soft-bit and numerical precision requirements on multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the architectural design, implementation and associated simulated peformance results of a possible receiver solution fir a multiband Ultra-Wideband (UWB) receiver. The paper concentrates on the tradeoff between the soft-bit width and numerical precision requirements for the receiver versus performance. The required numerical precision results obtained in this paper can be used by baseband designers of cost effective UWB systems using Systein-on-Chip (SoC), FPGA and ASIC technology solutions biased toward the competitive consumer electronics market(1).

A low clock frequency FFT core implementation for multiband full-rate ultra-wideband (UWB) receivers

This paper discusses the design, implementation and synthesis of an FFT module that has been specifically optimized for use in the OFDM based Multiband UWB system, although the work is generally applicable to many other OFDM based receiver systems. Previous work has detailed the requirements for the receiver FFT module within the Multiband UWB ODFM based system and this paper draws on those requirements coupled with modern digital architecture principles and low power design criteria to converge on our optimized solution particularly aimed at a low-clock rate implementation. The FFT design obtained in this paper is also applicable for implementation of the transmitter IFFT module therefore only needing one FFT module in the device for half-duplex operation. The results from this paper enable the baseband designers of the 200Mbit/sec variant of Multiband UWB systems (and indeed other OFDM based receivers) using System-on-Chip (SoC), FPGA and ASIC technology to create cost effective and low power consumer electronics product solutions biased toward the very competitive market.

Numerical precision requirements on the Multiband Ultra-Wideband system for practical consumer electronic devices

This paper discusses the requirements on the numerical precision for a practical Multiband Ultra-Wideband (UWB) consumer electronic solution. To this end we first present the possibilities that UWB has to offer to the consumer electronics market and the possible range of devices. We then show the performance of a model of the UWB baseband system implemented using floating point precision. Then, by simulation we find the minimal numerical precision required to maintain floating-point performance for each of the specific data types and signals present in the UWB baseband. Finally, we present a full description of the numerical requirements for both the transmit and receive components of the UWB baseband. The numerical precision results obtained in this paper can then be used by baseband designers to implement cost effective UWB systems using System-on-Chip (SoC), FPGA and ASIC technology solutions biased toward the competitive consumer electronics market(1).

Geração de código no projeto de sistemas reativos a partir da linguagem RS

A linguagem síncrona RS é destinada ao desenvolvimento de sistemas reativos. O presente trabalho tem como objetivo criar meios que facilitem o uso da linguagem RS no projeto e implementação desses sistemas, permitindo que, à partir da especificação de um sistema reativo, seja realizada a sua implementação de forma automática. Deste modo, a linguagem RS é utilizada para a descrição do comportamento de um sistema em um alto nível de abstração, antes de serfeitas a decomposição do sistema em componentes de software ou hardware. A implmentação do protótipo do sistema computacional dedicado é obtida através de uma síntese automática desse modelo de alto nível. Foram implementados geradores de código que utilizam o código objeto fornecido pelo compilador da linguagem RS. Os geradores fazem a tradução para a linguagem C, para a linguagem JAVA, ou para a linguagem de descrição de hardware VHDL. A partir da síntese desses códigos poderá ser obtida a implementação do sistema em um micrcoomputador comercial, em um microcomputador Java de dedicado (ASIP Java), ou em um hardware de aplicação específica (ASIC). Foram realizados estudos de caso representativos dos sistemas reativos embaraçados e de tempo rel. Estes estudos de caso serviram para validar os geradores de código bem como para analisar o uso da linguagem RS no projeto e implementação desses sistemas.

Algoritmos e Arquiteturas VLSI para Detectores MIMO com Decisão Suave

The use of Multiple Input Multiple Output (MIMO) systems has permitted the recent evolution of wireless communication standards. The Spatial Multiplexing MIMO technique, in particular, provides a linear gain at the transmission capacity with the minimum between the numbers of transmit and receive antennas. To obtain a near capacity performance in SM-MIMO systems a soft decision Maximum A Posteriori Probability MIMO detector is necessary. However, such detector is too complex for practical solutions. Hence, the goal of a MIMO detector algorithm aimed for implementation is to get a good approximation of the ideal detector while keeping an acceptable complexity. Moreover, the algorithm needs to be mapped to a VLSI architecture with small area and high data rate. Since Spatial Multiplexing is a recent technique, it is argued that there is still much room for development of related algorithms and architectures. Therefore, this thesis focused on the study of sub optimum algorithms and VLSI architectures for broadband MIMO detector with soft decision. As a result, novel algorithms have been developed starting from proposals of optimizations for already established algorithms. Based on these results, new MIMO detector architectures with configurable modulation and competitive area, performance and data rate parameters are here proposed. The developed algorithms have been extensively simulated and the architectures were synthesized so that the results can serve as a reference for other works in the area

Limites e evolução geodinâmica do Sistema Jaguaribeano, Província Borborema, Nordeste do Brasil

The studied area is geologically located in the Northern Domain of the Borborema Province (Northeast Brazil), limited to the south by the Patos shear zone. Terranes of the Jaguaribeano system are dominant, flanked by the Piranhas (E and S sides) and Central Ceará (NE side) terranes. Its basement comprises gneiss -migmatite terrains of Paleoproterozoic to Archean age (2.6 to 1.9 Ga old), overprinted by neoproterozoic to cambrian tectonotherma l events. Narrow supracrustal belts ( schist belts) display a 1.6 to 1.8 Ga age, as shown by whole - rock Rb-Sr and zircon U-Pb and Pb/Pb dates in acid metavolcanics which dominate in the lower section of these sequences, and in coeval metaplutonics (granitic augen gneisses). From the stratigraphic point of view, three Staterian belts are recognized: 1. Orós Belt - made up by the Orós Group, subdivided in the Santarém (predominantly pure to impure quartzites, micaschists and metacarbonates) and Campo Alegre (metandesites, metabasalts, metarhyolites and metarhyodacites, interlayered with metatuffs and metasediments) formations, and by the Serra do Deserto Magmatic Suite (granitic augen gneisses). 2. Jaguaribe Belt - its lithostratigrahic-lithodemic framework is similar to the one of the Orós Belt, however with a greater expression of the volcano -plutonic components (Campo Alegre Formation and Serra do Deserto Magmatic Suite). The Peixe Gordo Sequence, separately described, is also related to this belt and contain s metasedimentary, metavolcanic (with subordinated volcanoclastics) and metaplutonic units. The first one correlated to the Orós Group and the latter the Serra do Deserto Magmatic Suite. 3. Western Potiguar Belt - represented by the Serra de São José Gro up, subdivided in the Catolezinho (biotite -amphibole gneisses with intercalations of metacarbonates, calcsilicate rocks, amphibolites and quartzite beds to the top) and Minhuins (quartzites, micaschists, metaconglomerates, calcsilicate rocks, acid to the b asic metavolcanics and metatuffs) formations. Its late Paleoproterozoic (Staterian) age was established by a Pb/Pb date on zircons from a granitic orthogneiss of the Catolezinho Formation. The petrographic characteristics and sedimentary structures of the Santarém Formation of the Orós Group point to deltaic to shallow marine depositional systems, overlain by deep water deposits (turbidites). The geodynamic setting of this region encompassed a large depositional basin, probably extending to the east of the Portalegre shear zone and west of the Senador Pompeu shear zone, with possible equivalents in the Jucurutu Formation of the Seridó Belt and in the Ceará Group of central Ceará. The Arneiróz Belt, west Ceará, displays some stratigraphic features and granito ids geochemically akin to the ones of the Orós Belt. The evolutionary setting started with an extensional phase which was more active in the eastern part of this domain (Western Potiguar and part of the Jaguaribe belts), where the rudite and psamite sedime ntation relates to a fluviatile rift environment which evolved to a prograding deltaic system to the west (Orós Group). The basaltic andesitic and rhyolitic volcanics were associated to this extensional phase. During this magmatic event, acid magmas also crystallized at plutonic depths. The Orós Group illustrates the environmental conditions in the western part of this domain. Later on, after a large time gap (1.6 to 1.1 Ga), the region was subjected to an extensional deformational episode marked by 900 Ma old (Sm-Nd data) basic rocks, possibly in connection with the deposition of the Cachoeirinha Group south of the Patos shear zone. In the 800 to 500 Ma age interval, the region was affected by important deformational and metamorphic events coupled with in trusion of granitic rocks of variable size (dykes to batholiths), related to the Brasiliano/Pan -African geotectonic cycle. These events produced structural blocks which differentiate, one from the other, according to the importance of anatectic mobilizatio n, proportion of high-grade supracrustals and the amount of neoproterozoic -cambrian granitoid intrusions. On this basis, a large portion of the Jaguaretama Block/Terrane is relatively well preserved from this late overprint. The border belts of the Jagua retama Block (Western Potiguar and Arneiroz) display kyanite-bearing (medium pressure) mineral associations, while in the inner part of the block there is a north-south metamorphic zoning marked by staurolite or sillimanite peak metamorphic conditions. Regarding the deformations of the Staterian supracrustal rocks, second and third phases were the most important, diagnosed as having developed in a progressive tectonic process. In the general, more vigorous conditions of PT are related to the interval tardi - phase 2 early-phase 3, whose radiometric ages and regional structuring indicators places it in the Brasiliano/Pan-African Cycle. In the Staterian geodynamic setting of Brazilian Platform , these sequences are correlated to the lower Espinhaço Supergroup (p.ex., Rio dos Remédios and Paraguaçu groups, a paleproterozoic rift system in the São Francisco Craton), the Araí and Serra da Mesa groups (north of Goiás, in the so -called Goiás Central Massif), and the Uatumã Group (in the Amazonian Craton). Granitic ( augen gneisses) plutonics are also known from these areas, as for example the A-type granites intrusive in the Araí and Serra da Mesa groups, dated at 1.77 Ga. Gravimetric and geological data place the limits of the Jaguaribeano System (terranes) along the Senador Pompeu Shear Zone (western border) and the Portalegre- Farias Brito shear zone (eastern and southern). However, the same data area not conclusive as regards the interpretation of those structures as suture of the terrane docking process. The main features of those shear zones and of involved lothological associations, appear to favour an intracontinental transpressional -transcurrent regime, during Neoproterozoic-Cambrian times, marking discontinuities along which different crustal blocks were laterally dispersed. Inside of this orogenic system and according to the magnetic data (total field map), the most important terrane boundary appears to be the Jaguaribe shear zone. The geochronological data, on some tectonostratigraphic associations (partly represented by the Ceará and Jucurutu groups), still at a preliminary level, besides the lack of granitic zonation and other petrotectonic criteria, do not allow to propose tectonic terrane assembly diagrams for the studied area

Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements

This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.

Digital system design process automation using place/transition petri nets

The constant increase in digital systems complexity definitely demands the automation of the corresponding synthesis process. This paper presents a computational environment designed to produce both software and hardware implementations of a system. The tool for code generation has been named ACG8051. As for the hardware synthesis there has been produced a larger environment consisting of four programs, namely: PIPE2TAB, AGPS, TABELA, and TAB2VHDL. ACG8051 and PIPE2TAB use place/transition net descriptions from PIPE as inputs. ACG8051 is aimed at generating assembly code for the 8051 micro-controller. PIPE2TAB produces a tabular version of a Mealy type finite state machine of the system, its output is fed into AGPS that is used for state allocation. The resulting digital system is then input to TABELA, which minimizes control functions and outputs of the digital system. Finally, the output generated by TABELA is fed to TAB2VHDL that produces a VHDL description of the system at the register transfer level. Thus, we present here a set of tools designed to take a high-level description of a digital system, represented by a place/transition net, and produces as output both an assembly code that can be immediately run on an 8051 micro-controller, and a VHDL description that can be used to directly implement the hardware parts either on an FPGA or as an ASIC.

Perspectivas de las tecnologías de telecomunicaciones y sus implicancias en los mercados y marcos regulatorios en los países de América Latina y el Caribe

Incluye Bibliografía

Applications of High Speed Configurable Logic Devices in Modern Particle Physics Experiments

Several activities were conducted during my PhD activity. For the NEMO experiment a collaboration between the INFN/University groups of Catania and Bologna led to the development and production of a mixed signal acquisition board for the Nemo Km3 telescope. The research concerned the feasibility study for a different acquisition technique quite far from that adopted in the NEMO Phase 1 telescope. The DAQ board that we realized exploits the LIRA06 front-end chip for the analog acquisition of anodic an dynodic sources of a PMT (Photo-Multiplier Tube). The low-power analog acquisition allows to sample contemporaneously multiple channels of the PMT at different gain factors in order to increase the signal response linearity over a wider dynamic range. Also the auto triggering and self-event-classification features help to improve the acquisition performance and the knowledge on the neutrino event. A fully functional interface towards the first level data concentrator, the Floor Control Module, has been integrated as well on the board, and a specific firmware has been realized to comply with the present communication protocols. This stage of the project foresees the use of an FPGA, a high speed configurable device, to provide the board with a flexible digital logic control core. After the validation of the whole front-end architecture this feature would be probably integrated in a common mixed-signal ASIC (Application Specific Integrated Circuit). The volatile nature of the configuration memory of the FPGA implied the integration of a flash ISP (In System Programming) memory and a smart architecture for a safe remote reconfiguration of it. All the integrated features of the board have been tested. At the Catania laboratory the behavior of the LIRA chip has been investigated in the digital environment of the DAQ board and we succeeded in driving the acquisition with the FPGA. The PMT pulses generated with an arbitrary waveform generator were correctly triggered and acquired by the analog chip, and successively they were digitized by the on board ADC under the supervision of the FPGA. For the communication towards the data concentrator a test bench has been realized in Bologna where, thanks to a lending of the Roma University and INFN, a full readout chain equivalent to that present in the NEMO phase-1 was installed. These tests showed a good behavior of the digital electronic that was able to receive and to execute command imparted by the PC console and to answer back with a reply. The remotely configurable logic behaved well too and demonstrated, at least in principle, the validity of this technique. A new prototype board is now under development at the Catania laboratory as an evolution of the one described above. This board is going to be deployed within the NEMO Phase-2 tower in one of its floors dedicated to new front-end proposals. This board will integrate a new analog acquisition chip called SAS (Smart Auto-triggering Sampler) introducing thus a new analog front-end but inheriting most of the digital logic present in the current DAQ board discussed in this thesis. For what concern the activity on high-resolution vertex detectors, I worked within the SLIM5 collaboration for the characterization of a MAPS (Monolithic Active Pixel Sensor) device called APSEL-4D. The mentioned chip is a matrix of 4096 active pixel sensors with deep N-well implantations meant for charge collection and to shield the analog electronics from digital noise. The chip integrates the full-custom sensors matrix and the sparsifification/readout logic realized with standard-cells in STM CMOS technology 130 nm. For the chip characterization a test-beam has been set up on the 12 GeV PS (Proton Synchrotron) line facility at CERN of Geneva (CH). The collaboration prepared a silicon strip telescope and a DAQ system (hardware and software) for data acquisition and control of the telescope that allowed to store about 90 million events in 7 equivalent days of live-time of the beam. My activities concerned basically the realization of a firmware interface towards and from the MAPS chip in order to integrate it on the general DAQ system. Thereafter I worked on the DAQ software to implement on it a proper Slow Control interface of the APSEL4D. Several APSEL4D chips with different thinning have been tested during the test beam. Those with 100 and 300 um presented an overall efficiency of about 90% imparting a threshold of 450 electrons. The test-beam allowed to estimate also the resolution of the pixel sensor providing good results consistent with the pitch/sqrt(12) formula. The MAPS intrinsic resolution has been extracted from the width of the residual plot taking into account the multiple scattering effect.

Body ares networks for human motor assessment

Healthcare, Human Computer Interfaces (HCI), Security and Biometry are the most promising application scenario directly involved in the Body Area Networks (BANs) evolution. Both wearable devices and sensors directly integrated in garments envision a word in which each of us is supervised by an invisible assistant monitoring our health and daily-life activities. New opportunities are enabled because improvements in sensors miniaturization and transmission efficiency of the wireless protocols, that achieved the integration of high computational power aboard independent, energy-autonomous, small form factor devices. Application’s purposes are various: (I) data collection to achieve off-line knowledge discovery; (II) user notification of his/her activities or in case a danger occurs; (III) biofeedback rehabilitation; (IV) remote alarm activation in case the subject need assistance; (V) introduction of a more natural interaction with the surrounding computerized environment; (VI) users identification by physiological or behavioral characteristics. Telemedicine and mHealth [1] are two of the leading concepts directly related to healthcare. The capability to borne unobtrusiveness objects supports users’ autonomy. A new sense of freedom is shown to the user, not only supported by a psychological help but a real safety improvement. Furthermore, medical community aims the introduction of new devices to innovate patient treatments. In particular, the extension of the ambulatory analysis in the real life scenario by proving continuous acquisition. The wide diffusion of emerging wellness portable equipment extended the usability of wearable devices also for fitness and training by monitoring user performance on the working task. The learning of the right execution techniques related to work, sport, music can be supported by an electronic trainer furnishing the adequate aid. HCIs made real the concept of Ubiquitous, Pervasive Computing and Calm Technology introduced in the 1988 by Marc Weiser and John Seeley Brown. They promotes the creation of pervasive environments, enhancing the human experience. Context aware, adaptive and proactive environments serve and help people by becoming sensitive and reactive to their presence, since electronics is ubiquitous and deployed everywhere. In this thesis we pay attention to the integration of all the aspects involved in a BAN development. Starting from the choice of sensors we design the node, configure the radio network, implement real-time data analysis and provide a feedback to the user. We present algorithms to be implemented in wearable assistant for posture and gait analysis and to provide assistance on different walking conditions, preventing falls. Our aim, expressed by the idea to contribute at the development of a non proprietary solutions, driven us to integrate commercial and standard solutions in our devices. We use sensors available on the market and avoided to design specialized sensors in ASIC technologies. We employ standard radio protocol and open source projects when it was achieved. The specific contributions of the PhD research activities are presented and discussed in the following. • We have designed and build several wireless sensor node providing both sensing and actuator capability making the focus on the flexibility, small form factor and low power consumption. The key idea was to develop a simple and general purpose architecture for rapid analysis, prototyping and deployment of BAN solutions. Two different sensing units are integrated: kinematic (3D accelerometer and 3D gyroscopes) and kinetic (foot-floor contact pressure forces). Two kind of feedbacks were implemented: audio and vibrotactile. • Since the system built is a suitable platform for testing and measuring the features and the constraints of a sensor network (radio communication, network protocols, power consumption and autonomy), we made a comparison between Bluetooth and ZigBee performance in terms of throughput and energy efficiency. Test in the field evaluate the usability in the fall detection scenario. • To prove the flexibility of the architecture designed, we have implemented a wearable system for human posture rehabilitation. The application was developed in conjunction with biomedical engineers who provided the audio-algorithms to furnish a biofeedback to the user about his/her stability. • We explored off-line gait analysis of collected data, developing an algorithm to detect foot inclination in the sagittal plane, during walk. • In collaboration with the Wearable Lab – ETH, Zurich, we developed an algorithm to monitor the user during several walking condition where the user carry a load. The remainder of the thesis is organized as follows. Chapter I gives an overview about Body Area Networks (BANs), illustrating the relevant features of this technology and the key challenges still open. It concludes with a short list of the real solutions and prototypes proposed by academic research and manufacturers. The domain of the posture and gait analysis, the methodologies, and the technologies used to provide real-time feedback on detected events, are illustrated in Chapter II. The Chapter III and IV, respectively, shown BANs developed with the purpose to detect fall and monitor the gait taking advantage by two inertial measurement unit and baropodometric insoles. Chapter V reports an audio-biofeedback system to improve balance on the information provided by the use centre of mass. A walking assistant based on the KNN classifier to detect walking alteration on load carriage, is described in Chapter VI.

Development of an X-ray spectrometric system and feasibility tests of Silicon Drift Detector for medical and space applications

The thesis work concerns X-ray spectrometry for both medical and space applications and is divided into two sections. The first section addresses an X-ray spectrometric system designed to study radiological beams and is devoted to the optimization of diagnostic procedures in medicine. A parametric semi-empirical model capable of efficiently reconstructing diagnostic X-ray spectra in 'middle power' computers was developed and tested. In addition, different silicon diode detectors were tested as real-time detectors in order to provide a real-time evaluation of the spectrum during diagnostic procedures. This project contributes to the field by presenting an improved simulation of a realistic X-ray beam emerging from a common X-ray tube with a complete and detailed spectrum that lends itself to further studies of added filtration, thus providing an optimized beam for different diagnostic applications in medicine. The second section describes the preliminary tests that have been carried out on the first version of an Application Specific Integrated Circuit (ASIC), integrated with large area position-sensitive Silicon Drift Detector (SDD) to be used on board future space missions. This technology has been developed for the ESA project: LOFT (Large Observatory for X-ray Timing), a new medium-class space mission that the European Space Agency has been assessing since February of 2011. The LOFT project was proposed as part of the Cosmic Vision Program (2015-2025).

The new Beam Halo Monitor for the CMS experiment at the LHC

In the context of increasing beam energy and luminosity of the LHC accelerator at CERN, it will be important to accurately measure the Machine Induced Background. A new monitoring system will be installed in the CMS cavern for measuring the beam background at high radius. This detector, called the Beam Halo Monitor, will provide an online, bunch-by-bunch measurement of background induced by beam halo interactions, separately for each beam. The detector is composed of synthetic quartz Cherenkov radiators, coupled to fast UV sensitive photomultiplier tubes. The directional and fast response of the system allows the discrimination of the background particles from the dominant flux in the cavern induced by pp collision debris, produced within the 25 ns bunch spacing. The readout electronics of this detector will make use of many components developed for the upgrade of the CMS Hadron Calorimeter electronics, with a dedicated firmware and readout adapted to the beam monitoring requirements. The PMT signal will be digitized by a charge integrating ASIC, providing both the signal rise time and the charge integrated over one bunch crossing. The backend electronics will record bunch-by-bunch histograms, which will be published to CMS and the LHC using the newly designed CMS beam instrumentation specific DAQ. A calibration and monitoring system has been designed to generate triggered pulses of UV light to monitor the efficiency of the system. The experimental results validating the design of the detector, the calibration system and the electronics will be presented.

Methodologies for Synthesizable Programmable Devices based on Multi-Stage Switching Networks

Nowadays the rise of non-recurring engineering (NRE) costs associated with complexity is becoming a major factor in SoC design, limiting both scaling opportunities and the flexibility advantages offered by the integration of complex computational units. The introduction of embedded programmable elements can represent an appealing solution, able both to guarantee the desired flexibility and upgradabilty and to widen the SoC market. In particular embedded FPGA (eFPGA) cores can provide bit-level optimization for those applications which benefits from synthesis, paying on the other side in terms of performance penalties and area overhead with respect to standard cell ASIC implementations. In this scenario this thesis proposes a design methodology for a synthesizable programmable device designed to be embedded in a SoC. A soft-core embedded FPGA (eFPGA) is hence presented and analyzed in terms of the opportunities given by a fully synthesizable approach, following an implementation flow based on Standard-Cell methodology. A key point of the proposed eFPGA template is that it adopts a Multi-Stage Switching Network (MSSN) as the foundation of the programmable interconnects, since it can be efficiently synthesized and optimized through a standard cell based implementation flow, ensuring at the same time an intrinsic congestion-free network topology. The evaluation of the flexibility potentialities of the eFPGA has been performed using different technology libraries (STMicroelectronics CMOS 65nm and BCD9s 0.11μm) through a design space exploration in terms of area-speed-leakage tradeoffs, enabled by the full synthesizability of the template. Since the most relevant disadvantage of the adopted soft approach, compared to a hardcore, is represented by a performance overhead increase, the eFPGA analysis has been made targeting small area budgets. The generation of the configuration bitstream has been obtained thanks to the implementation of a custom CAD flow environment, and has allowed functional verification and performance evaluation through an application-aware analysis.