912 resultados para applications design


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Energetic ion beams are produced during the interaction of ultrahigh-intensity, short laser pulses with plasmas. These laser-produced ion beams have important applications ranging from the fast ignition of thermonuclear targets to proton imaging, deep proton lithography, medical physics, and injectors for conventional accelerators. Although the basic physical mechanisms of ion beam generation in the plasma produced by the laser pulse interaction with the target are common to all these applications, each application requires a specific optimization of the ion beam properties, that is, an appropriate choice of the target design and of the laser pulse intensity, shape, and duration.

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Current high temperature superconducting (HTS) wires exhibit high current densities enabling their use in electrical rotating machinery. The possibility of designing high power density superconducting motors operating at reasonable temperatures allows for new applications in mobile systems in which size and weight represent key design parameters. Thus, all-electric aircrafts represent a promising application for HTS motors. The design of such a complex system as an aircraft consists of a multi-variable optimization that requires computer models and advanced design procedures. This paper presents a specific sizing model of superconducting propulsion motors to be used in aircraft design. The model also takes into account the cooling system. The requirements for this application are presented in terms of power and dynamics as well as a load profile corresponding to a typical mission. We discuss the design implications of using a superconducting motor on an aircraft as well as the integration of the electrical propulsion in the aircraft, and the scaling laws derived from physics-based modeling of HTS motors.

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This research investigated seepage under hydraulic structures considering flow through the banks of the canal. A computer model, utilizing the finite element method, was used. Different configurations of sheetpile driven under the floor of the structure were studied. Results showed that the transverse extension of sheetpile, driven at the middle of the floor, into the banks of the canal had very little effect on seepage losses, uplift force, and on the exit gradient at the downstream end of the floor. Likewise, confining the downstream floor with sheetpile from three sides was not found effective. When the downstream floor was confined with sheetpile from all sides, this has significantly reduced the exit gradient. Furthermore, all the different configurations of the sheetpile had insignificant effect on seepage losses. The most effective configuration of the sheetpile was the case when two rows of sheetpiles were driven at the middle and at the downstream end of the floor, with the latter sheetpile extended few meters into the banks of the canal. This case has significantly reduced the exit gradient and caused only slight increase in the uplift force when compared to other sheetpile configurations. The present study suggests that two-dimensional analysis of seepage problems underestimates the exit gradient and uplift force on hydraulic structures.

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In the present work, by investigating the influence of source/drain (S/D) extension region engineering (also known as gate-underlap architecture) in planar Double Gate (DG) SOI MOSFETs, we offer new design insights to achieve high tolerance to gate misalignment/oversize in nanoscale devices for ultra-low-voltage (ULV) analog/rf applications. Our results show that (i) misaligned gate-underlap devices perform significantly better than DC devices with abrupt source/drain junctions with identical misalignment, (ii) misaligned gate underlap performance (with S/D optimization) exceeds perfectly aligned DG devices with abrupt S/D regions and (iii) 25% back gate misalignment can be tolerated without any significant degradation in cut-off frequency (f(T)) and intrinsic voltage gain (A(VO)). Gate-underlap DG devices designed with spacer-to-straggle ratio lying within the range 2.5 to 3.0 show best tolerance to misaligned/oversize back gate and indeed are better than self-aligned DG MOSFETs with non-underlap (abrupt) S/D regions. Impact of gate length and silicon film thickness scaling is also discussed. These results are very significant as the tolerable limit of misaligned/oversized back gate is considerably extended and the stringent process control requirements to achieve self-alignment can be relaxed for nanoscale planar ULV DG MOSFETs operating in weak-inversion region. The present work provides new opportunities for realizing future ULV analog/rf design with nanoscale gate-underlap DG MOSFETs. (C) 2008 Elsevier Ltd. All rights reserved.

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In this paper, gain-bandwidth (GB) trade-off associated with analog device/circuit design due to conflicting requirements for enhancing gain and cutoff frequency is examined. It is demonstrated that the use of a nonclassical source/drain (S/D) profile (also known as underlap channel) can alleviate the GB trade-off associated with analog design. Operational transconductance amplifier (OTA) with 60 nm underlap S/D MOSFETs achieve 15 dB higher open loop voltage gain along with three times higher cutoff frequency as compared to OTA with classical nonunderlap S/D regions. Underlap design provides a methodology for scaling analog devices into the sub-100 nm regime and is advantageous for high temperature applications with OTA, preserving functionality up to 540 K. Advantages of underlap architecture over graded channel (GC) or laterally asymmetric channel (LAC) design in terms of GB behavior are demonstrated. Impact of transistor structural parameters on the performance of OTA is also analyzed. Results show that underlap OTAs designed with spacer-to-straggle ratio of 3.2 and operated below a bias current of 80 microamps demonstrate optimum performance. The present work provides new opportunities for realizing future ultra wide band OTA design with underlap DG MOSFETs in silicon-on-insulator (SOI) technology. Index Terms—Analog/RF, double gate, gain-bandwidth product, .

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The quality factor of microwave resonators miniaturised by virtue of periodic loading is assessed. Five X-band resonators in E-plane technology with different miniaturisation factors have been designed to resonate at approximately the same frequency. The loaded quality factor is extracted from the fractional bandwidth and subsequently employed to estimate the unloaded quality factor. The study reveals that the unloaded quality factor drops approximately linearly with the miniaturisation. Subsequently design guidelines for E-plane filters with periodically loaded resonators are provided by means of an example involving a fifth-order filter. Full-wave simulated and experimental results are presented to validate the study.

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Novel V-band substrate integrated waveguide (SIW) filters have been presented. Design procedures for the filters synthesis and mechanisms providing quasi-elliptic response have been explained. The insertion loss of the filters has been measured below 2 dB with microstrip-to-SIW transitions being included.

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Thermal fatigue analysis based on 2D finite difference and 3D finite element methods is carried out to study the performance of solar panel structure during micro-satellite life time. Solar panel primary structure consists of honeycomb structure and composite laminates. The 2D finite difference (I-DEAS) model yields predictions of the temperature profile during one orbit. Then, 3D finite element analysis (ANSYS) is applied to predict thermal fatigue damage of solar panel structure. Meshing the whole structure with 2D multi-layer shell elements with sandwich option is not efficient, as it misses thermal response of the honeycomb structure. So we applied a mixed approach between 3D solid and 2D shell elements to model the solar panel structure without the sandwich option.

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Solar array rotation mechanism provides a hinged joint between the solar panel and satellite body, smooth rota-tion of the solar array into deployed position and its fixation in this position. After unlocking of solar panel (while in orbit), rotation bracket turns towards ready-to-work position under the action of driving spring. During deployment, once reached the required operating angle (defined by power subsystem engineer), the rotation bracket collides with the fixed bracket that is mounted on body of the satellite, to stop rotation. Due to the effect of collision force that may alter the rotation mechanism function, design of centrifugal brake is essential. At stoppage moment micro-switches activate final position sensor and a stopper locks the rotation bracket. Design of spring and centrifugal brake components, static finite element stress analysis of primary structure body of rotation mechanism at stoppage moment have been obtained. Last, reliability analysis of rotation mechanism is evaluated. The benefit of this study is to aid in the design of rotation mechanism that can be used in micro-satellite applications.

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Solar array rotation mechanism provides a hinged joint between the solar panel and satellite body, smooth rotation of the solar array into deployed position and its fixation in this position. After unlocking of solar panel (while in orbit), rotation bracket turns towards ready-to-work position under the action of driving spring. During deployment, once reached the required operating angle (defined by power subsystem engineer), the rotation bracket collides with the fixed bracket that is mounted on body of the satellite, to stop rotation. Due to the effect of collision force that may alter the rotation mechanism function, design of centrifugal brake is essential. At stoppage moment micro-switches activate final position sensor and a stopper locks the rotation bracket. Design of spring and centrifugal brake components, static finite element stress analysis of primary structure body of rotation mechanism at stoppage moment have been obtained. Last, reliability analysis of rotation mechanism is evaluated. The benefit of this study is to aid in the design of rotation mechanism that can be used in micro-satellite applications.