Temperature, pH, and conductivity control of the nutrient solution of an hydroponic greenhouse

One of the aspects of modern agriculture is characterised by a culture without soil (hydroponic cultures). These culture techniques are identified by possessing automatic control systems to control the nutrient solution. In first hydroponic cultures this control was accomplished by “on- off” analog controllers that applied a single control law implemented in hardware. Therefore, the changes of the control law resulted in the change of all interface electronics. In digital control implemented by micro-controllers the alteration of such control law is easily performed by changing only a computer program, leaving untouched all the interface hardware. In this way, the use and substitution of the control strategy is improved, as well, the use of advanced control strategies.

Supervised training approach using spiking neural networks

One of the basic aspects of some neural networks is their attempt to approximate as much as possible their biological counterparts. The goal is to achieve a simple and robust network, easy to understand and able of simulating the human brain at a computational level. Recently a third generation of neural networks (NN) [1], called Spiking Neural Networks(SNN) was appeared. This new kind of networks use the time of a electrical pulse, or spike, to encode the information. In the first and second generation of NN analog values are used in the communication between neurons.

Modelos de dinâmica da Terra aplicados à geologia de Portuga l: relevância da experimentação análoga no ensino e na divulgação da geologia

Tese de doutoramento, Geologia (Geodinâmica Interna), Universidade de Lisboa, Faculdade de Ciências, 2014

New synthetic methodologies from biorenewable resources

Tese de doutoramento, Farmácia (Química Farmacêutica e Terapêutica), Universidade de Lisboa, Faculdade de Farmácia, 2014

Gallium compounds forthe design of (nano)radiophamarceuticals

Tese de doutoramento, Química (Química Inorgânica), Universidade de Lisboa, Faculdade de Ciências, 2014

Performance of an adaptive homodyne receiver in the presence of multipath, Rayleigh-fading and time-varying quadrature errors

In this paper, we carry out a detailed performance analysis of the blind source separation based I/Q corrector operating at the baseband. Performance of the digital I/Q corrector is evaluated not only under time-varying phase and gain errors but also in the presence of multipath and Rayleigh fading channels. Performance under low-SNR and different modulation formats and constellation sizes is also evaluated. What is more, BER improvement after correction is illustrated. The results indicate that the adaptive algorithm offers adequate performance for most communication applications hence, reducing the matching requirements of the analog front-end enabling higher levels of integration.

Design and low-power implementation of an adaptive image rejection receiver

This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.

Design of a power-aware digital image rejection receiver

This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.

A biosignal embedded system for physiological computing

Thesis submitted in the fulfilment of the requirements for the Degree of Master in Electronic and Telecomunications Engineering

Análise e implementação de filtros e controladores num sistema de processamento digital de sinal

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Fractional order modelling of fractional-order holds

Discrete time control systems require sample- and-hold circuits to perform the conversion from digital to analog. Fractional-Order Holds (FROHs) are an interpolation between the classical zero and first order holds and can be tuned to produce better system performance. However, the model of the FROH is somewhat hermetic and the design of the system becomes unnecessarily complicated. This paper addresses the modelling of the FROHs using the concepts of Fractional Calculus (FC). For this purpose, two simple fractional-order approximations are proposed whose parameters are estimated by a genetic algorithm. The results are simple to interpret, demonstrating that FC is a useful tool for the analysis of these devices.

An embedded 1149.4 extension to support mixed-signal debugging

Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

ALS-Sence: sistema de aquisição e processamento de electromiogramas para pacientes com ALS

Dissertação para obtenção do grau de Mestre em Engenharia de Eletrónica e Computadores

Controlo de conversores de potência genéricos por FPGA

Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

Análise e implementação digital de uma malha de captura de fase para sincronização de conversores à rede elétrica

Dissertação para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Eletrónica Industrial