789 resultados para Memory. eng
Resumo:
La revista coreana C3 publica el Museo de la Memoria de Andalucía. Contiene textos, imágenes, planos y dibujos del autor. El Museo de la Memoria se centra en la investigación de distintos modos de relacionarse la materia y el aire. Yuxtapone volúmenes de masa y vacío creando tensiones duales y complementarias. La obra aspira a una unidad total, a la cual contribuye especialmente la materialidad del hormigón. La obra deviene un ejemplo de arquitectura singular en todos sus aspectos. Se publican detalles constructivos de la obra.
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Accumulating evidence suggests a role for the medial temporal lobe (MTL) in working memory (WM). However, little is known concerning its functional interactions with other cortical regions in the distributed neural network subserving WM. To reveal these, we availed of subjects with MTL damage and characterized changes in effective connectivity while subjects engaged in WM task. Specifically, we compared dynamic causal models, extracted from magnetoencephalographic recordings during verbal WM encoding, in temporal lobe epilepsy patients (with left hippocampal sclerosis) and controls. Bayesian model comparison indicated that the best model (across subjects) evidenced bilateral, forward, and backward connections, coupling inferior temporal cortex (ITC), inferior frontal cortex (IFC), and MTL. MTL damage weakened backward connections from left MTL to left ITC, a decrease accompanied by strengthening of (bidirectional) connections between IFC and MTL in the contralesional hemisphere. These findings provide novel evidence concerning functional interactions between nodes of this fundamental cognitive network and sheds light on how these interactions are modified as a result of focal damage to MTL. The findings highlight that a reduced (top-down) influence of the MTL on ipsilateral language regions is accompanied by enhanced reciprocal coupling in the undamaged hemisphere providing a first demonstration of “connectional diaschisis.”
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Modeling the evolution of the state of program memory during program execution is critical to many parallehzation techniques. Current memory analysis techniques either provide very accurate information but run prohibitively slowly or produce very conservative results. An approach based on abstract interpretation is presented for analyzing programs at compile time, which can accurately determine many important program properties such as aliasing, logical data structures and shape. These properties are known to be critical for transforming a single threaded program into a versión that can be run on múltiple execution units in parallel. The analysis is shown to be of polynomial complexity in the size of the memory heap. Experimental results for benchmarks in the Jolden suite are given. These results show that in practice the analysis method is efflcient and is capable of accurately determining shape information in programs that créate and manipúlate complex data structures.
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An approximate analytic model of a shared memory multiprocessor with a Cache Only Memory Architecture (COMA), the busbased Data Difussion Machine (DDM), is presented and validated. It describes the timing and interference in the system as a function of the hardware, the protocols, the topology and the workload. Model results have been compared to results from an independent simulator. The comparison shows good model accuracy specially for non-saturated systems, where the errors in response times and device utilizations are independent of the number of processors and remain below 10% in 90% of the simulations. Therefore, the model can be used as an average performance prediction tool that avoids expensive simulations in the design of systems with many processors.
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The goal of the RAP-WAM AND-parallel Prolog abstract architecture is to provide inference speeds significantly beyond those of sequential systems, while supporting Prolog semantics and preserving sequential performance and storage efficiency. This paper presents simulation results supporting these claims with special emphasis on memory performance on a two-level sharedmemory multiprocessor organization. Several solutions to the cache coherency problem are analyzed. It is shown that RAP-WAM offers good locality and storage efficiency and that it can effectively take advantage of broadcast caches. It is argued that speeds in excess of 2 ML IPS on real applications exhibiting medium parallelism can be attained with current technology.
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The interactions among three important issues involved in the implementation of logic programs in parallel (goal scheduling, precedence, and memory management) are discussed. A simplified, parallel memory management model and an efficient, load-balancing goal scheduling strategy are presented. It is shown how, for systems which support "don't know" non-determinism, special care has to be taken during goal scheduling if the space recovery characteristics of sequential systems are to be preserved. A solution based on selecting only "newer" goals for execution is described, and an algorithm is proposed for efficiently maintaining and determining precedence relationships and variable ages across parallel goals. It is argued that the proposed schemes and algorithms make it possible to extend the storage performance of sequential systems to parallel execution without the considerable overhead previously associated with it. The results are applicable to a wide class of parallel and coroutining systems, and they represent an efficient alternative to "all heap" or "spaghetti stack" allocation models.
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We present an overview of the stack-based memory management techniques that we used in our non-deterministic and-parallel Prolog systems: &-Prolog and DASWAM. We believe that the problems associated with non-deterministic and-parallel systems are more general than those encountered in or-parallel and deterministic and-parallel systems, which can be seen as subsets of this more general case. We develop on the previously proposed "marker scheme", lifting some of the restrictions associated with the selection of goals while keeping (virtual) memory consumption down. We also review some of the other problems associated with the stack-based management scheme, such as handling of forward and backward execution, cut, and roll-backs.
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In this paper, we examine the issue of memory management in the parallel execution of logic programs. We concentrate on non-deterministic and-parallel schemes which we believe present a relatively general set of problems to be solved, including most of those encountered in the memory management of or-parallel systems. We present a distributed stack memory management model which allows flexible scheduling of goals. Previously proposed models (based on the "Marker model") are lacking in that they impose restrictions on the selection of goals to be executed or they may require consume a large amount of virtual memory. This paper first presents results which imply that the above mentioned shortcomings can have significant performance impacts. An extension of the Marker Model is then proposed which allows flexible scheduling of goals while keeping (virtual) memory consumption down. Measurements are presented which show the advantage of this solution. Methods for handling forward and backward execution, cut and roll back are discussed in the context of the proposed scheme. In addition, the paper shows how the same mechanism for flexible scheduling can be applied to allow the efficient handling of the very general form of suspension that can occur in systems which combine several types of and-parallelism and more sophisticated methods of executing logic programs. We believe that the results are applicable to many and- and or-parallel systems.
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Inter-individual differences in cognitive performance are based on an efficient use of task-related brain resources. However, little is known yet on how these differences might be reflected on resting-state brain networks. Here we used Magnetoencephalography resting-state recordings to assess the relationship between a behavioral measurement of verbal working memory and functional connectivity as measured through Mutual Information. We studied theta (4?8 Hz), low alpha (8?10 Hz), high alpha (10?13 Hz), low beta (13?18 Hz) and high beta (18?30 Hz) frequency bands. A higher verbal working memory capacity was associated with a lower mutual information in the low alpha band, prominently among right-anterior and left-lateral sensors. The results suggest that an efficient brain organization in the domain of verbal working memory might be related to a lower resting-state functional connectivity across large-scale brain networks possibly involving right prefrontal and left perisylvian areas.
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One of the current issues of debate in the study of mild cognitive impairment (MCI) is deviations of oscillatory brain responses from normal brain states and its dynamics. This work aims to characterize the differences of power in brain oscillations during the execution of a recognition memory task in MCI subjects in comparison with elderly controls. Magnetoencephalographic (MEG) signals were recorded during a continuous recognition memory task performance. Oscillatory brain activity during the recognition phase of the task was analyzed by wavelet transform in the source space by means of minimum norm algorithm. Both groups obtained a 77% hit ratio. In comparison with healthy controls, MCI subjects showed increased theta (p < 0.001), lower beta reduction (p < 0.001) and decreased alpha and gamma power (p < 0.002 and p < 0.001 respectively) in frontal, temporal and parietal areas during early and late latencies. Our results point towards a dual pattern of activity (increase and decrease) which is indicative of MCI and specific to certain time windows, frequency bands and brain regions. These results could represent two neurophysiological sides of MCI. Characterizing these opposing processes may contribute to the understanding of the disorder.
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Collaborative filtering recommender systems contribute to alleviating the problem of information overload that exists on the Internet as a result of the mass use of Web 2.0 applications. The use of an adequate similarity measure becomes a determining factor in the quality of the prediction and recommendation results of the recommender system, as well as in its performance. In this paper, we present a memory-based collaborative filtering similarity measure that provides extremely high-quality and balanced results; these results are complemented with a low processing time (high performance), similar to the one required to execute traditional similarity metrics. The experiments have been carried out on the MovieLens and Netflix databases, using a representative set of information retrieval quality measures.
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It is still an open question whether subjective memory complaints (SMC) can actually be considered to be clinically relevant predictors for the development of an objective memory impairment and even dementia. There is growing evidence that suggests that SMC are associated with an increased risk of dementia and with the presence of biological correlates of early Alzheimer's disease. In this paper, in order to shed some light on this issue, we try to discern whether subjects with SMC showed a different profile of functional connectivity compared with subjects with mild cognitive impairment (MCI) and healthy elderly subjects. In the present study, we compare the degree of synchronization of brain signals recorded with magnetoencephalography between three groups of subjects (56 in total): 19 with MCI, 12 with SMC and 25 healthy controls during a memory task. Synchronization likelihood, an index based on the theory of nonlinear dynamical systems, was used to measure functional connectivity. Briefly, results show that subjects with SMC have a very similar pattern of connectivity to control group, but on average, they present a lower synchronization value. These results could indicate that SMC are representing an initial stage with a hypo-synchronization (in comparison with the control group) where the brain system is still not compensating for the failing memory networks, but behaving as controls when compared with the MCI subjects.
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One of the main causes for age-related declines in working memory is a higher vulnerability to retroactive interference due to a reduced ability to suppress irrelevant information. However, the underlying neural correlates remain to be established. Magnetoencephalography was used to investigate differential neural patterns in young and older adults performing an interference-based memory task with two experimental conditions, interrupting and distracting, during successful recognition. Behaviorally, both types of retroactive interference significantly impaired accuracy at recognition more in older adults than in young adults with the latter exhibiting greater disruptions by interrupters. Magnetoencephalography revealed the presence of differential age-related neural patterns. Specifically, time-modulated activations in temporo-occipital and superior parietal regions were higher in young adults compared with older adults for the interrupting condition. These results suggest that age-related deficits in inhibitory mechanisms that increase vulnerability to retroactive interference may be associated with neural under-recruitments in a high-interference task.
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Applications that operate on meshes are very popular in High Performance Computing (HPC) environments. In the past, many techniques have been developed in order to optimize the memory accesses for these datasets. Different loop transformations and domain decompositions are com- monly used for structured meshes. However, unstructured grids are more challenging. The memory accesses, based on the mesh connectivity, do not map well to the usual lin- ear memory model. This work presents a method to improve the memory performance which is suitable for HPC codes that operate on meshes. We develop a method to adjust the sequence in which the data are used inside the algorithm, by means of traversing and sorting the mesh. This sorted mesh can be transferred sequentially to the lower memory levels and allows for minimum data transfer requirements. The method also reduces the lower memory requirements dra- matically: up to 63% of the L1 cache misses are removed in a traditional cache system. We have obtained speedups of up to 2.58 on memory operations as measured in a general- purpose CPU. An improvement is also observed with se- quential access memories, where we have observed reduc- tions of up to 99% in the required low-level memory size.
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A design for obtaining memory in optical bistability with liquid crystals is reported. This design uses optical feedback on a twisted nematie liquid crystal ( TNLC ) through an optoelectronic system. A constant input light is the read-out and its value depends on the desired initial working point, usually at the bottom of the T(V) vs. V curve. Light levels depend on the feedback. An input light pulse change the working point to the top of the transmission curve. When this pulse vanishes, the working point remains at the upper part of the curve. Hence a memory function is obtained. Minimum pulse width needed was 1msec. ON-OPF ratio was 100:3.