A high performance IIR digital filter chip

The design of a high-performance IIR (infinite impulse response) digital filter is described. The chip architecture operates on 11-b parallel, two's complement input data with a 12-b parallel two's complement coefficient to produce a 14-b two's complement output. The chip is implemented in 1.5-µm, double-layer-metal CMOS technology, consumes 0.5 W, and can operate up to 15 Msample/s. The main component of the system is a fine-grained systolic array that internally is based on a signed binary number representation (SBNR). Issues addressed include testing, clock distribution, and circuitry for conversion between two's complement and SBNR.

Surface modification of LiV3O8 nanosheets via layer-by-layer self-assembly for high-performance rechargeable lithium batteries

In this work, an economical route based on hydrothermal and layer-by-layer (LBL) self-assembly processes has been developed to synthesize unique Al ₂O₃-modified LiV₃O₈ nanosheets, comprising a core of LiV₃O₈ nanosheets and a thin Al ₂O₃ nanolayer. The thickness of the Al₂O ₃ nanolayer can be tuned by altering the LBL cycles. When evaluated for their lithium-storage properties, the 1 LBL Al₂O ₃-modified LiV₃O₈ nanosheets exhibit a high discharge capacity of 191 mA h g^-1 at 300 mA g^-1 (1C) over 200 cycles and excellent rate capability, demonstrating that enhanced physical and/or chemical properties can be achieved through proper surface modification. © 2014 Elsevier B.V. All rights reserved.

Simplified, high performance transceiver for phase modulated RFID applications

In this paper results are presented for a simple yet highly sensitive transceiver for phase modulated RFID applications. This is an advance on other simple RFID readers which can only operate with amplitude shift keyed (ASK) signals. Simple circuitry is achieved by the use of a novel injection locked PLL configuration which replaces the standard superhet type architecture normally used. The transceiver is shown to operate with a number of phase modulation modes which have certain advantages relating to distance to target. The paper concludes with practical results obtained for the transceiver when operated within a backscatter RFID application. A unique advantage of this transceiver is its complete immunity to the problem of TX/RX isolation, allowing for long ranges, estimated to be in the region of 80m at 1 GHz, to be achieved even in the presence of a simple backscatter target.

Repeatability and reliability of new air and water permeability tests for assessing the durability of high-performance concretes

This paper reports on the accuracy of new test methods developed to measure the air and water permeability of high-performance concretes (HPCs). Five representative HPC and one normal concrete (NC) mixtures were tested to estimate both repeatability and reliability of the proposed methods. Repeatability acceptance was adjudged using values of signal-noise ratio (SNR) and discrimination ratio (DR), and reliability was investigated by comparing against standard laboratory-based test methods (i.e., the RILEM gas permeability test and BS EN water penetration test). With SNR and DR values satisfying recommended criteria, it was concluded that test repeatability error has no significant influence on results. In addition, the research confirmed strong positive relationships between the proposed test methods and existing standard permeability assessment techniques. Based on these findings, the proposed test methods show strong potential to become recognized as international methods for determining the permeability of HPCs.

High Performance Real-time Pre-Processing for Fixed-Complexity Sphere Decoder

Pre-processing (PP) of received symbol vector and channel matrices is an essential pre-requisite operation for Sphere Decoder (SD)-based detection of Multiple-Input Multiple-Output (MIMO) wireless systems. PP is a highly complex operation, but relative to the total SD workload it represents a relatively small fraction of the overall computational cost of detecting an OFDM MIMO frame in standards such as 802.11n. Despite this, real-time PP architectures are highly inefficient, dominating the resource cost of real-time SD architectures. This paper resolves this issue. By reorganising the ordering and QR decomposition sub operations of PP, we describe a Field Programmable Gate Array (FPGA)-based PP architecture for the Fixed Complexity Sphere Decoder (FSD) applied to 4 × 4 802.11n MIMO which reduces resource cost by 50% as compared to state-of-the-art solutions whilst maintaining real-time performance.

Automating fault tolerance in high-performance computational biological jobs using multi-agent approaches

Background: Large-scale biological jobs on high-performance computing systems require manual intervention if one or more computing cores on which they execute fail. This places not only a cost on the maintenance of the job, but also a cost on the time taken for reinstating the job and the risk of losing data and execution accomplished by the job before it failed. Approaches which can proactively detect computing core failures and take action to relocate the computing core's job onto reliable cores can make a significant step towards automating fault tolerance. Method: This paper describes an experimental investigation into the use of multi-agent approaches for fault tolerance. Two approaches are studied, the first at the job level and the second at the core level. The approaches are investigated for single core failure scenarios that can occur in the execution of parallel reduction algorithms on computer clusters. A third approach is proposed that incorporates multi-agent technology both at the job and core level. Experiments are pursued in the context of genome searching, a popular computational biology application. Result: The key conclusion is that the approaches proposed are feasible for automating fault tolerance in high-performance computing systems with minimal human intervention. In a typical experiment in which the fault tolerance is studied, centralised and decentralised checkpointing approaches on an average add 90% to the actual time for executing the job. On the other hand, in the same experiment the multi-agent approaches add only 10% to the overall execution time

Operator and Workflow Optimization for High-Performance Analytics

We make a case for studying the impact of intra-node parallelism on the performance of data analytics. We identify four performance optimizations that are enabled by an increasing number of processing cores on a chip. We discuss the performance impact of these opimizations on two analytics operators and we identify how these optimizations affect each another.