Performance comparison of a VDFLL versus VDLL and scalar GNSS receiver architectures in Harsh scenarios

We analyze the advantages and drawbacks of a vector delay/frequency-locked loop (VDFLL) architecture regarding the conventional scalar and the vector delay-locked loop (VDLL) architectures for GNSS receivers in harsh scenarios that include ionospheric scintillation, multipath, and high dynamics motion. The VDFLL is constituted by a bank of code and frequency discriminators feeding a central extended Kaiman filter (EKF) that estimates the receiver's position, velocity, and clock bias. Both code and frequency loops are closed vectorially through the EKF. The VDLL closes the code loop vectorially and the phase loops through individual PLLs while the scalar receiver closes both loops by means of individual independent PLLs and DLLs.

Component-based software engineering: a quantitative approach

Dissertação apresentada para a obtenção do Grau de Doutor em Informática pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

A high level e-maintenance architecture to support on-site teams

Emergent architectures and paradigms targeting reconfigurable manufacturing systems increasingly rely on intelligent modules to maximize the robustness and responsiveness of modern installations. Although intelligent behaviour significantly minimizes the occurrence of faults and breakdowns it does not exclude them nor can prevent equipment’s normal wear. Adequate maintenance is fundamental to extend equipments’ life cycle. It is of major importance the ability of each intelligent device to take an active role in maintenance support. Further this paradigm shift towards “embedded intelligence”, supported by cross platform technologies, induces relevant organizational and functional changes on local maintenance teams. On the one hand, the possibility of outsourcing maintenance activities, with the warranty of a timely response, through the use of pervasive networking technologies and, on the other hand, the optimization of local maintenance staff are some examples of how IT is changing the scenario in maintenance. The concept of e-maintenance is, in this context, emerging as a new discipline with defined socio-economic challenges. This paper proposes a high level maintenance architecture supporting maintenance teams’ management and offering contextualized operational support. All the functionalities hosted by the architecture are offered to the remaining system as network services. Any intelligent module, implementing the services’ interface, can report diagnostic, prognostic and maintenance recommendations that enable the core of the platform to decide on the best course of action.

Multifunctional controller architecture for sold-state marx modulator based on FPGA

This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.

Análise comparativa de sistemas centralizados e descentralizados de valorização de chorumes de suiniculturas, utilizando o software UMBERTO

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia do Ambiente, Perfil de Engenharia Sanitária

Software de sistema para um intercomunicador de veículos militares

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Informática

Replication in distributed systems using IEC 61499 standard

The international Electrotechnical Commission (IEC) 61499 architecture incorporated several function block with which distributed control application may be developed, and how these are interpreted and executed. However, due the distributed nature of the control applications, many issues also need to be taken into account. Most of these are due to the new error model and failure modes of the distributed hardware on which the distributed application is executed and also due the incomplete standards definition of the execution models. IEC 61499 frameworks does not clarify how to handle with replication of software and hardware components. In this paper we propose a replication model for IEC 61499 applications and which mechanisms and protocols may be used for their support.

Realization of fractional-order controllers: analysis, synthesis and application to the velocity control of a servo system

The synthesis and application of fractional-order controllers is now an active research field. This article investigates the use of fractional-order PID controllers in the velocity control of an experimental modular servo system. The systern consists of a digital servomechanism and open-architecture software environment for real-time control experiments using MATLAB/Simulink. Different tuning methods will be employed, such as heuristics based on the well-known Ziegler Nichols rules, techniques based on Bode’s ideal transfer function and optimization tuning methods. Experimental responses obtained from the application of the several fractional-order controllers are presented and analyzed. The effectiveness and superior performance of the proposed algorithms are also compared with classical integer-order PID controllers.

Culturtainment - a new interactive entertainment genre: assessment of Cultural Heritage digital content in leisure software games

European Master in Multimedia and Audiovisual Administration

Adaptar abordagem KAOS para especificar linhas de produtos de software

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção de grau de Mestre

A smart layer for remote laboratories

Commonly, when a weblab is developed to support remote experiments in sciences and engineering courses, a particular hardware/software architecture is implemented. However, the existence of several technological solutions to implement those architectures difficults the emergence of a standard, both at hardware and software levels. While particular solutions are adopted assuming that only qualified people may implement a weblab, the control of the physical space and the power consumption are often forgotten. Since controlling these two previous aspects may increase the quality of the weblab hosting the remote experiments, this paper proposes the useof a new layer implemented by a domotic system bus with several devices (e.g. lights, power sockets, temperature sensors, and others) able to be controlled through the Internet. We also provide a brief proof-of-concept in the form of a weblab equipped with a simple domotic system usually implemented in smart houses. The added value to the remote experiment hosted at the weblab is also identified in terms of power savings and environment conditions.

Consistent state software transactional memory

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática

A Web-Based geographical information system prototype on Portuguese traditional food products

Dissertation submitted in partial fulfilment of the requirements for the Degree of Master of Science in Geospatial Technologies

Effect of fractional orders in the velocity control of a servo system

The application of fractional-order PID controllers is now an active field of research. This article investigates the effect of fractional (derivative and integral) orders upon system's performance in the velocity control of a servo system. The servo system consists of a digital servomechanism and an open-architecture software environment for real-time control experiments using MATLAB/Simulink tools. Experimental responses are presented and analyzed, showing the effectiveness of fractional controllers. Comparison with classical PID controllers is also investigated.