Improved capacity and stability of integrated Li and Mn rich layered-spinel Li1.17Ni0.25Mn1.08O3 cathodes for Li-ion batteries

A Li-rich layered-spinel material with a target composition Li1.17Ni0.25Mn1.08O3 (xLiLi1/3Mn2/3]O-2.(1 - x) LiNi0.5Mn1.5O4, (x = 0.5)) was synthesized by a self-combustion reaction (SCR), characterized by XRD, SEM, TEM, Raman spectroscopy and was studied as a cathode material for Li-ion batteries. The Rietveld refinement results indicated the presence of monoclinic (LiLi1/3Mn2/3]O-2) (52%), spinel (LiNi0.5Mn1.5O4) (39%) and rhombohedral LiNiO2 (9%). The electrochemical performance of this Li-rich integrated cathode material was tested at 30 degrees C and compared to that of high voltage LiNi0.5Mn1.5O4 spinel cathodes. Interestingly, the layered-spinel integrated cathode material exhibits a high specific capacity of about 200 mA h g(-1) at C/10 rate as compared to 180 mA h g(-1) for LiNi0.5Mn1.5O4 in the potential range of 2.4-4.9 V vs. Li anodes in half cells. The layered-spinel integrated cathodes exhibited 92% capacity retention as compared to 82% for LiNi0.5Mn1.5O4 spinel after 80 cycles at 30 degrees C. Also, the integrated cathode material can exhibit 105 mA h g(-1) at 2 C rate as compared to 78 mA h g(-1) for LiNi0.5Mn1.5O4. Thus, the presence of the monoclinic phase in the composite structure helps to stabilize the spinel structure when high specific capacity is required and the electrodes have to work within a wide potential window. Consequently, the Li1.17Ni0.25Mn1.08O3 composite material described herein can be considered as a promising cathode material for Li ion batteries.

Secure Routing with an Integrated Localized Key Management Protocol in MANETs

A routing protocol in a mobile ad hoc network (MANET) should be secure against both the outside attackers which do not hold valid security credentials and the inside attackers which are the compromised nodes in the network. The outside attackers can be prevented with the help of an efficient key management protocol and cryptography. However, to prevent inside attackers, it should be accompanied with an intrusion detection system (IDS). In this paper, we propose a novel secure routing with an integrated localized key management (SR-LKM) protocol, which is aimed to prevent both inside and outside attackers. The localized key management mechanism is not dependent on any routing protocol. Thus, unlike many other existing schemes, the protocol does not suffer from the key management - secure routing interdependency problem. The key management mechanism is lightweight as it optimizes the use of public key cryptography with the help of a novel neighbor based handshaking and Least Common Multiple (LCM) based broadcast key distribution mechanism. The protocol is storage scalable and its efficiency is confirmed by the results obtained from simulation experiments.

Thermal test method for high power three-phase grid-connected inverters

Semiconductor device junction temperatures are maintained within datasheet specified limits to avoid failure in power converters. Burn-in tests are used to ensure this. In inverters, thermal time constants can be large and burn-in tests are required to be performed over long durations of time. At higher power levels, besides increased production cost, the testing requires sources and loads that can handle high power. In this study, a novel method to test a high power three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources and loads. Only energy corresponding to the losses is consumed. The test is done by circulating rated current within the three legs of the inverter. All the phase legs being loaded, the method can be used to test the inverter in both cases of a common or independent cooling arrangement for the inverter phase legs. Further, the method can be used with different inverter configurations - three- or four-wire and for different pulse width modulation (PWM) techniques. The method has been experimentally validated on a 24 kVA inverter for a four-wire configuration that uses sine-triangle PWM and a three-wire configuration that uses conventional space vector PWM.

Part II: A Fully Integrated RF PA in 28-nm CMOS With Device Design for Optimized Performance and ESD Robustness

In this paper, we report drain-extended MOS device design guidelines for the RF power amplifier (RF PA) applications. A complete RF PA circuit in a 28-nm CMOS technology node with the matching and biasing network is used as a test vehicle to validate the RF performance improvement by a systematic device design. A complete RF PA with 0.16-W/mm power density is reported experimentally. By simultaneous improvement of device-circuit performance, 45% improvement in the circuit RF power gain, 25% improvement in the power-added efficiency at 1-GHz frequency, and 5x improvement in the electrostatic discharge robustness are reported experimentally.

Harmonic analysis of DC capacitor current in sinusoidal and space-vector modulated neutral-point-clamped inverters

The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents a double Fourier series based analysis of the harmonic contents of the DC capacitor current in a three-level neutral-point clamped (NPC) inverter, modulated with sine-triangle pulse-width modulation (SPWM) or conventional space vector pulse-width modulation (CSVPWM) schemes. The analytical results are validated experimentally on a 3-kVA three-level inverter prototype. The capacitor current in an NPC inverter has a periodicity of 120(a similar to) at the fundamental or modulation frequency. Hence, this current contains third-harmonic and triplen-frequency components, apart from switching frequency components. The harmonic components vary with modulation index and power factor for both PWM schemes. The third harmonic current decreases with increase in modulation index and also decreases with increase in power factor in case of both PWM methods. In general, the third harmonic content is higher with SPWM than with CSVPWM at a given operating condition. Also, power loss and voltage ripple in the DC capacitor are estimated for both the schemes using the current harmonic spectrum and equivalent series resistance (ESR) of the capacitor.

Effect of Magnetic Field on Photoresponse of Cobalt Integrated Zinc Oxide Nanorods

Cobalt integrated zinc oxide nanorod (Co-ZnO NR) array is presented as a novel heterostructure for ultraviolet (UV) photodetector (PD). Defect states in Co-ZnO NRs surface induces an enhancement in photocurrent as compared to pristine ZnO NRs PD. Presented Co-ZnO NRs PD is highly sensitive to external magnetic field that demonstrated 185.7% enhancement in response current. It is concluded that the opposite polarizations of electron and holes in the presence of external magnetic field contribute to effective separation of electron hole pairs that have drifted upon UV illumination. Moreover, Co-ZnO NRs PD shows a faster photodetection speed (1.2 s response time and 7.4 s recovery time) as compared to the pristine ZnO NRs where the response and recovery times are observed as 38 and 195 s, respectively.

Fabrication of Microfluidic-Nanofluidic Channels with Integrated Electrodes

We report on the fabrication of microfluidc-nanofluidic channels on Si incorporated with embedded metallic interconnects. The device aids the study of motion of dispersed particles relative to the fluid under the influence of spatially uniform electric field. Optical lithography in combination with focused ion beam technique was used to fabricate the microfluidic-nanofluidic channels, respectively. Focused ion beam technique was also used for embedding the electrodes in the nanochannel. Gold contact pads were deposited using sputtering. The substrate was finally anodically bonded to a glass substrate.

SMO: An Integrated Approach to Intra-array and Inter-array Storage Optimization

The polyhedral model provides an expressive intermediate representation that is convenient for the analysis and subsequent transformation of affine loop nests. Several heuristics exist for achieving complex program transformations in this model. However, there is also considerable scope to utilize this model to tackle the problem of automatic memory footprint optimization. In this paper, we present a new automatic storage optimization technique which can be used to achieve both intra-array as well as inter-array storage reuse with a pre-determined schedule for the computation. Our approach works by finding statement-wise storage partitioning hyper planes that partition a unified global array space so that values with overlapping live ranges are not mapped to the same partition. Our heuristic is driven by a fourfold objective function which not only minimizes the dimensionality and storage requirements of arrays required for each high-level statement, but also maximizes inter statement storage reuse. The storage mappings obtained using our heuristic can be asymptotically better than those obtained by any existing technique. We implement our technique and demonstrate its practical impact by evaluating its effectiveness on several benchmarks chosen from the domains of image processing, stencil computations, and high-performance computing.

Static shape control of repetitive structures integrated with piezoelectric actuators

In this paper, several simplification methods are presented for shape control of repetitive structures such as symmetrical, rotational periodic, linear periodic, chain and axisymmetrical structures. Some special features in the differential equations governing these repetitive structures are examined by considering the whole structures. Based on the special properties of the governing equations, several methods are presented for simplifying their solution process. Finally, the static shape control of a cantilever symmetrical plate with piezoelectric actuator patches is demonstrated using the present simplification method. The result shows that present methods can effectively be used to find the optimal control voltage for shape control.

Integrated optically triggered polarisation-switching in InGaAsP twin-stripe injection lasers

A new form of ultrafast bistable polarization switching in twin-stripe injection lasers has been observed. For the first time, triggering between bistable states has been achieved by injecting light from a neighboring laser integrated on the same chip. Ultrafast switching times of 250 ps have been measured (detector limited).

Optically triggered polarisation bistability in GaInAsP twin stripe injection lasers using integrated devices

A bistable polarization switching element and optical triggering source has been produced by etching a facet in a twin stripe semiconductor laser. The switching element is formed by a pair of stripe segments at one end of the device and triggered with short light pulses from the other two segments. Detector limited switching risetimes have been measured at 250 ps.

Bismuth-doped fiber integrated ring laser mode-locked with a nanotube-based saturable absorber

We demonstrate passive mode-locking of a bismuth-doped fiber laser using a singlewall nanotube-based saturable absorber. Stable operation in the all-normal dispersion and average soliton regime is obtained, with an all-fiber integrated format. © 2010 Optical Society of America.