735 resultados para PWM inverter
Resumo:
The following paper presents a Powerline Communication (PLC) Method for Single Phase interfaced inverters in domestic microgrids. The PLC method is based on the injection of a repeating sequence of a specific harmonic, which is then modulated on the fundamental component of the grid current supplied by the inverters to the microgrid. The power flow and information exchange are simultaneously accomplished by the grid interacting inverters based on current programmed vector control, hence there is no need for dedicated hardware. Simulation results have been shown for inter-inverter communication under different operating conditions to propose the viability. These simulations have been experimentally validated and the corresponding results have also been presented in the paper.
Resumo:
Workplace noise has become one of the major issues in industry not only because of workers’ health but also due to safety. Electric motors, particularly, inverter fed induction motors emit objectionably high levels of noise. This has led to the emergence of a research area, concerned with measurement and mitigation of the acoustic noise. This paper presents a lowcost option for measurement and spectral analysis of acoustic noise emitted by electric motors. The system consists of an electret microphone, amplifier and filter. It makes use of the windows sound card and associated software for data acquisition and analysis. The measurement system is calibrated using a professional sound level meter. Acoustic noise measurements are made on an induction motor drive using the proposed system as per relevant international standards. These measurements are seen to match closely with those of a professional meter.
Resumo:
Grid simulators are used to test the control performance of grid-connected inverters under a wide range of grid disturbance conditions. In the present work, a three phase back-to-back connected inverter sharing a common dc bus has been programmed as a grid simulator. Three phase balanced disturbance voltages applied to three-phase balanced loads has been considered in the present work. The developed grid simulator can generate three phase balanced voltage sags, voltage swells, frequency deviations and phase jumps. The grid simulator uses a novel disturbance generation algorithm. The algorithm allows the user to reference the disturbance to any of the three phases at any desired phase angle. Further, the exit of the disturbance condition can be referenced to the desired phase angle of any phase by adjusting the duration of the disturbance. The grid simulator hardware has been tested with different loads – a linear purely resistive load, a non-linear diode-bridge load and a grid-connected inverter load.
Resumo:
Inverter dead-time, which is meant to prevent shoot-through fault, causes harmonic distortion and change in the fundamental voltage in the inverter output. Typical dead-time compensation schemes ensure that the amplitude of the fundamental output current is as desired, and also improve the current waveform quality significantly. However, even with compensation, the motor line current waveform is observed to be distorted close to the current zero-crossings. The IGBT switching transition times being significantly longer at low currents than at high currents is an important reason for this zero-crossover distortion. Hence, this paper proposes an improved dead-time compensation scheme, which makes use of the measured IGBT switching transition times at low currents. Measured line current waveforms in a 2.2 kW induction motor drive with the proposed compensation scheme are compared against those with the conventional dead-time compensation scheme and without dead-time compensation. The experimental results on the motor drive clearly demonstrate the improvement in the line current waveform quality with the proposed method.
Resumo:
A few advanced bus-clamping pulse width modulation (ABCPWM) methods have been proposed recently for a three-phase inverter. With these methods, each phase is clamped, switched at nominal frequency, and switched at twice the nominal frequency in different regions of the fundamental cycle. This study proposes a generalised ABCPWM scheme, encompassing the few ABCPWM schemes that have been proposed and many more ABCPWM schemes that have not been reported yet. Furthermore, analytical closed-form expression is derived for the harmonic distortion factor corresponding to the generalised ABCPWM. This factor is independent of load parameters. The analytical expression derived here brings out the dependence of root-mean-square (RMS) current ripple on modulation index, and can be used to evaluate the RMS current ripple corresponding to any ABCPWM scheme. The analytical closed-form expression is validated experimentally in terms of measured weighted total harmonic distortion (THD) in line voltage (V-WTHD) and measured THD in line current (I-THD) on a 6 kW induction motor drive.
Resumo:
Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept.
Resumo:
This study presents a topology for a single-phase pulse-width modulation (PWM) converter which achieves low-frequency ripple reduction in the dc bus even when there are grid frequency variations. A hybrid filter is introduced to absorb the low-frequency current ripple in the dc bus. The control strategy for the proposed filter does not require the measurement of the dc bus ripple current. The design criteria for selecting the filter components are also presented in this study. The effectiveness of the proposed circuit has been tested and validated experimentally. A smaller dc-link capacitor is sufficient to keep the low-frequency bus ripple to an acceptable range in the proposed topology.
Resumo:
PWM waveforms with positive voltage transition at the positive zero crossing of the fundamental voltage (type-A) are generally considered for PWM waveform with even number of switching angles per quarter whereas, waveforms with negative voltage transition at the positive zero crossing (type-B) are considered for odd number of switching angles per quarter. Optimal PWM, for minimization of total harmonic distortion of line to line (VWTHD), is generally solved with the aforementioned criteria. This paper establishes that a combination of both types of waveforms gives better performance than any individual type in terms of minimum VWTHD for complete range of modulation index (M). Optimal PWM for minimum VWTHD is solved for PWM waveforms with pulse numbers (P) of 5 and 7. Both type-A and type-B waveforms are found to be better in different ranges of M. The theoretical findings are confirmed through simulation and experimental results on a 3.7 kW squirrel cage induction motor in an open-loop V/f drive. Further, the optimal PWM is analysed from a space vector point of view.
Resumo:
This paper presents an experimental procedure to determine the acoustic and vibration behavior of an inverter-fed induction motor based on measurements of the current spectrum, acoustic noise spectrum, overall noise in dB, and overall A-weighted noise in dBA. Measurements are carried out on space-vector modulated 8-hp and 3-hp induction motor drives over a range of carrier frequencies at different modulation frequencies. The experimental data help to distinguish between regions of high and low acoustic noise levels. The measurements also bring out the impact of carrier frequency on the acoustic noise. The sensitivity of the overall noise to carrier frequency is indicative of the relative dominance of the high-frequency electromagnetic noise over mechanical and aerodynamic components of noise. Based on the measured current and acoustic noise spectra, the ratio of dynamic deflection on the stator surface to the product of fundamental and harmonic current amplitudes is obtained at each operating point. The variation of this ratio of deflection to current product with carrier frequency indicates the resonant frequency clearly and also gives a measure of the amplification of vibration at frequencies close to the resonant frequency. This ratio is useful to predict the magnitude of acoustic noise corresponding to significant time-harmonic currents flowing in the stator winding.
Resumo:
In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values (v(alpha) and v(beta)) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth-and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped wave-form for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept.
Resumo:
Measurement of device current during switching characterisation of an insulated gate bipolar transistor (IGBT) requires a current sensor with low insertion impedance and high bandwidth. This study presents an experimental procedure for evaluating the performance of a coaxial current transformer (CCT), designed for the above purpose. A prototype CCT, which can be mounted directly on a power terminal of a 1200 V/50 A half-bridge IGBT module, is characterised experimentally. The measured characteristics include insertion impedance, gain and phase of the CCT at different frequencies. The bounds of linearity within which the CCT can operate without saturation are determined theoretically, and are also verified experimentally. The experimental study on linearity of the CCT requires a high-amplitude current source. A proportional-resonant (PR) controller-based current-controlled half-bridge inverter is developed for this purpose. A systematic procedure for selection of PR controller parameters is also reported in this study. This set-up is helpful to determine the limit of linearity and also to measure the frequency response of the CCT at realistic amplitudes of current in the low-frequency range.
Resumo:
Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector (SV) structures have advantages like extension of linear modulation range, elimination of fifth and seventh harmonics in phase voltages and currents for the full modulation range including extreme 12-step operation, reduced device voltage ratings, lesser dv/dt stresses on devices and motor phase windings resulting in lower EMI/EMC problems, and lower switching frequency-making it more suitable for high-power drive applications. This paper proposes a simple method to obtain pulsewidth modulation (PWM) timings for a dodecagonal voltage SV structure using only sampled reference voltages. In addition to this, a carrier-based method for obtaining the PWM timings for a general N-level dodecagonal structure is proposed in this paper for the first time. The algorithm outputs the triangle information and the PWM timing values which can be set as the compare values for any carrier-based hardware PWM module to obtain SV PWM like switching sequences. The proposed method eliminates the need for angle estimation, computation of modulation indices, and iterative search algorithms that are typical in multilevel dodecagonal SV systems. The proposed PWM scheme was implemented on a five-level dodecagonal SV structure. Exhaustive simulation and experimental results for steady-state and transient conditions are presented to validate the proposed method.
Resumo:
A split-phase induction motor is fed from two three-phase voltage source inverters for speed control. This study analyses carrier-comparison based pulse width modulation (PWM) schemes for a split-phase motor drive, from a space-vector perspective. Sine-triangle PWM, one zero-sequence injection PWM where the same zero-sequence signal is used for both the inverters, and another zero-sequence injection PWM where different zero-sequence signals are employed for the two inverters are considered. The set of voltage vectors applied, the sequence in which the voltage vectors are applied, and the resulting current ripple vector are analysed for all the PWM methods. Besides all the PWM methods are compared in terms of dc bus utilisation. For the same three-phase sine reference, the PWM method with different zero-sequence signals for the two inverters is found to employ a set of vectors different from the other methods. Both analysis and experimental results show that this method results in lower total harmonic distortion and higher dc bus utilisation than the other two PWM methods.
Resumo:
Highly transparent zinc oxide (ZnO) nanowire networks have been used as the active material in thin film transistors (TFTs) and complementary inverter devices. A systematic study on a range of networks of variable density and TFT channel length was performed. ZnO nanowire networks provide a less lithographically intense alternative to individual nanowire devices, are always semiconducting, and yield significantly higher mobilites than those achieved from currently used amorphous Si and organic TFTs. These results suggest that ZnO nanowire networks could be ideal for inexpensive large area electronics. © 2009 American Institute of Physics.
Resumo:
Com a aprovação do Regimento Interno, ficam assim os trabalhos constitucionais: dia 6/01: publicação do novo Regimento, de 7 a 13 de janeiro, apresentação de emendas.Cada constituinte tem direito a 4 emendas. 14 a 20, o relator dá parecer sobre as emendas, 21 e 22, publicação do parecer, 23 a 25,tempo para pedido de destaques, 26, um dia para requerimento das preferências, 27 de janeiro, votação em Plenário. Aprovado o Regimento, os parlamentares já estão querendo inverter a ordem da votação no Plenário. Eles querem votar em primeiro lugar o mandato do Presidente e o Sistema de Governo. Hoje, durante a Sessão Plenária, já se começou a colher assinaturas para um projeto de resolução que altera a ordem de votação. A ideia está sendo bem recebida pelo grupo dos 32 e pelos partidos de esquerda. No Centrão, nem todos concordam com a antecipação da votação do sistema de governo e do mandato do Presidente. Já o líder do PMDB acha que a antecipação vai ajudar a aprovar a Constituinte mais rapidamente. Entre o Grupo do Entendimento, a antecipação ganha adeptos. O ministro do Exército, declarou que se houver eleições em 1988, eles deveriam ser gerais. Os constituintes reagem à declaração afirmando a soberania da Constituinte.