An efficiency optimization scheme for bidirectional inductive power transfer systems

Unidirectional inductive power transfer (UIPT) systems allow loads to consume power while bidirectional IPT (BIPT) systems are more suitable for loads requiring two way power flow such as vehicle to grid (V2G) applications with electric vehicles (EVs). Many attempts have been made to improve the performance of BIPT systems. In a typical BIPT system, the output power is control using the pickup converter phase shift angle (PSA) while the primary converter regulates the input current. This paper proposes an optimized phase shift modulation strategy to minimize the coil losses of a series – series (SS) compensated BIPT system. In addition, a comprehensive study on the impact of power converters on the overall efficiency of the system is also presented. A closed loop controller is proposed to optimize the overall efficiency of the BIPT system. Theoretical results are presented in comparison to both simulations and measurements of a 0.5 kW prototype to show the benefits of the proposed concept. Results convincingly demonstrate the applicability of the proposed system offering high efficiency over a wide range of output power.

Stability synthesis of power hardware-in-the-loop (PHIL) simulation

A virtual power system can be interfaced with a physical system to form a power hardware-in-the-loop (PHIL) simulation. In this scheme, the virtual system can be simulated in a fast parallel processor to provide near real-time outputs, which then can be interfaced to a physical hardware that is called the hardware under test (HuT). Stable operation of the entire system, while maintaining acceptable accuracy, is the main challenge of a PHIL simulation. In this paper, after an extended stability analysis for voltage and current type interfaces, some guidelines are provided to have a stable PHIL simulation. The presented analysis have been evaluated by performing several experimental tests using a Real Time Digital Simulator (RTDS™) and a voltage source converter (VSC). The practical test results are consistent with the proposed analysis.

Doubly Fed Induction Generators : Overview and Intelligent Control Strategies for Wind Energy Conversion Systems

Adjustable speed induction generators, especially the Doubly-Fed Induction Generators (DFIG) are becoming increasingly popular due to its various advantages over fixed speed generator systems. A DFIG in a wind turbine has ability to generate maximum power with varying rotational speed, ability to control active and reactive by integration of electronic power converters such as the back-to-back converter, low rotor power rating resulting in low cost converter components, etc, DFIG have become very popular in large wind power conversion systems. This chapter presents an extensive literature survey over the past 25 years on the different aspects of DFIG. Application of H8 Controller for enhanced DFIG-WT performance in terms of robust stability and reference tracking to reduce mechanical stress and vibrations is also demonstrated in the chapter.

Application of TS-Fuzzy Controller for Active Power and DC Capacitor Voltage Control in DFIG-Based Wind Energy Conversion Systems

This chapter focuses on the implementation of the TS (Tagaki-Sugino) fuzzy controller for the Doubly Fed Induction Generator (DFIG) based wind generator. The conventional PI control loops for mantaining desired active power and DC capacitor voltage is compared with the TS fuzzy controllers. DFIG system is represented by a third-order model where electromagnetic transients of the stator are neglected. The effectiveness of the TS-fuzzy controller on the rotor speed oscillations and the DC capacitor voltage variations of the DFIG damping controller on converter ratings is also investigated. The results from the time domain simulations are presented to elucidate the effectiveness of the TS-fuzzy controller over the conventional PI controller in the DFIG system. The proposed TS-fuzzy con-troller can improve the fault ride through capability of DFIG compared to the conventional PI controller.

A LIN inspired optical bus for signal isolation in multilevel or modular power electronic converters

Proposed in this paper is a low-cost, half-duplex optical communication bus for control signal isolation in modular or multilevel power electronic converters. The concept is inspired by the Local Interconnect Network (LIN) serial network protocol as used in the automotive industry. The proposed communications bus utilises readily available optical transceivers and is suitable for use with low-cost microcontrollers for distributed control of multilevel converters. As a signal isolation concept, the proposed optical bus enables very high cell count modular multilevel cascaded converters (MMCCs) for high-bandwidth, high-voltage and high-power applications. Prototype hardware is developed and the optical bus concept is validated experimentally in a 33-level MMCC converter operating at 120 Vrms and 60 Hz.

Novel window coupler for the detection of partial discharge activity in GIS

This work investigates the feasibly in using a low noise “C” Band block down-converter as a Ultra High Frequency window coupler for the detection of partial discharge activity from free conducting practices and a protrusion on the high voltage conductor in Gas Insulated Switchgear. The investigated window coupler has a better sensitivity than the internal Ultra High Frequency couplers fitted to the system. The investigated window couplers however are sensitive to changes in the frequency content of the discharge signals and appear to be less sensitive to negative discharges signals produced by a protrusion than the positive discharge signals.

Application of power electronics in improving power quality and supply efficiency of AC traction networks

Major advances in power electronics during recent years have prompted considerable interest within the traction community. The capability of new technologies to reduce the AC railway networks' effect on power quality and improve their supply efficiency is expected to significantly decrease the cost of electric rail supply systems. Of particular interest are Static Frequency Converter (SFC), Rail Power Conditioner (RPC), High Voltage Direct Current (HVDC) and Energy Storage Systems (ESS) solutions. Substantial impacts on future feasibility of railway electrification are anticipated. Aurizon, Australia's largest heavy haul railway operator, has recently commissioned the world's first 50Hz/50Hz SFC installation and is currently investigating SFC, RPC, HVDC and ESS solutions. This paper presents a summary of current and emerging technologies with a particular focus on the potential techno-economic benefits.

Programming an FPGA to Emulate the Dynamics of DC Machines

This paper presents the programming an FPGA (Field Programmable Gate Array) to emulate the dynamics of DC machines. FPGA allows high speed real time simulation with high precision. The described design includes block diagram representation of DC machine, which contain all arithmetic and logical operations. The real time simulation of the machine in FPGA is controlled by user interfaces they are Keypad interface, LCD display on-line and digital to analog converter. This approach provides emulation of electrical machine by changing the parameters. Separately Exited DC machine implemented and experimental results are presented.

Dynamic analysis and simulation of a VSC based Back-to-Back HVDC link

This paper presents the modeling and analysis of a voltage source converter (VSC) based back-to-back (BTB) HVDC link. The case study considers the response to changes in the active and reactive power and disturbance caused by single line to ground (SLG) fault. The controllers at each terminal are designed to inject a variable (magnitude and phase angle) sinusoidal, balanced set of voltages to regulate/control the active and reactive power. It is also possible to regulate the converter bus (AC) voltage by controlling the injected reactive power. The analysis is carried out using both d-q model (neglecting the harmonics in the output voltages of VSC) and three phase detailed model of VSC. While the eigenvalue analysis and controller design is based on the d-q model, the transient simulation considers both models.

A do-it-yourself (DIY) switched mode power conversion laboratory

In the education of physical sciences, the role of the laboratory cannot be overemphasised. It is the laboratory exercises which enable the student to assimilate the theoretical basis, verify the same through bench-top experiments, and internalize the subject discipline to acquire mastery of the same. However the resources essential to put together such an environment is substantial. As a result, the students go through a curriculum which is wanting in this respect. This paper presents a low cost alternative to impart such an experience to the student aimed at the subject of switched mode power conversion. The resources are based on an open source circuit simulator (Sequel) developed at IIT Mumbai, and inexpensive construction kits developed at IISc Bangalore. The Sequel programme developed by IIT Mumbai, is a circuit simulation program under linux operating system distributed free of charge. The construction kits developed at IISc Bangalore, is fully documented for anyone to assemble these circuit which minimal equipment such as soldering iron, multimeter, power supply etc. This paper puts together a simple forward dc to dc converter as a vehicle to introduce the programming under sequel to evaluate the transient performance and small signal dynamic model of the same. Bench tests on the assembled construction kit may be done by the student for study of operation, transient performance and closed loop stability margins etc.

A Proposal for Concurrent Estimation of Static and Dynamic Nonlinearity of ADC

Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

A Proposal for Concurrent Estimation of Static and Dynamic Nonlinearity of ADC

Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

Experimental and Analytical Investigations of the actions taking place in a Synchronous machine during the starting period when the starting Is effected by means of alternating current

The literature on the subject of the present investigation is somewhat meagre. A rotary converter or synchronous motor no! provided with any special starting devices forms, when started from the alternating current side, a type of induction motor whoso Htator is provided with a polyphase winding, and whoso rotor has a single-phase (or single magnetic axis) winding.

A Combination of Hexagonal and 12-Sided Polygonal Voltage Space Vector PWM Control for IM Drives Using Cascaded Two-Level Inverters

This paper proposes a multilevel inverter configuration which produces a hexagonal voltage space vector structure in the lower modulation region and a 12-sided polygonal space vector structure in the overmodulation region. A conventional multilevel inverter produces 6n plusmn 1 (n = odd) harmonics in the phase voltage during overmodulation and in the extreme square-wave mode of operation. However, this inverter produces a 12-sided polygonal space vector location, leading to the elimination of 6n plusmn 1 (n = odd) harmonics in the overmodulation region extending to a final 12-step mode of operation with a smooth transition. The benefits of this arrangement are lower losses and reduced torque pulsation in an induction motor drive fed from this converter at higher modulation indexes. The inverter is fabricated by using three conventional cascaded two-level inverters with asymmetric dc-bus voltages. A comparative simulation study of the harmonic distortion in the phase voltage and associated losses in conventional multilevel inverters and that of the proposed inverter is presented in this paper. Experimental validation on a prototype shows that the proposed converter is suitable for high-power applications because of low harmonic distortion and low losses.