A low-noise low-power noise-adaptive neural amplifier in 0.13um CMOS technology

Chronic recording of neural signals is indispensable in designing efficient brain machine interfaces and in elucidating human neurophysiology. The advent of multichannel microelectrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system is limited by background system noise which varies over time. We propose a neural amplifier in UMC 130 nm, 2P8M CMOS technology. It can be biased adaptively from 200 nA to 2 uA, modulating input referred noise from 9.92 uV to 3.9 uV. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. The amplifier can pass signal from 5 Hz to 7 kHz while rejecting input DC offsets at electrode-electrolyte interface. The bandwidth of the amplifier can be tuned by the pseudo-resistor for selectively recording low field potentials (LFP) or extra cellular action potentials (EAP). The amplifier achieves a mid-band voltage gain of 37 dB and minimizes the attenuation of the signal from neuron to the gate of the input transistor. It is used in fully differential configuration to reject noise of bias circuitry and to achieve high PSRR.

Space vector-based analysis of overmodulation in triangle-comparison based PWM for voltage source inverter

The equivalence of triangle-comparison-based pulse width modulation (TCPWM) and space vector based PWM (SVPWM) during linear modulation is well-known. This paper analyses triangle-comparison based PWM techniques (TCPWM) such as sine-triangle PWM (SPWM) and common-mode voltage injection PWM during overmodulation from a space vector point of view. The average voltage vector produced by TCPWM during overmodulation is studied in the stationary (a-b) reference frame. This is compared and contrasted with the average voltage vector corresponding to the well-known standard two-zone algorithm for space vector modulated inverters. It is shown that the two-zone overmodulation algorithm itself can be derived from the variation of average voltage vector with TCPWM. The average voltage vector is further studied in a synchronously revolving (d-q) reference frame. The RMS value of low-order voltage ripple can be estimated, and can be used to compare harmonic distortion due to different PWM methods during overmodulation. The measured values of the total harmonic distortion (THD) in the line currents are presented at various fundamental frequencies. The relative values of measured current THD pertaining to different PWM methods tally with those of analytically evaluated RMS voltage ripple.

Apparatus and method for heat-run test on high-power PWM converters with low energy expenditure

Before installation, a voltage source converter is usually subjected to heat-run test to verify its thermal design and performance under load. For heat-run test, the converter needs to be operated at rated voltage and rated current for a substantial length of time. Hence, such tests consume huge amount of energy in case of high-power converters. Also, the capacities of the source and loads available in the research and development (R&D) centre or the production facility could be inadequate to conduct such tests. This paper proposes a method to conduct heat-run tests on high-power, pulse width modulated (PWM) converters with low energy consumption. The experimental set-up consists of the converter under test and another converter (of similar or higher rating), both connected in parallel on the ac side and open on the dc side. Vector-control or synchronous reference frame control is employed to control the converters such that one draws certain amount of reactive power and the other supplies the same; only the system losses are drawn from the mains. The performance of the controller is validated through simulation and experiments. Experimental results, pertaining to heat-run tests on a high-power PWM converter, are presented at power levels of 25 kVA to 150 kVA.

DEPRESSION OF MAGNETlCALLY FIXED EMISSION ZONE IN LOW PRESSURE MERCURY ARCS

A transverse magnetic field was used to fix the cathode spot of a low pressure mercury arc with liquid cathode It was noticed that such fixation causes consider-abledepression of the emission zone below the mercury level.This depression varies with the arc current and the magnetic field and is associated with an increase in the arc voltage drop. It indicates appreciable pressure in the emission zone.

Design Of Start-up Power Circuit For Control Power Supplies With Wide Input Voltage Variation

This paper presents the design of a start up power circuit for a control power supply (CPS) which feeds power to the sub-systems of High Power Converters (HPC). The sub-systems such as gate drive card, annunciation card, protection and delay card etc; needs to be provided power for the operation of a HPC. The control power supply (CPS) is designed to operate over a wide range of input voltage from 90Vac to 270Vac. The CPS output supplies power at a desired voltage of Vout =24V to the auxiliary sub-systems of the HPC. During the starting, the power supply to the control circuitry of CPS in turn, is obtained using a separate start-up power supply. This paper discusses the various design issues of the start-up power circuit to ensure that start-up and shut down of the CPS occurs reliably. The CPS also maintains the power factor close to unity and low total harmonic distortion in input current. The paper also provides design details of gate drive circuits employed for the CPS as well as the design of on-board power supply for the CPS. Index terms: control power supply, start-up power supply, DSFC, pre-regulator

Transport properties of CuIn1-xAlxSe2/AZnO heterostructure for low cost thin film photovoltaics

CuIn1-xAlxSe2 (CIASe) thin films were grown by a simple sol-gel route followed by annealing under vacuum. Parameters related to the spin-orbit (Delta(SO)) and crystal field (Delta(CF)) were determined using a quasi-cubic model. Highly oriented (002) aluminum doped (2%) ZnO, 100 nm thin films, were co-sputtered for CuIn1-xAlxSe2/AZnO based solar cells. Barrier height and ideality factor varied from 0.63 eV to 0.51 eV and 1.3186 to 2.095 in the dark and under 1.38 A. M 1.5 solar illumination respectively. Current-voltage characteristics carried out at 300 K were confined to a triangle, exhibiting three limiting conduction mechanisms: Ohms law, trap-filled limit curve and SCLC, with 0.2 V being the cross-over voltage, for a quadratic transition from Ohm's to Child's law. Visible photodetection was demonstrated with a CIASe/AZO photodiode configuration. Photocurrent was enhanced by one order from 3 x 10(-3) A in the dark at 1 V to 3 x 10(-2) A upon 1.38 sun illumination. The optimized photodiode exhibits an external quantum efficiency of over 32% to 10% from 350 to 1100 nm at high intensity 17.99 mW cm(-2) solar illumination. High responsivity R-lambda similar to 920 A W-1, sensitivity S similar to 9.0, specific detectivity D* similar to 3 x 10(14) Jones, make CIASe a potential absorber for enhancing the forthcoming technological applications of photodetection.

Speed control of brushed DC motor for low cost electric cars

As petrol prices are going up in developing countries in upcoming decades low cost electric cars will become more and more popular in developing world. One of the main deciding factors for success of electric cars specially in developing world in upcoming decades will be its cost. This paper shows a cost effective method to control the speed of low cost brushed D.C. motor by combining a IC 555 Timer with a High Boost Converter. The main purpose of using High Boost Converter since electric cars needs high voltage and current which a High Boost Converter can provide even with low battery supply.

A Novel Design Method for SOGI-PLL for Minimum Settling Time and Low Unit Vector Distortion

Phase-locked loops (PLLs) are necessary in grid connected systems to obtain information about the frequency, amplitude and phase of the grid voltage. In stationary reference frame control, the unit vectors of PLLs are used for reference generation. It is important that the PLL performance is not affected significantly when grid voltage undergoes amplitude and frequency variations. In this paper, a novel design for the popular single-phase PLL topology, namely the second-order generalized integrator (SOGI) based PLL is proposed which achieves minimum settling time during grid voltage amplitude and frequency variations. The proposed design achieves a settling time of less than 27.7 ms. This design also ensures that the unit vectors generated by this PLL have a steady state THD of less than 1% during frequency variations of the grid voltage. The design of the SOGI-PLL based on the theoretical analysis is validated by experimental results.

Average Modelling of a Voltage Source Inverter with Dead-Time in a Synchronous Reference Frame

Voltage source inverters are an integral part of renewable power sources and smart grid systems. Computationally efficient and fairly accurate models for the voltage source inverter are required to carry out extensive simulation studies on complex power networks. Accuracy requires that the effect of dead-time be incorporated in the inverter model. The dead-time is essentially a short delay introduced between the gating pulses to the complementary switches in an inverter leg for the safety of power devices. As the modern voltage source inverters switch at fairly high frequencies, the dead-time significantly influences the output fundamental voltage. Dead-time also causes low-frequency harmonic distortion and is hence important from a power quality perspective. This paper studies the dead-time effect in a synchronous dq reference frame, since dynamic studies and controller design are typically carried out in this frame of reference. For the sake of computational efficiency, average models are derived, incorporating the dead-time effect, in both RYB and dq reference frames. The average models are shown to consume less computation time than their corresponding switching models, the accuracies of the models being comparable. The proposed average synchronous reference frame model, including effect of dead-time, is validated through experimental results.

Effect of morphology on electrical treeing in low density polyethylene nanocomposites

Influence of polymer morphology on the inception and the growth of electrical trees in unfilled low density polyethylene (LDPE) as well as LDPE filled with 1, 3 and 5% by weight nanoalumina samples stressed with 50 Hz ac voltage has been studied. It is seen that there is a significant improvement in tree inception voltage with filler loading in LDPE filled with nanoparticles. Tree inception voltage increased with the filler loading up to 3% by weight nanoalumina loading and showed a reduction at 5% by weight loading. Change in tree growth patterns from branch to bush as well as a slower tree growth with increase in filler loading in LDPE alumina nanocomposites were observed. The degree of crystallinity and change in crystalline morphology induced by the presence of alumina nanoparticles in LDPE was studied using differential scanning calorimetry (DSC) and scanning electron microscopy (SEM). DSC results show a similar melting behaviour for both unfilled LDPE and LDPE nanocomposites. However, there is a reduction in the degree of crystallinity for LDPE filled with 5% by weight nanoalumina. An increase in lamellae packing with increase in filler loadings and a highly disordered spherulitic structure for LDPE filled with 5% by weight nanoalumina was observed from the SEM images. The slow propagation of tree growth as well as reduction in tree inception voltage with increase in filler loadings were attributed to the morphological changes observed in the LDPE nanocomposites.

A Gibbs-ensemble based technique for Monte Carlo simulation of electric double layer capacitors (EDLC) at constant voltage

Current methods for molecular simulations of Electric Double Layer Capacitors (EDLC) have both the electrodes and the electrolyte region in a single simulation box. This necessitates simulation of the electrode-electrolyte region interface. Typical capacitors have macroscopic dimensions where the fraction of the molecules at the electrode-electrolyte region interface is very low. Hence, large systems sizes are needed to minimize the electrode-electrolyte region interfacial effects. To overcome these problems, a new technique based on the Gibbs Ensemble is proposed for simulation of an EDLC. In the proposed technique, each electrode is simulated in a separate simulation box. Application of periodic boundary conditions eliminates the interfacial effects. This in addition to the use of constant voltage ensemble allows for a more convenient comparison of simulation results with experimental measurements on typical EDLCs. (C) 2014 AIP Publishing LLC.

Experimental Investigation on Switching Characteristics of High-Current Insulated Gate Bipolar Transistors at Low Currents

Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

New low band gap 2-(4-(trifluoromethyl)phenyl)-1H-benzod]imidazole and benzo1,2-c; 4,5-c `]bis1,2,5]thiadiazole based conjugated polymers for organic photovoltaics

Two new low band gap D-A structured conjugated polymers, PBDTTBI and PBDTBBT, based on 2-(4-(trifluoromethyl)phenyl)-1H-benzod]imidazole and benzo1,2-c; 4,5-c']bis1,2,5]thiadiazole acceptor units with benzo1,2-b; 3,4-b']dithiophene as a donor unit have been designed and synthesized via a Stille coupling reaction. The incorporation of the benzo1,2-c; 4,5-c']bis1,2,5]thiadiazole unit into PBDTBBT has significantly altered the optical and electrochemical properties of the polymer. The optical band gap estimated from the onset absorption edge is similar to 1.88 eV and similar to 1.1 eV, respectively for PBDTTBI and PBDTBBT. It is observed that PBDTBBT exhibited a deeper HOMO energy level (similar to 4.06 eV) with strong intramolecular charge transfer interactions. Bulk heterojunction solar cells fabricated with a configuration of ITO/PEDOT: PSS/PBDTBBT: PC71BM/Al exhibited a best power conversion efficiency of 0.67%, with a short circuit current density of 4.9 mA cm(-2), an open-circuit voltage of 0.54 V and a fill factor of 25%.

An Improved Dead-Time Compensation Scheme for Voltage Source Inverters Considering the Device Switching Transition Times

Inverter dead-time, which is meant to prevent shoot-through fault, causes harmonic distortion and change in the fundamental voltage in the inverter output. Typical dead-time compensation schemes ensure that the amplitude of the fundamental output current is as desired, and also improve the current waveform quality significantly. However, even with compensation, the motor line current waveform is observed to be distorted close to the current zero-crossings. The IGBT switching transition times being significantly longer at low currents than at high currents is an important reason for this zero-crossover distortion. Hence, this paper proposes an improved dead-time compensation scheme, which makes use of the measured IGBT switching transition times at low currents. Measured line current waveforms in a 2.2 kW induction motor drive with the proposed compensation scheme are compared against those with the conventional dead-time compensation scheme and without dead-time compensation. The experimental results on the motor drive clearly demonstrate the improvement in the line current waveform quality with the proposed method.

Temperature dependent current-voltage characteristics of zinc oxide nanowire/polypyrrole nanocomposite

Temperature dependent current-voltage (I-V) measurements of electrochemically prepared zinc oxide nanowire/polypyrrole (ZnONW/PPy) nanocomposite yielded non-linear I-V characteristics at temperatures between 300 and 4.5 K. The low-field conductance (G) of the ZnONW/PPy film exhibits pronounced temperature dependence with room temperature conductance (G(300K)) similar to 10(-3) S and a conductance ratio (G(300)K/G(4.5K)) of similar to 10(4), indicating dominance of significant temperature dependent charge transport processes. The conduction mechanism of the film is satisfactorily understood by extended fluctuation induced tunneling (FIT) model as the non-linear I-V characteristics fit fairly well to the extended FIT model. Further, the temperature dependence of G(o) obtained from fitting followed Sheng's model also. (C) 2014 AIP Publishing LLC.