Electrical properties in vanadyl-phthalocyanine-based metal-insulator-semiconductor devices

We investigated electrical properties of vanadyl phthalocyanine (VOPc) metal-insulator-semiconductor (MIS) devices by the measurement of capacitance and conductance, which were fabricated on ordered para-sexiphenyl (p-6P) layer by weak epitaxy growth method. The VOPc/p-6P MIS diodes showed a negligible hysteresis effect at a gate voltage of +/- 20 V and small hysteresis effect at a gate voltage of +/- 40 V due to the low interface trap state density of about 1x10(10) eV(-1) cm(-2). Furthermore, a high transition frequency of about 10 kHz was also observed under their accumulation mode. The results indicated that VOPc was a promising material and was suitable to be applied in active matrix liquid crystal displays and organic logic circuits.

Capacitive electrolyte-insulator-semiconductor structures functionalised with a polyelectrolyte/enzyme multilayer: New strategy for enhanced field-effect biosensing

A novel strategy for enhanced field-effect biosensing using capacitive electrolyte-insulator-semiconductor (EIS) structures functionalised with pH-responsive weak polyelectrolyte/enzyme or dendrimer/enzyme multilayers is presented. The feasibility of the proposed approach is exemplarily demonstrated by realising a penicillin biosensor based on a capacitive p-Si-SiO(2) EIS structure functionalised with a poly(allylamine hydrochloride) (PAH)/penicillinase and a poly(amidoamine) dendrimer/penicillinase multilayer. The developed sensors response to changes in both the local pH value near the gate surface and the charge of macromolecules induced via enzymatic reaction, resulting in a higher sensitivity. For comparison, an EIS penicillin biosensor with adsorptively immobilised penicillinase has been also studied. The highest penicillin sensitivity of 100 mV/dec has been observed for the EIS sensor functionalised with the PAH/penicillinase multilayer. The lower and upper detection limit was around 20 mu M and 10 mM, respectively. In addition, an incorporation of enzymes in a multilayer prepared by layer-by-layer technique provides a larger amount of immobilised enzymes per sensor area, reduces enzyme leaching effects and thus, enhances the biosensor lifetime (the loss of penicillin sensitivity after 2 months was 10-12%). (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Separating interface state response from parasitic effects in conductance measurements on organic metal-insulator-semiconductor capacitors

A simple model is developed for the admittance of a metal-insulator-semiconductor (MIS) capacitor which includes the effect of a guard ring surrounding the Ohmic contact to the semiconductor. The model predicts most of the features observed in a MIS capacitor fabricated using regioregular poly(3-hexylthiophene) as the active semiconductor and polysilsesquioxane as the gate insulator. In particular, it shows that when the capacitor is driven into accumulation, the parasitic transistor formed by the guard ring and Ohmic contact can give rise to an additional feature in the admittance-voltage plot that could be mistaken for interface states. When this artifact and underlying losses in the bulk semiconductor are accounted for, the remaining experimental feature, a peak in the loss-voltage plot when the capacitor is in depletion, is identified as an interface (or near interface) state of density of similar to 4 x 10(10) cm(-2) eV(-1). Application of the model shows that exposure of a vacuum-annealed device to laboratory air produces a rapid change in the doping density in the channel region of the parasitic transistor but only slow changes in the bulk semiconductor covered by the gold Ohmic contact. (C) 2008 American Institute of Physics.

Determining the interfacial density of states in metal-insulator-semiconductor devices based on poly(3-hexylthiophene)

Low frequency admittance measurements are used to determine the density of interface states in metal-insulator-semiconductor diodes based on the unintentionally doped, p-type semiconductor poly(3-hexylthiophene). After vacuum annealing at 90 degrees C, interface hole trapping states are shown to be distributed in energy with their density decreasing approximately linearly from similar to 20x10(10) to 5x10(10) cm(-2) eV(-1) over an energy range extending from 0.05 to 0.25 eV above the bulk Fermi level. (c) 2008 American Institute of Physics.

Broken symmetry and strangeness of the semiconductor impurity band metal-insulator transition

The filamentary model of the metal-insulator transition in randomly doped semiconductor impurity bands is geometrically equivalent to similar models for continuous transitions in dilute antiferromagnets and even to the λ transition in liquid He, but the critical behaviors are different. The origin of these differences lies in two factors: quantum statistics and the presence of long range Coulomb forces on both sides of the transition in the electrical case. In the latter case, in addition to the main transition, there are two satellite transitions associated with disappearance of the filamentary structure in both insulating and metallic phases. These two satellite transitions were first identified by Fritzsche in 1958, and their physical origin is explained here in geometrical and topological terms that facilitate calculation of critical exponents.

Bistable regime of surface magnetoplasma waves excitation at a semiconductor-metal interface

The theoretical analysis of the bistability associated with the excitation of surface magnetoplasma waves (SWs) propagating across an external magnetic field at the semiconductor-metal interface by the attenuated total reflection (ATR) method is presented. The Kretschmann-Raether configuration of the ATR method is considered, i.e. a plane electromagnetic wave is incident onto a metal surface through a coupling prism. The third-order nonlinearity of the semiconductor medium is considered in the general form using the formalism of the third-order nonlinear susceptibilities and of the perturbation theory. The examples of the nonlinear mechanisms which influence the SW propagation are given. The analytical and numerical analyses show that the realization of bistable regimes of the SW excitation is possible. The SW amplitude values providing bistability in the structure are evaluated and are reasonably low to provide the experimental observation.

Thin nanoporous metal-insulator-metal membranes

Insulating nanoporous materials are promising platforms for soft-ionizing membranes; however, improvement in fabrication processes and the quality and high breakdown resistance of the thin insulator layers are needed for high integration and performance. Here, scalable fabrication of highly porous, thin, silicon dioxide membranes with controlled thickness is demonstrated using plasma-enhanced chemical-vapor-deposition. The fabricated membranes exhibit good insulating properties with a breakdown voltage of 1 × 107 V/cm. Our calculations suggest that the average electric field inside a nanopore of the membranes can be as high as 1 × 106 V/cm; sufficient for ionization of wide range of molecules. These metal–insulator–metal nanoporous arrays are promising for applications such soft ionizing membranes for mass spectroscopy.

Interfaces and traps in pentacene field-effect transistor

The equivalent circuit parameters for a pentacene organic field-effect transistor are determined from low frequency impedance measurements in the dark as well as under light illumination. The source-drain channel impedance parameters are obtained from Bode plot analysis and the deviations at low frequency are mainly due to the contact impedance. The charge accumulation at organic semiconductor-metal interface and dielectric-semiconductor interface is monitored from the response to light as an additional parameter to find out the contributions arising from photovoltaic and photoconductive effects. The shift in threshold voltage is due to the accumulation of photogenerated carriers under source-drain electrodes and at dielectric-semiconductor interface, and also this dominates the carrier transport. The charge carrier trapping at various interfaces and in the semiconductor is estimated from the dc and ac impedance measurements under illumination. (c) 2010 American Institute of Physics. doi: 10.1063/1.3517085]

Nanoscale ZnO/CdS heterostructures with engineered interfaces for high photocatalytic activity under solar radiation

Semiconductor based nanoscale heterostructures are promising candidates for photocatalytic and photovoltaic applications with the sensitization of a wide bandgap semiconductor with a narrow bandgap material being the most viable strategy to maximize the utilization of the solar spectrum. Here, we present a simple wet chemical route to obtain nanoscale heterostructures of ZnO/CdS without using any molecular linker. Our method involves the nucleation of a Cd-precursor on ZnO nanorods with a subsequent sulfidation step leading to the formation of the ZnO/CdS nanoscale heterostructures. Excellent control over the loading of CdS and the microstructure is realized by merely changing the initial concentration of the sulfiding agent. We show that the heterostructures with the lowest CdS loading exhibit an exceptionally high activity for the degradation of methylene blue (MB) under solar irradiation conditions; microstructural and surface analysis reveals that the higher activity in this case is related to the dispersion of the CdS nanoparticles on the ZnO nanorod surface and to the higher concentration of surface hydroxyl species. Detailed analysis of the mechanism of formation of the nanoscale heterostructures reveals that it is possible to obtain deterministic control over the nature of the interfaces. Our synthesis method is general and applicable for other heterostructures where the interfaces need to be engineered for optimal properties. In particular, the absence of any molecular linker at the interface makes our method appealing for photovoltaic applications where faster rates of electron transfer at the heterojunctions are highly desirable.

Rapid thermal processed thin films of niobium pentoxide (Nb2 O5) deposited by reactive magnetron sputtering

Niobium pentoxide thin films have been deposited on silicon and platinum-coated silicon substrates by reactive magnetron sputtering. The as-deposited films were amorphous and showed good electrical properties in terms of a dielectric permittivity of about 30, and leakage current density of 10(-6) A cm(-2) al a field of 120 kV cm(-1). A rapid thermal annealing process at 800 degrees C further increased the dielectric constant to 90 and increased the leakage current density to 5 x 10(-6) A cm(-2). The current-voltage characteristics observed at low and high fields suggested a combination of phenomena at different regimes of applied electric field. The capacitance-voltage characteristics performed in the metal-insulator-semiconductor configuration indicated good electronic interfaces with a nominal trap density of 4.5 x 10(12) cm(-2) eV(-1), which is consistent with the behavior observed with conventional dielectrics such as SiO2 on silicon surfaces.

Analysis of size quantization and temperature effects on the threshold voltage of thin silicon film double-gate metal-oxide-semiconductor field-effect transistor (MOSFET)

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

Design Optimization of Thin-Film Transistors Based on a Metal-Substrate-Semiconductor Architecture for High DC Voltage Sensing

We discuss the potential application of high dc voltage sensing using thin-film transistors (TFTs) on flexible substrates. High voltage sensing has potential applications for power transmission instrumentation. For this, we consider a gate metal-substrate-semiconductor architecture for TFTs. In this architecture, the flexible substrate not only provides mechanical support but also plays the role of the gate dielectric of the TFT. Hence, the thickness of the substrate needs to be optimized for maximizing transconductance, minimizing mechanical stress, and minimizing gate leakage currents. We discuss this optimization, and develop n-type and p-type organic TFTs using polyvinyldene fluoride as the substrate-gate insulator. Circuits are also realized to achieve level shifting, amplification, and high drain voltage operation.