Electrical characterization of poly(amide-imide) for application in organic field effect devices

The admittance spectra and current-voltage (I-V) characteristics are reported of metal-insulator-metal (MIM) and metal-insulator-semiconductor (MIS) capacitors employing cross-linked poly(amide-imide) (c-PAI) as the insulator and poly(3-hexylthiophene) (P3HT) as the active semiconductor. The capacitance of the MIM devices are constant in the frequency range from 10 Hz to 100 kHz, with tan delta values as low as 7 x 10(-3) over most of the range. Except at the lowest voltages, the I-V characteristics are well-described by the Schottky equation for thermal emission of electrons from the electrodes into the insulator. The admittance spectra of the MIS devices displayed a classic Maxwell-Wagner frequency response from which the transverse bulk hole mobility was estimated to be similar to 2 x 10(-5) cm(2) V(-1)s(-1) or similar to 5 x 10(-8) cm(2) V(-1)s(-1) depending on whether or not the surface of the insulator had been treated with hexamethyldisilazane (HMDS) prior to deposition of the P3HT. From the maximum loss observed in admittance-voltage plots, the interface trap density was estimated to be similar to 5 x 10(10) cm(-2) eV(-1) or similar to 9 x 10(10) cm(-2) eV(-1) again depending whether or not the insulator was treated with HMDS. We conclude, therefore, that HMDS plays a useful role in promoting order in the P3HT film as well as reducing the density of interface trap states. Although interposing the P3HT layer between the insulator and the gold electrode degrades the insulating properties of the c-PAI, nevertheless, they remain sufficiently good for use in organic electronic devices. (c) 2012 Elsevier B.V. All rights reserved.

Thermal stability study of AlGaN/GaN MOS-HEMTs using Gd2O3 as gate dielectric

Thermal stability of AlGaN/GaN MOS-HEMTs and -diodes using Gd_(2)O_(3) are investigated by means of different thermal cycles and storage tests up to 500ºC for one week. IV DC and pulsed characteristics of the devices before and after the processes are evaluated and compared with conventional HEMTs. Results show that the devices with Gd_(2)O_(3) dielectric layer have lower leakage current and a more stable behavior during thermal treatment processes compared with conventional devices. In fact, an excellent on/off ratio of about 108 and a stable V_(t) is observed after storage at high temperature. The beneficial effects of Gd_(2)O_(3) on trapping effects of MOS-HEMTs are also dis-cussed.

Microwave Plasma Assisted ALD Development for the Deposition of Gate Oxides & ALD of High-k Dielectrics

The semiconductor industry's urge towards faster, smaller and cheaper integrated circuits has lead the industry to smaller node devices. The integrated circuits that are now under volume production belong to 22 nm and 14 nm technology nodes. In 2007 the 45 nm technology came with the revolutionary high- /metal gate structure. 22 nm technology utilizes fully depleted tri-gate transistor structure. The 14 nm technology is a continuation of the 22 nm technology. Intel is using second generation tri-gate technology in 14 nm devices. After 14 nm, the semiconductor industry is expected to continue the scaling with 10 nm devices followed by 7 nm. Recently, IBM has announced successful production of 7 nm node test chips. This is the fashion how nanoelectronics industry is proceeding with its scaling trend. For the present node of technologies selective deposition and selective removal of the materials are required. Atomic layer deposition and the atomic layer etching are the respective techniques used for selective deposition and selective removal. Atomic layer deposition still remains as a futuristic manufacturing approach that deposits materials and lms in exact places. In addition to the nano/microelectronics industry, ALD is also widening its application areas and acceptance. The usage of ALD equipments in industry exhibits a diversi cation trend. With this trend, large area, batch processing, particle ALD and plasma enhanced like ALD equipments are becoming prominent in industrial applications. In this work, the development of an atomic layer deposition tool with microwave plasma capability is described, which is a ordable even for lightly funded research labs.

Performance and reliability of Gd2O3 and stacked Gd2O3-Eu2O3 metal-insulator-metal capacitors

Gd2O3-based metal-insulator-metal capacitors have been characterized with single layer (Gd2O3) and bilayer (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) stacks for analog and DRAM applications. Although single layer Gd2O3 capacitors provide highest capacitance density (15 fF/mu m(2)), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density (1.2x10(-5) A/cm(2) and 2.7 x 10(-5) A/cm(2) for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at -1 V), improve quadratic voltage coefficient of capacitance (331 ppm/V-2 and 374 ppm/V-2 for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole-Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.

Properties of high k gate dielectric gadolinium oxide deposited on Si(100) by dual ion beam deposition (DIBD)

Gadolinium oxide thin films have been prepared on silicon (100) substrates with a low-energy dual ion-beam epitaxial technique. Substrate temperature was an important factor to affect the crystal structures and textures in an ion energy range of 100-500 eV. The films had a monoclinic Gd2O3 structure with preferred orientation ((4) over bar 02) at low substrate temperatures. When the substrate temperature was increased, the orientation turned to (202), and finally, the cubic structure appeared at the substrate temperature of 700 degreesC, which disagreed with the previous report because of the ion energy. The AES studies found that Gadolinium oxide shared Gd2O3 structures, although there were a lot of oxygen deficiencies in the films, and the XPS results confirmed this. AFM was also used to investigate the surface images of the samples. Finally, the electrical properties were presented. (C) 2004 Elsevier B.V. All rights reserved.

Properties of high k gate dielectric gadolinium oxide deposited on Si(100) by dual ion beam deposition (DIBD)

Gadolinium oxide thin films have been prepared on silicon (100) substrates with a low-energy dual ion-beam epitaxial technique. Substrate temperature was an important factor to affect the crystal structures and textures in an ion energy range of 100-500 eV. The films had a monoclinic Gd2O3 structure with preferred orientation ((4) over bar 02) at low substrate temperatures. When the substrate temperature was increased, the orientation turned to (202), and finally, the cubic structure appeared at the substrate temperature of 700 degreesC, which disagreed with the previous report because of the ion energy. The AES studies found that Gadolinium oxide shared Gd2O3 structures, although there were a lot of oxygen deficiencies in the films, and the XPS results confirmed this. AFM was also used to investigate the surface images of the samples. Finally, the electrical properties were presented. (C) 2004 Elsevier B.V. All rights reserved.

Effect of the work function of gate electrode on hysteresis characteristics of organic thin-film transistors with Ta2O5/polymer as gate insulator

Organic thin-film transistors (OTFTs) using high dielectric constant material tantalum pentoxide (Ta2O5) and benzocyclobutenone (BCBO) derivatives as double-layer insulator were fabricated. Three metals with different work function, including Al (4.3 eV), Cr (4.5 eV) and Au (5.1 eV), were employed as gate electrodes to study the correlation between work function of gate metals and hysteresis characteristics of OTFTs. The devices with low work function metal Al or Cr as gate electrode exhibited high hysteresis (about 2.5 V threshold voltage shift). However, low hysteresis (about 0.7 V threshold voltage shift) OTFTs were attained based on high work function metal Au as gate electrode.

Organic thin-film transistors having inorganic/organic double gate insulators

Bottom-contact organic thin-film transistors (BC OTFTs) based on inorganic/organic double gate insulators were demonstrated. The double gate insulators consisted of tantalum pentoxide (Ta2O5) with high dielectric constant (kappa) as the first gate insulator and octadecyltrichlorosilane (OTS) with low kappa as the second gate insulator. The devices have carrier mobilities larger than 10(-2) cm(2)/V s, on/off current ratio greater than 10(5), and the threshold voltage of -14 V, which is threefold larger field-effect mobility and an order of magnitude larger on/off current ratio than the OTFTs with a Ta2O5 gate insulator. The leakage current was decreased from 2.4x10(-6) to 7.4x10(-8) A due to the introduction of the OTS second dielectric layer. The results demonstrated that using inorganic/organic double insulator as the gate dielectric layer is an effective method to fabricate OTFTs with improved electric characteristics.

Analysis of temperature variation influence on the analog performance of 45 degrees rotated triple-gate nMuGFETs

This work presents the analog performance of n-type triple-gate MuGFETs with high-k dielectrics and TiN gate material fabricated in 45 degrees rotated SOI substrates comparing their performance with standard MuGFETs fabricated without substrate rotation. Different fin widths are studied for temperatures ranging from 250 K up to 400 K. The results of transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and unit-gain frequency are studied. It is observed that the substrate rotation improves the carrier mobility of narrow MuGFETs at any temperature because of the changing in the conduction plane at the sidewalls from (1 1 0) to (1 0 0). For lower temperatures, the improvement of the carrier mobility of rotated MuGFETs is more noticeable as well as the rate of mobility improvement with the temperature decrease is larger. The output conductance is weakly affected by the substrate rotation. Although this improvement in the transconductance of rotated MuGFETs is negligibly transferred to the intrinsic voltage gain, the unity-gain frequency of rotated device is improved due to the larger carrier mobility in the entire range of temperatures studied. (C) 2011 Elsevier Ltd. All rights reserved.

Investigation of electrically active defects at the interface of high-k dielectrics and compound semiconductors

As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion.

Efficient Voltage/Current Spike Reduction by Active Gate Signaling

This paper presents an Active Gate Signaling scheme to reduce voltage/current spikes across insulated gate power switches in hard switching power electronic circuits. Voltage and/or current spikes may cause EMI noise. In addition, they increase voltage/current stress on the switch. Traditionally, a higher gate resistance is chosen to reduce voltage/current spikes. Since the switching loss will increase remarkably, an active gate voltage control scheme is developed to improve efficiency of hard switching circuits while the undesirable voltage and/or current spikes are minimized.

Gate 38

Airports are a place of transition, empty halls of fleeting comings, goings and waitings. 'Gate 38' follows the experience of four groups of young people trapped at this point of departure. As contact with the outside world is cut off, the focus is placed squarely on what they’re doing, and where they’re going. A non-traditional musical set at the end of the world. Commissioned by MacGregor State High School's Centre of Artistic Development, script development included workshops with the CAD class of 2007. No musical score required.

Gate 38

Airports are a place of transition, empty halls of fleeting comings, goings and waitings. 'Gate 38' follows the experience of four groups of young people trapped at this point of departure. As contact with the outside world is cut off, the focus is placed squarely on what they’re doing, and where they’re going. A non-traditional musical set at the end of the world. Commissioned by MacGregor State High School's Centre of Artistic Development, script development included workshops with the CAD class of 2007. No musical score required.

A Fair Go Beyond the School Gate? Systemic factors affecting participation and attainment in tertiary education by Queensland students from LSES backgrounds

The purpose of this project was to conduct an empirical study that would result in findings that inform systemic policy development aimed at improving tertiary participation and attainment by students from low socioeconomic status (LSES) backgrounds in Queensland. The project focuses on systemic policy, initiatives and programs that encourage tertiary education participation and attainment by individuals from LSES backgrounds, rather than on institution-specific initiatives or programs. While the broad remit was to consider tertiary education participation, the study particularly highlights issues pertaining to LSES student participation and attainment in the higher education sector, given the notable under representation of this demographic subgroup in Australian universities. This study supports the strategic priority of addressing professional skills shortages and innovations aiming to improve human and social capital in the state of Queensland. The ultimate goal is to contribute to the enhancement of Queensland’s education and training system by maximising participation and attainment by people from LSES backgrounds in higher education, thereby improving their quality of life and future life choices and opportunities. The study addressed the following five research questions: 1. What are the major factors that promote or inhibit participation and attainment in tertiary education by LSES students in Queensland? 2. To what extent do systemic policies or practices(systemic factors) of Queensland’s tertiary education system promote or inhibit participation and attainment by LSES students? That is, what features of Queensland’s tertiary education system have a significant effect on participation and attainment by LSES students? 3. What system policies or practices are found to boost participation and attainment by LSES students in other jurisdictions? 4. What evidence is there to suggest that policies or practices that have boosted participation and attainment by LSES students in other jurisdictions would be successful if implemented in Queensland? 5. What are the implications of the research findings for Queensland’s tertiary education system to improve participation and attainment by LSES students? The project adopted a mixed methods approach to data collection. A comprehensive review of the literature was conducted to identify relevant state, national and international literature. Both qualitative and quantitative methodologies were used to collect data from a range of key stakeholders.