Open Ensis FSM : Aparato señalador de esgrima basado en LPC1769

Este proyecto desarrolla un aparato señalizador de esgrima o FSM (un dispositivo electrónico capaz de determinar si el arma de un esgrimista ha tocado la superficie válida del otro deportista en las condiciones de tiempo preestablecidas por el reglamento de esgrima), basado en la placa LPC1769 que permite la integración con un software de control remoto mediante un módulo WiFly RN-XV.

Linux com a sistema operatiu de temps real

Avaluació de les capacitats d'assolir requeriments de temps real de la línia principal de nucli de Linux.

Estació meteorològica en xarxa

La present memòria descriu el procés de desenvolupament d'un sistema informàtic autònom amb capacitat per poder capturar algunes dades del nostre entorn i poder-les comunicar mitjançant un protocol d'intercanvi de dades obert a un sistema receptor per tal de realitzar una posterior anàlisis.

Boya

Trabajo de final de carrera incluido en el área de sistemas empotrados sobre una boya oceanográfica costera.

Robot auxiliar de limpieza de suelos doméstico

Desarrollo de un sistema robótico auxiliar de limpieza autónomo en movimiento, conectado a una red wireless, dotado de un sistema de protección contra la perdida de conexión.

Llave electrónica basada en patrones de movimiento

Sistema embebido capaz de almacenar y posteriormente reconocer patrones de movimiento realizados con él y avisar de la detección de un patrón reconocido a otro sistema mediante una conexión TCP/IP vía Wi-Fi.

Alarma per acceleració implementada sobre LPC1769 i controlada des de dispositius Android

Aquest PFC implementa el control d'una alarma activada per acceleració. S'ha realitzat sobre la placa LPC1769 i el sistema FreeRTOS. El projecte permet controlar l'alarma des de dispositius Android, a través d'un servidor intermedi que s'encarrega de la comunicació.

Sistema de iluminación inteligente inalámbrico

Este proyecto crea un sistema de iluminación inteligente compuesto por múltiples dispositivos que, de forma inalámbrica, se sincronizan entre si, para encenderse, apagarse y cambiar el color de la luz ambiente. El sistema se ha diseñado para conectar hasta 8 dispositivos basados en el sistema embebido LPC1769 y S.O. FreeRTOS, integrando un sensor acelerómetro, varios leds de distinto color y un módulo WiFly RN-XV que los interconecta de forma inalámbrica.

Analysis, improvement, and development of new firmware for the smart citizen kit ambient board

The objective of this project was to develop firmware for both the Arduino-compatible boards of the Smart Citizen initiative, and for the RTX4100 low-power WiFi.

Improving transmission reliability of low-power medium access control protocols using average diversity combining

Embedded computer systems equipped with wireless communication transceivers are nowadays used in a vast number of application scenarios. Energy consumption is important in many of these scenarios, as systems are battery operated and long maintenance-free operation is required. To achieve this goal, embedded systems employ low-power communication transceivers and protocols. However, currently used protocols cannot operate efficiently when communication channels are highly erroneous. In this study, we show how average diversity combining (ADC) can be used in state-of-the-art low-power communication protocols. This novel approach improves transmission reliability and in consequence energy consumption and transmission latency in the presence of erroneous channels. Using a testbed, we show that highly erroneous channels are indeed a common occurrence in situations, where low-power systems are used and we demonstrate that ADC improves low-power communication dramatically.

Arquitetura para publicação e universalização do acesso a transdutores inteligentes

Pós-graduação em Engenharia Elétrica - FEIS

Uma API criptográfica para aplicações embarcadas

This document presents GEmSysC, an unified cryptographic API for embedded systems. Software layers implementing this API can be built over existing libraries, allowing embedded software to access cryptographic functions in a consistent way that does not depend on the underlying library. The API complies to good practices for API design and good practices for embedded software development and took its inspiration from other cryptographic libraries and standards. The main inspiration for creating GEmSysC was the CMSIS-RTOS standard, which defines an unified API for embedded software in an implementation-independent way, but targets operating systems instead of cryptographic functions. GEmSysC is made of a generic core and attachable modules, one for each cryptographic algorithm. This document contains the specification of the core of GEmSysC and three of its modules: AES, RSA and SHA-256. GEmSysC was built targeting embedded systems, but this does not restrict its use only in such systems – after all, embedded systems are just very limited computing devices. As a proof of concept, two implementations of GEmSysC were made. One of them was built over wolfSSL, which is an open source library for embedded systems. The other was built over OpenSSL, which is open source and a de facto standard. Unlike wolfSSL, OpenSSL does not specifically target embedded systems. The implementation built over wolfSSL was evaluated in a Cortex- M3 processor with no operating system while the implementation built over OpenSSL was evaluated on a personal computer with Windows 10 operating system. This document displays test results showing GEmSysC to be simpler than other libraries in some aspects. These results have shown that both implementations incur in little overhead in computation time compared to the cryptographic libraries themselves. The overhead of the implementation has been measured for each cryptographic algorithm and is between around 0% and 0.17% for the implementation over wolfSSL and between 0.03% and 1.40% for the one over OpenSSL. This document also presents the memory costs for each implementation.

Memory Hierarchy Hardware-Software Co-design in Embedded Systems

The memory hierarchy is the main bottleneck in modern computer systems as the gap between the speed of the processor and the memory continues to grow larger. The situation in embedded systems is even worse. The memory hierarchy consumes a large amount of chip area and energy, which are precious resources in embedded systems. Moreover, embedded systems have multiple design objectives such as performance, energy consumption, and area, etc. Customizing the memory hierarchy for specific applications is a very important way to take full advantage of limited resources to maximize the performance. However, the traditional custom memory hierarchy design methodologies are phase-ordered. They separate the application optimization from the memory hierarchy architecture design, which tend to result in local-optimal solutions. In traditional Hardware-Software co-design methodologies, much of the work has focused on utilizing reconfigurable logic to partition the computation. However, utilizing reconfigurable logic to perform the memory hierarchy design is seldom addressed. In this paper, we propose a new framework for designing memory hierarchy for embedded systems. The framework will take advantage of the flexible reconfigurable logic to customize the memory hierarchy for specific applications. It combines the application optimization and memory hierarchy design together to obtain a global-optimal solution. Using the framework, we performed a case study to design a new software-controlled instruction memory that showed promising potential.

A Wireless EEG Acquisition Platform based on Embedded Systems

This paper proposes a wireless EEG acquisition platform based on Open Multimedia Architecture Platform (OMAP) embedded system. A high-impedance active dry electrode was tested for improving the scalp- electrode interface. It was used the sigma-delta ADS1298 analog-to-digital converter, and developed a “kernelspace” character driver to manage the communications between the converter unit and the OMAP’s ARM core. The acquired EEG signal data is processed by a “userspace” application, which accesses the driver’s memory, saves the data to a SD-card and transmits them through a wireless TCP/IP-socket to a PC. The electrodes were tested through the alpha wave replacement phenomenon. The experimental results presented the expected alpha rhythm (8-13 Hz) reactiveness to the eyes opening task. The driver spends about 725 μs to acquire and store the data samples. The application takes about 244 μs to get the data from the driver and 1.4 ms to save it in the SD-card. A WiFi throughput of 12.8Mbps was measured which results in a transmission time of 5 ms for 512 kb of data. The embedded system consumes about 200 mAh when wireless off and 400 mAh when it is on. The system exhibits a reliable performance to record EEG signals and transmit them wirelessly. Besides the microcontroller-based architectures, the proposed platform demonstrates that powerful ARM processors running embedded operating systems can be programmed with real-time constrains at the kernel level in order to control hardware, while maintaining their parallel processing abilities in high level software applications.

A petri net based timing model for hardware/software co-design of digital systems

We have recently proposed an extension to Petri nets in order to be able to directly deal with all aspects of embedded digital systems. This extension is meant to be used as an internal model of our co-design environment. After analyzing relevant related work, and presenting a short introduction to our extension as a background material, we describe the details of the timing model we use in our approach, which is mainly based in Merlin's time model. We conclude the paper by discussing an example of its usage. © 2004 IEEE.