School based experiences as contributors to career decision-making: Findings from a cross-sectional survey of high-school students

This paper is based on a study examining the impact of young people’s backgrounds and educational experiences on career choice capability with the aim of informing education policy. A total of 706 students from secondary schools (Years 9-12) in New South Wales, Australia took part in an online survey. This paper focuses on the differences found between groups on the basis of their educational experiences. Participants who were uncertain of their future career plans were more likely to attend non-selective, non-metropolitan schools and were more likely to hold negative attitudes towards school. Career ‘uncertain’ students were also less likely to be satisfied with the elective subjects offered at their school and reported less access to career education sessions. It is concluded that timely career information and guidance should be provided to students and their families in order to allow them to more meaningfully make use of the resources and opportunities available to them with a view toward converting these into real world benefits.

Career paths of educational administrators

Ten superintendents~ 5 male and 5 female~ were randomly selected from a possible 33 males and 9 females in the Niagara and Hamilton regions. The participants were interviewed through a guided interview process coupled with an accounting of their educational and career histories. They were asked to discuss significant aspects of their careers such as the support they had received from families, from mentors and from involvement in networks. The data collected were then analyzed for similarities and differences both within and between the two gender cohorts. Upon analysis, it was found that the female and male administrators possessed differences in their personal backgrounds as well as their career and educational histories. Differences were also found in the perceived role of mentors, and networks. The ways in which the female administrators experienced their careers were found to be quite different from the ways in which the male administrators experienced their careers.

Evaluating a strategic approach to professional development through guided reflection

Research on quality in early childhood has consistently shown that staff are the cornerstone of excellence, and that staff training makes a difference to services provided to children and families. There is also a growing awareness of the importance of adopting a planned approach to career development and that this begins with self-assessment, and can be enhanced through the use of guided reflection with a mentor. The Early Childhood Consortium Victoria (ECCV) at The University of Melbourne, has developed a self-assessment manual (SAM) designed as a tool for early childhood practitioners to explore their work in a strategic way. It serves the dual purposes of assisting practitioners to address issues of service quality, as well as promoting individual professional development through reflective practice. SAM has now been piloted in a number of early childhood settings in Australia and this paper presents a formative evaluation of this work and discusses its potential for professional development planning.

Reflections on multicultural artists' employment and career prospects

This paper analyses multicultural artists' perceptions of their employment and career prospects in the arts. We do this first by reviewing the relatively small body of literature on multicultural artists' careers and supplement that with a literature review of general vocational development literature. Further, we examine the degree to which multicultural artists possess the generic employability skills necessary to gain and retain employment in Australia. We use data from a small-scale qualitative study, conducted in Western Australia, which identified artists' perceptions of barriers to participation in the arts in general and to paid employment in particular. From the literature and studied data, we propose a 'Dual Responsibilities Framework for Career Management of Multicultural Artists'.

En-gendering the nation : gender-bending and nationalism in Miles Franklin's 'My brilliant career' and Emily Lawless's 'Grania: The story of an Island'

Writing in the lee of first-wave feminism and in an era of nation-invention, the Irish Ascendancy novelist, Emily Lawless, and the aggressively Australian Miles Franklin (of Irish, English and German extraction and coming from families who were pastoralists) wrote novels of adolescence, respectively, 'Grania: the Story of an Island' (1892) and 'My Brilliant Career' (1901). Similar and different in many ways, they both wrote as women and self-consciously inserted themselves into nation-inscribing projects with an eye to overseas readerships, and they played fast and loose with class. Curiously, both contributed to the process of transforming 'nowhere-places' into iconic nationalist places: Franklin put the Monaro on the map (a region that was a nationalist icon before the 'Red Centre' usurped its place); and Lawless wrote in ethnographic ways about the Aran Islands more than a decade before J.M. Synge tramped westward in search of the 'Peasant Quality', so beloved of the Abbey Theatre playwrights and audiences. Most compellingly, they wrote of the near-pathologies of masculinities within nationalist agendas, and of marriage and sexuality. This article examines the novels comparatively and contrastively and asks uncomfortable questions about why and how their interventions were untimely.

En-Gendering the Nation: Gender-bending and Nationalism in Miles Franklin’s My Brilliant Career and Emily Lawless’ Grania: the Story of an Island

Writing in the lee of first-wave feminism and in an era of nation-invention, the Irish ascendancy novelist, Emily Lawless, and the aggressively Australian Miles Franklin (of Irish, English and German extraction and coming from families who were pastoralists) wrote novels of adolescence, Grania: The Story of an Island (1892) and My Brilliant Career (1901) respectively. Similar and different in many ways, they both write as women, and self-consciously insert themselves into nation-inscribing projects with an eye to overseas readerships, and they play fast and loose with class. Curiously, both contributed to the process of transforming ‘nowhere-places’ into iconic nationalist places: Franklin put the Monaro on the map (a region that was a nationalist icon before the ‘Red Centre’ usurped its place); and Lawless wrote in ethnographic ways about the Aran Islanders more than a decade before Synge tramped westward in search of the ‘Peasant Quality’ so beloved of the Abbey playwrights and audiences. Most compellingly, they write of the near-pathologies of masculinities within nationalist agendas, and of marriage and sexuality. This paper examines the novels comparatively and contrastively and asks uncomfortable questions about why and how their interventions were untimely.

Preparation of hierarchically structured porous aluminas by a dual soft template method

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Side-Channel Attack Protection Techniques in FPGA Systems using Enhanced Dual-Rail Solutions

Esta tesis doctoral se centra principalmente en técnicas de ataque y contramedidas relacionadas con ataques de canal lateral (SCA por sus siglas en inglés), que han sido propuestas dentro del campo de investigación académica desde hace 17 años. Las investigaciones relacionadas han experimentado un notable crecimiento en las últimas décadas, mientras que los diseños enfocados en la protección sólida y eficaz contra dichos ataques aún se mantienen como un tema de investigación abierto, en el que se necesitan iniciativas más confiables para la protección de la información persona de empresa y de datos nacionales. El primer uso documentado de codificación secreta se remonta a alrededor de 1700 B.C., cuando los jeroglíficos del antiguo Egipto eran descritos en las inscripciones. La seguridad de la información siempre ha supuesto un factor clave en la transmisión de datos relacionados con inteligencia diplomática o militar. Debido a la evolución rápida de las técnicas modernas de comunicación, soluciones de cifrado se incorporaron por primera vez para garantizar la seguridad, integridad y confidencialidad de los contextos de transmisión a través de cables sin seguridad o medios inalámbricos. Debido a las restricciones de potencia de cálculo antes de la era del ordenador, la técnica de cifrado simple era un método más que suficiente para ocultar la información. Sin embargo, algunas vulnerabilidades algorítmicas pueden ser explotadas para restaurar la regla de codificación sin mucho esfuerzo. Esto ha motivado nuevas investigaciones en el área de la criptografía, con el fin de proteger el sistema de información ante sofisticados algoritmos. Con la invención de los ordenadores se ha acelerado en gran medida la implementación de criptografía segura, que ofrece resistencia eficiente encaminada a obtener mayores capacidades de computación altamente reforzadas. Igualmente, sofisticados cripto-análisis han impulsado las tecnologías de computación. Hoy en día, el mundo de la información ha estado involucrado con el campo de la criptografía, enfocada a proteger cualquier campo a través de diversas soluciones de cifrado. Estos enfoques se han fortalecido debido a la unificación optimizada de teorías matemáticas modernas y prácticas eficaces de hardware, siendo posible su implementación en varias plataformas (microprocesador, ASIC, FPGA, etc.). Las necesidades y requisitos de seguridad en la industria son las principales métricas de conducción en el diseño electrónico, con el objetivo de promover la fabricación de productos de gran alcance sin sacrificar la seguridad de los clientes. Sin embargo, una vulnerabilidad en la implementación práctica encontrada por el Prof. Paul Kocher, et al en 1996 implica que un circuito digital es inherentemente vulnerable a un ataque no convencional, lo cual fue nombrado posteriormente como ataque de canal lateral, debido a su fuente de análisis. Sin embargo, algunas críticas sobre los algoritmos criptográficos teóricamente seguros surgieron casi inmediatamente después de este descubrimiento. En este sentido, los circuitos digitales consisten típicamente en un gran número de celdas lógicas fundamentales (como MOS - Metal Oxide Semiconductor), construido sobre un sustrato de silicio durante la fabricación. La lógica de los circuitos se realiza en función de las innumerables conmutaciones de estas células. Este mecanismo provoca inevitablemente cierta emanación física especial que puede ser medida y correlacionada con el comportamiento interno del circuito. SCA se puede utilizar para revelar datos confidenciales (por ejemplo, la criptografía de claves), analizar la arquitectura lógica, el tiempo e incluso inyectar fallos malintencionados a los circuitos que se implementan en sistemas embebidos, como FPGAs, ASICs, o tarjetas inteligentes. Mediante el uso de la comparación de correlación entre la cantidad de fuga estimada y las fugas medidas de forma real, información confidencial puede ser reconstruida en mucho menos tiempo y computación. Para ser precisos, SCA básicamente cubre una amplia gama de tipos de ataques, como los análisis de consumo de energía y radiación ElectroMagnética (EM). Ambos se basan en análisis estadístico y, por lo tanto, requieren numerosas muestras. Los algoritmos de cifrado no están intrínsecamente preparados para ser resistentes ante SCA. Es por ello que se hace necesario durante la implementación de circuitos integrar medidas que permitan camuflar las fugas a través de "canales laterales". Las medidas contra SCA están evolucionando junto con el desarrollo de nuevas técnicas de ataque, así como la continua mejora de los dispositivos electrónicos. Las características físicas requieren contramedidas sobre la capa física, que generalmente se pueden clasificar en soluciones intrínsecas y extrínsecas. Contramedidas extrínsecas se ejecutan para confundir la fuente de ataque mediante la integración de ruido o mala alineación de la actividad interna. Comparativamente, las contramedidas intrínsecas están integradas en el propio algoritmo, para modificar la aplicación con el fin de minimizar las fugas medibles, o incluso hacer que dichas fugas no puedan ser medibles. Ocultación y Enmascaramiento son dos técnicas típicas incluidas en esta categoría. Concretamente, el enmascaramiento se aplica a nivel algorítmico, para alterar los datos intermedios sensibles con una máscara de manera reversible. A diferencia del enmascaramiento lineal, las operaciones no lineales que ampliamente existen en criptografías modernas son difíciles de enmascarar. Dicho método de ocultación, que ha sido verificado como una solución efectiva, comprende principalmente la codificación en doble carril, que está ideado especialmente para aplanar o eliminar la fuga dependiente de dato en potencia o en EM. En esta tesis doctoral, además de la descripción de las metodologías de ataque, se han dedicado grandes esfuerzos sobre la estructura del prototipo de la lógica propuesta, con el fin de realizar investigaciones enfocadas a la seguridad sobre contramedidas de arquitectura a nivel lógico. Una característica de SCA reside en el formato de las fuentes de fugas. Un típico ataque de canal lateral se refiere al análisis basado en la potencia, donde la capacidad fundamental del transistor MOS y otras capacidades parásitas son las fuentes esenciales de fugas. Por lo tanto, una lógica robusta resistente a SCA debe eliminar o mitigar las fugas de estas micro-unidades, como las puertas lógicas básicas, los puertos I/O y las rutas. Las herramientas EDA proporcionadas por los vendedores manipulan la lógica desde un nivel más alto, en lugar de realizarlo desde el nivel de puerta, donde las fugas de canal lateral se manifiestan. Por lo tanto, las implementaciones clásicas apenas satisfacen estas necesidades e inevitablemente atrofian el prototipo. Por todo ello, la implementación de un esquema de diseño personalizado y flexible ha de ser tomado en cuenta. En esta tesis se presenta el diseño y la implementación de una lógica innovadora para contrarrestar SCA, en la que se abordan 3 aspectos fundamentales: I. Se basa en ocultar la estrategia sobre el circuito en doble carril a nivel de puerta para obtener dinámicamente el equilibrio de las fugas en las capas inferiores; II. Esta lógica explota las características de la arquitectura de las FPGAs, para reducir al mínimo el gasto de recursos en la implementación; III. Se apoya en un conjunto de herramientas asistentes personalizadas, incorporadas al flujo genérico de diseño sobre FPGAs, con el fin de manipular los circuitos de forma automática. El kit de herramientas de diseño automático es compatible con la lógica de doble carril propuesta, para facilitar la aplicación práctica sobre la familia de FPGA del fabricante Xilinx. En este sentido, la metodología y las herramientas son flexibles para ser extendido a una amplia gama de aplicaciones en las que se desean obtener restricciones mucho más rígidas y sofisticadas a nivel de puerta o rutado. En esta tesis se realiza un gran esfuerzo para facilitar el proceso de implementación y reparación de lógica de doble carril genérica. La viabilidad de las soluciones propuestas es validada mediante la selección de algoritmos criptográficos ampliamente utilizados, y su evaluación exhaustiva en comparación con soluciones anteriores. Todas las propuestas están respaldadas eficazmente a través de ataques experimentales con el fin de validar las ventajas de seguridad del sistema. El presente trabajo de investigación tiene la intención de cerrar la brecha entre las barreras de implementación y la aplicación efectiva de lógica de doble carril. En esencia, a lo largo de esta tesis se describirá un conjunto de herramientas de implementación para FPGAs que se han desarrollado para trabajar junto con el flujo de diseño genérico de las mismas, con el fin de lograr crear de forma innovadora la lógica de doble carril. Un nuevo enfoque en el ámbito de la seguridad en el cifrado se propone para obtener personalización, automatización y flexibilidad en el prototipo de circuito de bajo nivel con granularidad fina. Las principales contribuciones del presente trabajo de investigación se resumen brevemente a continuación: Lógica de Precharge Absorbed-DPL logic: El uso de la conversión de netlist para reservar LUTs libres para ejecutar la señal de precharge y Ex en una lógica DPL. Posicionamiento entrelazado Row-crossed con pares idénticos de rutado en redes de doble carril, lo que ayuda a aumentar la resistencia frente a la medición EM selectiva y mitigar los impactos de las variaciones de proceso. Ejecución personalizada y herramientas de conversión automática para la generación de redes idénticas para la lógica de doble carril propuesta. (a) Para detectar y reparar conflictos en las conexiones; (b) Detectar y reparar las rutas asimétricas. (c) Para ser utilizado en otras lógicas donde se requiere un control estricto de las interconexiones en aplicaciones basadas en Xilinx. Plataforma CPA de pruebas personalizadas para el análisis de EM y potencia, incluyendo la construcción de dicha plataforma, el método de medición y análisis de los ataques. Análisis de tiempos para cuantificar los niveles de seguridad. División de Seguridad en la conversión parcial de un sistema de cifrado complejo para reducir los costes de la protección. Prueba de concepto de un sistema de calefacción auto-adaptativo para mitigar los impactos eléctricos debido a la variación del proceso de silicio de manera dinámica. La presente tesis doctoral se encuentra organizada tal y como se detalla a continuación: En el capítulo 1 se abordan los fundamentos de los ataques de canal lateral, que abarca desde conceptos básicos de teoría de modelos de análisis, además de la implementación de la plataforma y la ejecución de los ataques. En el capítulo 2 se incluyen las estrategias de resistencia SCA contra los ataques de potencia diferencial y de EM. Además de ello, en este capítulo se propone una lógica en doble carril compacta y segura como contribución de gran relevancia, así como también se presentará la transformación lógica basada en un diseño a nivel de puerta. Por otra parte, en el Capítulo 3 se abordan los desafíos relacionados con la implementación de lógica en doble carril genérica. Así mismo, se describirá un flujo de diseño personalizado para resolver los problemas de aplicación junto con una herramienta de desarrollo automático de aplicaciones propuesta, para mitigar las barreras de diseño y facilitar los procesos. En el capítulo 4 se describe de forma detallada la elaboración e implementación de las herramientas propuestas. Por otra parte, la verificación y validaciones de seguridad de la lógica propuesta, así como un sofisticado experimento de verificación de la seguridad del rutado, se describen en el capítulo 5. Por último, un resumen de las conclusiones de la tesis y las perspectivas como líneas futuras se incluyen en el capítulo 6. Con el fin de profundizar en el contenido de la tesis doctoral, cada capítulo se describe de forma más detallada a continuación: En el capítulo 1 se introduce plataforma de implementación hardware además las teorías básicas de ataque de canal lateral, y contiene principalmente: (a) La arquitectura genérica y las características de la FPGA a utilizar, en particular la Xilinx Virtex-5; (b) El algoritmo de cifrado seleccionado (un módulo comercial Advanced Encryption Standard (AES)); (c) Los elementos esenciales de los métodos de canal lateral, que permiten revelar las fugas de disipación correlacionadas con los comportamientos internos; y el método para recuperar esta relación entre las fluctuaciones físicas en los rastros de canal lateral y los datos internos procesados; (d) Las configuraciones de las plataformas de pruebas de potencia / EM abarcadas dentro de la presente tesis. El contenido de esta tesis se amplia y profundiza a partir del capítulo 2, en el cual se abordan varios aspectos claves. En primer lugar, el principio de protección de la compensación dinámica de la lógica genérica de precarga de doble carril (Dual-rail Precharge Logic-DPL) se explica mediante la descripción de los elementos compensados a nivel de puerta. En segundo lugar, la lógica PA-DPL es propuesta como aportación original, detallando el protocolo de la lógica y un caso de aplicación. En tercer lugar, dos flujos de diseño personalizados se muestran para realizar la conversión de doble carril. Junto con ello, se aclaran las definiciones técnicas relacionadas con la manipulación por encima de la netlist a nivel de LUT. Finalmente, una breve discusión sobre el proceso global se aborda en la parte final del capítulo. El Capítulo 3 estudia los principales retos durante la implementación de DPLs en FPGAs. El nivel de seguridad de las soluciones de resistencia a SCA encontradas en el estado del arte se ha degenerado debido a las barreras de implantación a través de herramientas EDA convencionales. En el escenario de la arquitectura FPGA estudiada, se discuten los problemas de los formatos de doble carril, impactos parásitos, sesgo tecnológico y la viabilidad de implementación. De acuerdo con estas elaboraciones, se plantean dos problemas: Cómo implementar la lógica propuesta sin penalizar los niveles de seguridad, y cómo manipular un gran número de celdas y automatizar el proceso. El PA-DPL propuesto en el capítulo 2 se valida con una serie de iniciativas, desde características estructurales como doble carril entrelazado o redes de rutado clonadas, hasta los métodos de aplicación tales como las herramientas de personalización y automatización de EDA. Por otra parte, un sistema de calefacción auto-adaptativo es representado y aplicado a una lógica de doble núcleo, con el fin de ajustar alternativamente la temperatura local para equilibrar los impactos negativos de la variación del proceso durante la operación en tiempo real. El capítulo 4 se centra en los detalles de la implementación del kit de herramientas. Desarrollado sobre una API third-party, el kit de herramientas personalizado es capaz de manipular los elementos de la lógica de circuito post P&R ncd (una versión binaria ilegible del xdl) convertido al formato XDL Xilinx. El mecanismo y razón de ser del conjunto de instrumentos propuestos son cuidadosamente descritos, que cubre la detección de enrutamiento y los enfoques para la reparación. El conjunto de herramientas desarrollado tiene como objetivo lograr redes de enrutamiento estrictamente idénticos para la lógica de doble carril, tanto para posicionamiento separado como para el entrelazado. Este capítulo particularmente especifica las bases técnicas para apoyar las implementaciones en los dispositivos de Xilinx y su flexibilidad para ser utilizado sobre otras aplicaciones. El capítulo 5 se enfoca en la aplicación de los casos de estudio para la validación de los grados de seguridad de la lógica propuesta. Se discuten los problemas técnicos detallados durante la ejecución y algunas nuevas técnicas de implementación. (a) Se discute el impacto en el proceso de posicionamiento de la lógica utilizando el kit de herramientas propuesto. Diferentes esquemas de implementación, tomando en cuenta la optimización global en seguridad y coste, se verifican con los experimentos con el fin de encontrar los planes de posicionamiento y reparación optimizados; (b) las validaciones de seguridad se realizan con los métodos de correlación y análisis de tiempo; (c) Una táctica asintótica se aplica a un núcleo AES sobre BCDL estructurado para validar de forma sofisticada el impacto de enrutamiento sobre métricas de seguridad; (d) Los resultados preliminares utilizando el sistema de calefacción auto-adaptativa sobre la variación del proceso son mostrados; (e) Se introduce una aplicación práctica de las herramientas para un diseño de cifrado completa. Capítulo 6 incluye el resumen general del trabajo presentado dentro de esta tesis doctoral. Por último, una breve perspectiva del trabajo futuro se expone, lo que puede ampliar el potencial de utilización de las contribuciones de esta tesis a un alcance más allá de los dominios de la criptografía en FPGAs. ABSTRACT This PhD thesis mainly concentrates on countermeasure techniques related to the Side Channel Attack (SCA), which has been put forward to academic exploitations since 17 years ago. The related research has seen a remarkable growth in the past decades, while the design of solid and efficient protection still curiously remain as an open research topic where more reliable initiatives are required for personal information privacy, enterprise and national data protections. The earliest documented usage of secret code can be traced back to around 1700 B.C., when the hieroglyphs in ancient Egypt are scribed in inscriptions. Information security always gained serious attention from diplomatic or military intelligence transmission. Due to the rapid evolvement of modern communication technique, crypto solution was first incorporated by electronic signal to ensure the confidentiality, integrity, availability, authenticity and non-repudiation of the transmitted contexts over unsecure cable or wireless channels. Restricted to the computation power before computer era, simple encryption tricks were practically sufficient to conceal information. However, algorithmic vulnerabilities can be excavated to restore the encoding rules with affordable efforts. This fact motivated the development of modern cryptography, aiming at guarding information system by complex and advanced algorithms. The appearance of computers has greatly pushed forward the invention of robust cryptographies, which efficiently offers resistance relying on highly strengthened computing capabilities. Likewise, advanced cryptanalysis has greatly driven the computing technologies in turn. Nowadays, the information world has been involved into a crypto world, protecting any fields by pervasive crypto solutions. These approaches are strong because of the optimized mergence between modern mathematical theories and effective hardware practices, being capable of implement crypto theories into various platforms (microprocessor, ASIC, FPGA, etc). Security needs from industries are actually the major driving metrics in electronic design, aiming at promoting the construction of systems with high performance without sacrificing security. Yet a vulnerability in practical implementation found by Prof. Paul Kocher, et al in 1996 implies that modern digital circuits are inherently vulnerable to an unconventional attack approach, which was named as side-channel attack since then from its analysis source. Critical suspicions to theoretically sound modern crypto algorithms surfaced almost immediately after this discovery. To be specifically, digital circuits typically consist of a great number of essential logic elements (as MOS - Metal Oxide Semiconductor), built upon a silicon substrate during the fabrication. Circuit logic is realized relying on the countless switch actions of these cells. This mechanism inevitably results in featured physical emanation that can be properly measured and correlated with internal circuit behaviors. SCAs can be used to reveal the confidential data (e.g. crypto-key), analyze the logic architecture, timing and even inject malicious faults to the circuits that are implemented in hardware system, like FPGA, ASIC, smart Card. Using various comparison solutions between the predicted leakage quantity and the measured leakage, secrets can be reconstructed at much less expense of time and computation. To be precisely, SCA basically encloses a wide range of attack types, typically as the analyses of power consumption or electromagnetic (EM) radiation. Both of them rely on statistical analyses, and hence require a number of samples. The crypto algorithms are not intrinsically fortified with SCA-resistance. Because of the severity, much attention has to be taken into the implementation so as to assemble countermeasures to camouflage the leakages via "side channels". Countermeasures against SCA are evolving along with the development of attack techniques. The physical characteristics requires countermeasures over physical layer, which can be generally classified into intrinsic and extrinsic vectors. Extrinsic countermeasures are executed to confuse the attacker by integrating noise, misalignment to the intra activities. Comparatively, intrinsic countermeasures are built into the algorithm itself, to modify the implementation for minimizing the measurable leakage, or making them not sensitive any more. Hiding and Masking are two typical techniques in this category. Concretely, masking applies to the algorithmic level, to alter the sensitive intermediate values with a mask in reversible ways. Unlike the linear masking, non-linear operations that widely exist in modern cryptographies are difficult to be masked. Approved to be an effective counter solution, hiding method mainly mentions dual-rail logic, which is specially devised for flattening or removing the data-dependent leakage in power or EM signatures. In this thesis, apart from the context describing the attack methodologies, efforts have also been dedicated to logic prototype, to mount extensive security investigations to countermeasures on logic-level. A characteristic of SCA resides on the format of leak sources. Typical side-channel attack concerns the power based analysis, where the fundamental capacitance from MOS transistors and other parasitic capacitances are the essential leak sources. Hence, a robust SCA-resistant logic must eliminate or mitigate the leakages from these micro units, such as basic logic gates, I/O ports and routings. The vendor provided EDA tools manipulate the logic from a higher behavioral-level, rather than the lower gate-level where side-channel leakage is generated. So, the classical implementations barely satisfy these needs and inevitably stunt the prototype. In this case, a customized and flexible design scheme is appealing to be devised. This thesis profiles an innovative logic style to counter SCA, which mainly addresses three major aspects: I. The proposed logic is based on the hiding strategy over gate-level dual-rail style to dynamically overbalance side-channel leakage from lower circuit layer; II. This logic exploits architectural features of modern FPGAs, to minimize the implementation expenses; III. It is supported by a set of assistant custom tools, incorporated by the generic FPGA design flow, to have circuit manipulations in an automatic manner. The automatic design toolkit supports the proposed dual-rail logic, facilitating the practical implementation on Xilinx FPGA families. While the methodologies and the tools are flexible to be expanded to a wide range of applications where rigid and sophisticated gate- or routing- constraints are desired. In this thesis a great effort is done to streamline the implementation workflow of generic dual-rail logic. The feasibility of the proposed solutions is validated by selected and widely used crypto algorithm, for thorough and fair evaluation w.r.t. prior solutions. All the proposals are effectively verified by security experiments. The presented research work attempts to solve the implementation troubles. The essence that will be formalized along this thesis is that a customized execution toolkit for modern FPGA systems is developed to work together with the generic FPGA design flow for creating innovative dual-rail logic. A method in crypto security area is constructed to obtain customization, automation and flexibility in low-level circuit prototype with fine-granularity in intractable routings. Main contributions of the presented work are summarized next: Precharge Absorbed-DPL logic: Using the netlist conversion to reserve free LUT inputs to execute the Precharge and Ex signal in a dual-rail logic style. A row-crossed interleaved placement method with identical routing pairs in dual-rail networks, which helps to increase the resistance against selective EM measurement and mitigate the impacts from process variations. Customized execution and automatic transformation tools for producing identical networks for the proposed dual-rail logic. (a) To detect and repair the conflict nets; (b) To detect and repair the asymmetric nets. (c) To be used in other logics where strict network control is required in Xilinx scenario. Customized correlation analysis testbed for EM and power attacks, including the platform construction, measurement method and attack analysis. A timing analysis based method for quantifying the security grades. A methodology of security partitions of complex crypto systems for reducing the protection cost. A proof-of-concept self-adaptive heating system to mitigate electrical impacts over process variations in dynamic dual-rail compensation manner. The thesis chapters are organized as follows: Chapter 1 discusses the side-channel attack fundamentals, which covers from theoretic basics to analysis models, and further to platform setup and attack execution. Chapter 2 centers to SCA-resistant strategies against generic power and EM attacks. In this chapter, a major contribution, a compact and secure dual-rail logic style, will be originally proposed. The logic transformation based on bottom-layer design will be presented. Chapter 3 is scheduled to elaborate the implementation challenges of generic dual-rail styles. A customized design flow to solve the implementation problems will be described along with a self-developed automatic implementation toolkit, for mitigating the design barriers and facilitating the processes. Chapter 4 will originally elaborate the tool specifics and construction details. The implementation case studies and security validations for the proposed logic style, as well as a sophisticated routing verification experiment, will be described in Chapter 5. Finally, a summary of thesis conclusions and perspectives for future work are included in Chapter 5. To better exhibit the thesis contents, each chapter is further described next: Chapter 1 provides the introduction of hardware implementation testbed and side-channel attack fundamentals, and mainly contains: (a) The FPGA generic architecture and device features, particularly of Virtex-5 FPGA; (b) The selected crypto algorithm - a commercially and extensively used Advanced Encryption Standard (AES) module - is detailed; (c) The essentials of Side-Channel methods are profiled. It reveals the correlated dissipation leakage to the internal behaviors, and the method to recover this relationship between the physical fluctuations in side-channel traces and the intra processed data; (d) The setups of the power/EM testing platforms enclosed inside the thesis work are given. The content of this thesis is expanded and deepened from chapter 2, which is divided into several aspects. First, the protection principle of dynamic compensation of the generic dual-rail precharge logic is explained by describing the compensated gate-level elements. Second, the novel DPL is originally proposed by detailing the logic protocol and an implementation case study. Third, a couple of custom workflows are shown next for realizing the rail conversion. Meanwhile, the technical definitions that are about to be manipulated above LUT-level netlist are clarified. A brief discussion about the batched process is given in the final part. Chapter 3 studies the implementation challenges of DPLs in FPGAs. The security level of state-of-the-art SCA-resistant solutions are decreased due to the implementation barriers using conventional EDA tools. In the studied FPGA scenario, problems are discussed from dual-rail format, parasitic impact, technological bias and implementation feasibility. According to these elaborations, two problems arise: How to implement the proposed logic without crippling the security level; and How to manipulate a large number of cells and automate the transformation. The proposed PA-DPL in chapter 2 is legalized with a series of initiatives, from structures to implementation methods. Furthermore, a self-adaptive heating system is depicted and implemented to a dual-core logic, assumed to alternatively adjust local temperature for balancing the negative impacts from silicon technological biases on real-time. Chapter 4 centers to the toolkit system. Built upon a third-party Application Program Interface (API) library, the customized toolkit is able to manipulate the logic elements from post P&R circuit (an unreadable binary version of the xdl one) converted to Xilinx xdl format. The mechanism and rationale of the proposed toolkit are carefully convoyed, covering the routing detection and repairing approaches. The developed toolkit aims to achieve very strictly identical routing networks for dual-rail logic both for separate and interleaved placement. This chapter particularly specifies the technical essentials to support the implementations in Xilinx devices and the flexibility to be expanded to other applications. Chapter 5 focuses on the implementation of the case studies for validating the security grades of the proposed logic style from the proposed toolkit. Comprehensive implementation techniques are discussed. (a) The placement impacts using the proposed toolkit are discussed. Different execution schemes, considering the global optimization in security and cost, are verified with experiments so as to find the optimized placement and repair schemes; (b) Security validations are realized with correlation, timing methods; (c) A systematic method is applied to a BCDL structured module to validate the routing impact over security metric; (d) The preliminary results using the self-adaptive heating system over process variation is given; (e) A practical implementation of the proposed toolkit to a large design is introduced. Chapter 6 includes the general summary of the complete work presented inside this thesis. Finally, a brief perspective for the future work is drawn which might expand the potential utilization of the thesis contributions to a wider range of implementation domains beyond cryptography on FPGAs.

The Impact of Geographic Mobility on Canadian Military families and their Children’s Access Special Education Services

To achieve academic success, children with learning-related disabilities often receive special education supports at school. Currently, Canada does not have a federal department or integrated national system of education. Instead, each province and territory has a separate department or ministry that is responsible for the organization and delivery of education, including special education, at the elementary level. At the macro (national) level, inclusive education is the policy across Canada. However, each province and territory has its own legislation, definitions, and policies mandating special education services. These variations result in little consistency at the micro (individual school) level. Differences between eligibility requirements, supports offered, and delivery methods may present challenges for highly mobile families who must navigate new special education systems on behalf of their children with medical or learning challenges. One of the defining features of the Canadian military lifestyle is geographic mobility. As a result, many families are tasked with navigating new school systems for their children, a task that may be more difficult when children require special education services. The purpose of this study is to explore the impact of geographic mobility on Canadian military families and their children’s access to special education services. The secondary objective was to gain insight into supports that helped facilitate access to services, as well as supports that participants believe would have helped facilitate access. A qualitative approach, interpretive phenomenological analysis (IPA), was employed due to of its focus on individuals’ experiences and their understandings of a particular phenomenon. IPA allowed participants to reflect on the significance of their experiences, while the researcher engaged with these reflections to make sense of the meanings associated with their experiences. Nine semi-structured interviews were conducted with civilian caregivers who have a child with special education needs. An interview guide and probes were used to elicit rich, detailed, first-person accounts of their experiences navigating new special education systems. The main themes that emerged from the participants’ combined experiences addressed the emotional components of experiencing a transition, factors that may facilitate access to special education services, and career implications associated with accessing and maintaining special education services. Findings from the study illustrate that Canadian families experience many, and often times severe, barriers to accessing special education services after a posting. Furthermore, the impacts reported throughout the study echo the existing American literature on geographic mobility and access to special education services. Building on the literature, this study also highlights the need for further research exploring factors that create unique barriers to access in a Canadian context, resulting from the current special education climate, military policies, and military family support services.

Late-career international migration and reproductive work. A comparison between Peruvian and Ukrainian women in the Southern Europe

Research on the relationship between reproductive work and women´s life trajectories including the experience of labour migration has mainly focused on the case of relatively young mothers who leave behind, or later re-join, their children. While it is true that most women migrate at a younger age, there are a significant number of cases of men and women who move abroad for labour purposes at a more advanced stage, undertaking a late-career migration. This is still an under-estimated and under-researched sub-field that uncovers a varied range of issues, including the global organization of reproductive work and the employment of migrant women as domestic workers late in their lives. By pooling the findings of two qualitative studies, this article focuses on Peruvian and Ukrainian women who seek employment in Spain and Italy when they are well into their forties, or older. A commonality the two groups of women share is that, independently of their level of education and professional experience, more often than not they end up as domestic and care workers. The article initially discusses the reasons for late-career female migration, taking into consideration the structural and personal determinants that have affected Peruvian and Ukrainian women’s careers in their countries of origin and settlement. After this, the focus is set on the characteristics of domestic employment at later life, on the impact on their current lives, including the transnational family organization, and on future labour and retirement prospects. Apart from an evaluation of objective working and living conditions, we discuss women’s personal impressions of being domestic workers in the context of their occupational experiences and family commitments. In this regard, women report varying levels of personal and professional satisfaction, as well as different patterns of continuity-discontinuity in their work and family lives, and of optimism towards the future. Divergences could be, to some extent, explained by the effect of migrants´ transnational social practices and policies of states.

Substance use disorder comorbidity with schizophrenia in families of Mexican and Central American Ancestry

artículo -- Universidad de Costa Rica. Centro Investigación en Biología Molecular y Celular, 2010. Este documento es privado debido a limitaciones de derechos de autor.

Are adolescents/young people and their families getting the best service when being cared for by young adolescent student nurses?

The purpose of this presentation is to highlight issues that exist for student nurses who embark on a career in children's nursing at a very young age and subsequently find themselves in a situation where they are expected to deliver high quality care to young people and their families. An introductory sentence indicating the purpose of the presentation: Currently in the UK under the Making a Différence Curriculum (DOH 1999) students can enrol on a single registration programme for Children's Nursing as young as 17.5 years. Children are admitted to hospital onto the children's wards between the ages of 0-16 years (occasionally older). Using Viner's (2003) définition of adolescence as being that period between the ages of ten and twenty-five years when biopsychosocial maturation leads to functional independence in adult iife demonstrates the possibility that both the patients and the nursing students could be undergoing very similar transitional experiences. Historically, in the 1940-50's children were admitted to childrens wards between the ages of 2-12 years. Nurse education at that time tended to be undertaken for first or second level registration in the first instance, followed by post-registration training for specialist areas. Subsequently, the phenomenon of adolescent paediatric nursing students being required to care for adolescents and their families on the children's wards did not exist some 60 years ago. A brief description of the highiights of the présentation: This présentation will focus on adolescent transitions with particular reference to issues that could arise when young students are required to care for young people and their families, particularly when there is a diagnosis of self harm or substance abuse. A summary of findings and/or other relevant information: Preliminary findings have indicated that very young student nurses find caring for adolescents to be particularly challenging. Health issues pertinent to young people appear to présent particular challenges for the students which raises questions in respect of the quality of care that the young people and their families may receive. A conclusion and implications: The following need to be further explored: i) Support within the clinical areas and adequate de-briefing strategies, ii) The efficacy of single registration to children's nursing, iii) Young people and their family's perception of the quality of care they receive from very young students.

Career facilitators and obstacles of Australian football development coaches

Career development is considered integral to the success of individuals, organisations and professions. Coaches play a vital role in the success of sport, yet little is known about their career development. Despite the advances in career development for athletes, there has been very little scholarly attention, nor resources provided for coach career development, especially for coaches working outside elite and professional sport. This pilot study explored the career development facilitators and obstacles of junior development Australian football coaches. Semi-structured interviews were used to collect data on the career development of six practicing junior development Australian football coaches. These six (of only 12 employed) coaches worked in the main elite junior development league for Australian football, the Transport Accident Commission Cup. The themes that emerged from the data revealed that the career development of junior development Australian football coaches was facilitated first by their high motivation to coach because of their enjoyment of seeing young players develop and transition into the elite competition. The second facilitator was the coach’s awareness of their career development needs and their willingness to do their own career development despite limited opportunity, guidance or support. The key obstacles to Transport Accident Commission Cup coach career development included a lack of opportunity to spend time at elite clubs to observe and interact with elite coaches; a lack of time due to having a non-coaching job to financially support their coaching work and their family as well; the high demands of the coaching role had a negative impact on their work–life balance and often conflicted with time they would rather spend with their families; and finally, the lack of institutional support for coaches who were asked to work long hours for low wages and little reward despite their vital role in the elite player development pathway for the Australian Football League. This research suggests that junior development Australian football coaches have a clear understanding of their role and how it changes as their career develops; however, the coaches are limited by external forces in their career development. Junior development Australian football coaches are vital for Australian Football League development; however, there is disconnection between Australian Football League goals and their capacity to nurture elite athletes into the sport’s system due to part-time coaching roles, limited resources and few opportunities for coaches to develop their careers.