Analysis-aware design of embedded systems software

In the past many different methodologies have been devised to support software development and different sets of methodologies have been developed to support the analysis of software artefacts. We have identified this mismatch as one of the causes of the poor reliability of embedded systems software. The issue with software development styles is that they are ``analysis-agnostic.'' They do not try to structure the code in a way that lends itself to analysis. The analysis is usually applied post-mortem after the software was developed and it requires a large amount of effort. The issue with software analysis methodologies is that they do not exploit available information about the system being analyzed.

In this thesis we address the above issues by developing a new methodology, called "analysis-aware" design, that links software development styles with the capabilities of analysis tools. This methodology forms the basis of a framework for interactive software development. The framework consists of an executable specification language and a set of analysis tools based on static analysis, testing, and model checking. The language enforces an analysis-friendly code structure and offers primitives that allow users to implement their own testers and model checkers directly in the language. We introduce a new approach to static analysis that takes advantage of the capabilities of a rule-based engine. We have applied the analysis-aware methodology to the development of a smart home application.

A tool for assessing reconfigurability of distributed manufacturing systems

In recent years, a large number of approaches to developing distributed manufacturing systems has been proposed. One of the principles reasons for these development has been to enhance the reconfigurability of a manufacturing operation; allowing it to readily adapt to changes over time. However, to date, there has only been a limited assessment of the resulting reconfigurability properties and hence it remains inconclusive as to whether a distributed manufacturing system design approach does in fact improve reconfigurability. This paper represents part of a study which investigates this issue. It proposes an assessment tool - the so called "Design Structure Matrix" as a means of assessing the modularity of elements in a manufacturing system. (Modularity has been shown to be a key characteristic of a reconfigurable manufacturing system.) The use of the Design Structure Matrix is illustrated in assessing a robot assembly cell designed on distributed manufacturing system principles. Copyright © 2006 IFAC.

Modular distributed manufacturing systems and the implications for integrated control

Driven by the need for more responsive manufacturing processes and as a consequence of increasing complexity in products and production systems, this short paper introduces a number of developments in the area of modular, distributed manufacturing systems. Requirements for the development of such systems are addressed and, in particular, the relevance to current and future integrated control systems is examined. One of the key issues for integrated control systems in the future is the need to provide support for distributed decision-making in addition to existing distributed control capabilities.

Experimental evaluation of layout designs for 3 × 3 MIMO-enabled radio-over-fiber distributed antenna systems

This paper experimentally demonstrates that, for two representative indoor distributed antenna system (DAS) scenarios, existing radio-over-fiber (RoF) DAS installations can enhance the capacity advantages of broadband 3 × 3 multiple-input-multiple-output (MIMO) radio services without requiring additional fibers or multiplexing schemes. This is true for both single-and multiple-user cases with a single base station and multiple base stations. First, a theoretical example is used to illustrate that there is a negligible improvement in signal-to-noise ratio (SNR) when using a MIMO DAS with all N spatial streams replicated at N RAUs, compared with a MIMO DAS with only one of the N streams replicated at each RAU for N ≤ 4. It is then experimentally confirmed that a 3 × 3 MIMO DAS offers improved capacity and throughput compared with a 3 × 3 MIMO collocated antenna system (CAS) for the single-user case in two typical indoor DAS scenarios, i.e., one with significant line-of-sight (LOS) propagation and the other with entirely non-line-of-sight (NLOS) propagation. The improvement in capacity is 3.2% and 4.1%, respectively. Then, experimental channel measurements confirm that there is a negligible capacity increase in the 3 × 3 configuration with three spatial streams per antenna unit over the 3 × 3 configuration with a single spatial stream per antenna unit. The former layout is observed to provide an increase of ∼1% in the median channel capacity in both the single-and multiple-user scenarios. With 20 users and three base stations, a MIMO DAS using the latter layout offers median aggregate capacities of 259 and 233 bit/s/Hz for the LOS and NLOS scenarios, respectively. It is concluded that DAS installations can further enhance the capacity offered to multiple users by multiple 3 × 3 MIMO-enabled base stations. Further, designing future DAS systems to support broadband 3 × 3 MIMO systems may not require significant upgrades to existing installations for small numbers of spatial streams. © 2013 IEEE.

Cryptographic coprocessors for embedded systems

In the field of embedded systems design, coprocessors play an important role as a component to increase performance. Many embedded systems are built around a small General Purpose Processor (GPP). If the GPP cannot meet the performance requirements for a certain operation, a coprocessor can be included in the design. The GPP can then offload the computationally intensive operation to the coprocessor; thus increasing the performance of the overall system. A common application of coprocessors is the acceleration of cryptographic algorithms. The work presented in this thesis discusses coprocessor architectures for various cryptographic algorithms that are found in many cryptographic protocols. Their performance is then analysed on a Field Programmable Gate Array (FPGA) platform. Firstly, the acceleration of Elliptic Curve Cryptography (ECC) algorithms is investigated through the use of instruction set extension of a GPP. The performance of these algorithms in a full hardware implementation is then investigated, and an architecture for the acceleration the ECC based digital signature algorithm is developed. Hash functions are also an important component of a cryptographic system. The FPGA implementation of recent hash function designs from the SHA-3 competition are discussed and a fair comparison methodology for hash functions presented. Many cryptographic protocols involve the generation of random data, for keys or nonces. This requires a True Random Number Generator (TRNG) to be present in the system. Various TRNG designs are discussed and a secure implementation, including post-processing and failure detection, is introduced. Finally, a coprocessor for the acceleration of operations at the protocol level will be discussed, where, a novel aspect of the design is the secure method in which private-key data is handled

A scalable strategy for the parallelization of multiphysics unstructured mesh-iterative codes on distributed-memory systems

Realizing scalable performance on high performance computing systems is not straightforward for single-phenomenon codes (such as computational fluid dynamics [CFD]). This task is magnified considerably when the target software involves the interactions of a range of phenomena that have distinctive solution procedures involving different discretization methods. The problems of addressing the key issues of retaining data integrity and the ordering of the calculation procedures are significant. A strategy for parallelizing this multiphysics family of codes is described for software exploiting finite-volume discretization methods on unstructured meshes using iterative solution procedures. A mesh partitioning-based SPMD approach is used. However, since different variables use distinct discretization schemes, this means that distinct partitions are required; techniques for addressing this issue are described using the mesh-partitioning tool, JOSTLE. In this contribution, the strategy is tested for a variety of test cases under a wide range of conditions (e.g., problem size, number of processors, asynchronous / synchronous communications, etc.) using a variety of strategies for mapping the mesh partition onto the processor topology.

Parallel mesh partitioning on distributed memory systems

The problem of deriving parallel mesh partitioning algorithms for mapping unstructured meshes to parallel computers is discussed in this chapter. In itself this raises a paradox - we seek to find a high quality partition of the mesh, but to compute it in parallel we require a partition of the mesh. In fact, we overcome this difficulty by deriving an optimisation strategy which can find a high quality partition even if the quality of the initial partition is very poor and then use a crude distribution scheme for the initial partition. The basis of this strategy is to use a multilevel approach combined with local refinement algorithms. Three such refinement algorithms are outlined and some example results presented which show that they can produce very high global quality partitions, very rapidly. The results are also compared with a similar multilevel serial partitioner and shown to be almost identical in quality. Finally we consider the impact of the initial partition on the results and demonstrate that the final partition quality is, modulo a certain amount of noise, independent of the initial partition.

Towards policy-based self-configuration of embedded systems

This paper describes work towards the deployment of flexible self-management into real-time embedded systems. A challenging project which focuses specifically on the development of a dynamic, adaptive automotive middleware is described, and the specific self-management requirements of this project are discussed. These requirements have been identified through the refinement of a wide-ranging set of use cases requiring context-sensitive behaviours. A sample of these use-cases is presented to illustrate the extent of the demands for self-management. The strategy that has been adopted to achieve self-management, based on the use of policies is presented. The embedded and real-time nature of the target system brings the constraints that dynamic adaptation capabilities must not require changes to the run-time code (except during hot update of complete binary modules), adaptation decisions must have low latency, and because the target platforms are resource-constrained the self-management mechanism have low resource requirements (especially in terms of processing and memory). Policy-based computing is thus and ideal candidate for achieving the self-management because the policy itself is loaded at run-time and can be replaced or changed in the future in the same way that a data file is loaded. Policies represent a relatively low complexity and low risk means of achieving self-management, with low run-time costs. Policies can be stored internally in ROM (such as default policies) as well as externally to the system. The architecture of a designed-for-purpose powerful yet lightweight policy library is described. A suitable evaluation platform, supporting the whole life-cycle of feasibility analysis, concept evaluation, development, rigorous testing and behavioural validation has been devised and is described.

Intrinsic measure of diversity gains in generalised distributed antenna systems with cooperative users

The diversity gains achievable in the generalised distributed antenna system with cooperative users (GDAS-CU) are considered. A GDAS-CU is comprised of M largely separated access points (APs) at one side of the link, and N geographically closed user terminals (UTs) at the other side. The UTs are collaborating together to enhance the system performance, where an idealised message sharing among the UTs is assumed. First, geometry-based network models are proposed to describe the topology of a GDAS-CU. The mean cross-correlation coefficients of signals received from non-collocated APs and UTs are calculated based on the network topology and the correlation models derived from the empirical data. The analysis is also extendable to more general scenarios where the APs are placed in a clustered form due to the constraints of street layout or building structure. Subsequently, a generalised signal attenuation model derived from several stochastic ray-tracing-based pathloss models is applied to describe the power-decaying pattern in urban built-up areas, where the GDAS-CU may be deployed. Armed with the cross-correlation and pathloss model preliminaries, an intrinsic measure of cooperative diversity obtainable from a GDAS-CU is then derived, which is the number of independent fading channels that can be averaged over to detect symbols. The proposed analytical framework would provide critical insight into the degree of possible performance improvement when combining multiple copies of the received signal in such systems.

An optimized stereo vision implementation for embedded systems: application to RGB and Infra-Red images

The aim of this paper is to demonstrate the applicability and the effectiveness of a computationally demanding stereo matching algorithm in different lowcost and low-complexity embedded devices, by focusing on the analysis of timing and image quality performances. Various optimizations have been implemented to allow its deployment on specific hardware architectures while decreasing memory and processing time requirements: (1) reduction of color channel information and resolution for input images, (2) low-level software optimizations such as parallel computation, replacement of function calls or loop unrolling, (3) reduction of redundant data structures and internal data representation. The feasibility of a stereovision system on a low cost platform is evaluated by using standard datasets and images taken from Infra-Red (IR) cameras. Analysis of the resulting disparity map accuracy with respect to a full-size dataset is performed as well as the testing of suboptimal solutions

Synchrophasor-Based Islanding Detection for Distributed Generation Systems Using Systematic Principal Component Analysis Approaches

Systematic principal component analysis (PCA) methods are presented in this paper for reliable islanding detection for power systems with significant penetration of distributed generations (DGs), where synchrophasors recorded by Phasor Measurement Units (PMUs) are used for system monitoring. Existing islanding detection methods such as Rate-of-change-of frequency (ROCOF) and Vector Shift are fast for processing local information, however with the growth in installed capacity of DGs, they suffer from several drawbacks. Incumbent genset islanding detection cannot distinguish a system wide disturbance from an islanding event, leading to mal-operation. The problem is even more significant when the grid does not have sufficient inertia to limit frequency divergences in the system fault/stress due to the high penetration of DGs. To tackle such problems, this paper introduces PCA methods for islanding detection. Simple control chart is established for intuitive visualization of the transients. A Recursive PCA (RPCA) scheme is proposed as a reliable extension of the PCA method to reduce the false alarms for time-varying process. To further reduce the computational burden, the approximate linear dependence condition (ALDC) errors are calculated to update the associated PCA model. The proposed PCA and RPCA methods are verified by detecting abnormal transients occurring in the UK utility network.