A miniaturised wideband frequency synthesiser

Wideband frequency synthesisers have application in many areas, including test instrumentation and defence electronics. Miniaturisation of these devices provides many advantages to system designers, particularly in applications where extra space and weight are expensive. The purpose of this project was to miniaturise a wideband frequency synthesiser and package it for operation in several different environmental conditions while satisfying demanding technical specifications. The four primary and secondary goals to be achieved were: 1. an operating frequency range from low MHz to greater than 40 GHz, with resolution better than 1 MHz, 2. typical RF output power of +10 dBm, with maximum DC supply of 15 W, 3. synthesiser package of only 150  100  30 mm, and 4. operating temperatures from 20C to +71C, and vibration levels over 7 grms. This task was approached from multiple angles. Electrically, the system is designed to have as few functional blocks as possible. Off the shelf components are used for active functions instead of customised circuits. Mechanically, the synthesiser package is designed for efficient use of the available space. Two identical prototype synthesisers were manufactured to evaluate the design methodology and to show the repeatability of the design. Although further engineering development will improve the synthesiser’s performance, this project has successfully demonstrated a level of miniaturisation which sets a new benchmark for wideband synthesiser design. These synthesisers will meet the demands for smaller, lighter wideband sources. Potential applications include portable test equipment, radar and electronic surveillance systems on unmanned aerial vehicles. They are also useful for reducing the overall weight and power consumption of other systems, even if small dimensions are not essential.

Development of innovative robust stability enhancement algorithms for distribution systems containing distributed generators

This project was a step forward in improving the voltage profile of traditional low voltage distribution networks with high photovoltaic generation or high peak demand. As a practical and economical solution, the developed methods use a Dynamic Voltage Restorer or DVR, which is a series voltage compensator, for continuous and communication-less power quality enhancement. The placement of DVR in the network is optimised in order to minimise its power rating and cost. In addition, new approaches were developed for grid synchronisation and control of DVR which are integrated with the voltage quality improvement algorithm for stable operation.

Firing delay scheme for 3-Ï thyristor converters

A simple firing delay circuit for 3-φ fully controlled bridge using a phase locked loop is described. The circuit uses very few components and is an improved scheme over the existing methods. The use of this circuit in three-phase thyristor converters and 'circulating current free' mode dual converters is described.

Simple equidistant firing delay scheme for 3-phi thyristor converters

A simple firing delay circuit for 3-φ fully controlled bridge using a phase locked loop is described. The circuit uses very few components and is an improved scheme over the existing methods. The use of this circuit in three-phase thyristor converters and 'circulating current free' mode dual converters is described.

Experimental Study on Substrate Noise Effects of a Pulsed Clocking Scheme on PLL Performance

In this brief, the substrate noise effects of a pulsed clocking scheme on the output spur level, the phase noise, and the peak-to-peak (Pk-Pk) deterministic period jitter of an integer-N charge-pump phase-locked loop (PLL) are demonstrated experimentally. The phenomenon of noise coupling to the PLL is also explained through experiments. The PLL output frequency is 500 MHz and it is implemented in the 0.13-mu m CMOS technology. Measurements show a reduction of 12.53 dB in the PLL output spur level at an offset of 5 MHz and a reduction of 107 ps in the Pk-Pk deterministic period jitter upon reducing the duty cycle of the signal injected into the substrate from 50% to 20%. The results of the analyses suggest that using a pulsed clocking scheme for digital systems in mixed-signal integration along with other isolation techniques helps reduce the substrate noise effects on sensitive analog/radio-frequency circuits.

Timing Recovery Algorithms and Architectures for 2-D Magnetic Recording Systems

We investigate the problem of timing recovery for 2-D magnetic recording (TDMR) channels. We develop a timing error model for TDMR channel considering the phase and frequency offsets with noise. We propose a 2-D data-aided phase-locked loop (PLL) architecture for tracking variations in the position and movement of the read head in the down-track and cross-track directions and analyze the convergence of the algorithm under non-separable timing errors. We further develop a 2-D interpolation-based timing recovery scheme that works in conjunction with the 2-D PLL. We quantify the efficiency of our proposed algorithms by simulations over a 2-D magnetic recording channel with timing errors.

Applications of frequency modulation interference cancellers to multiaccess communications systems

Cancellation of interfering frequency-modulated (FM) signals is investigated with emphasis towards applications on the cellular telephone channel as an important example of a multiple access communications system. In order to fairly evaluate analog FM multiaccess systems with respect to more complex digital multiaccess systems, a serious attempt to mitigate interference in the FM systems must be made. Information-theoretic results in the field of interference channels are shown to motivate the estimation and subtraction of undesired interfering signals. This thesis briefly examines the relative optimality of the current FM techniques in known interference channels, before pursuing the estimation and subtracting of interfering FM signals.

The capture-effect phenomenon of FM reception is exploited to produce simple interference-cancelling receivers with a cross-coupled topology. The use of phase-locked loop receivers cross-coupled with amplitude-tracking loops to estimate the FM signals is explored. The theory and function of these cross-coupled phase-locked loop (CCPLL) interference cancellers are examined. New interference cancellers inspired by optimal estimation and the CCPLL topology are developed, resulting in simpler receivers than those in prior art. Signal acquisition and capture effects in these complex dynamical systems are explained using the relationship of the dynamical systems to adaptive noise cancellers.

FM interference-cancelling receivers are considered for increasing the frequency reuse in a cellular telephone system. Interference mitigation in the cellular environment is seen to require tracking of the desired signal during time intervals when it is not the strongest signal present. Use of interference cancelling in conjunction with dynamic frequency-allocation algorithms is viewed as a way of improving spectrum efficiency. Performance of interference cancellers indicates possibilities for greatly increased frequency reuse. The economics of receiver improvements in the cellular system is considered, including both the mobile subscriber equipment and the provider's tower (base station) equipment.

The thesis is divided into four major parts and a summary: the introduction, motivations for the use of interference cancellation, examination of the CCPLL interference canceller, and applications to the cellular channel. The parts are dependent on each other and are meant to be read as a whole.

Detecção e classificação de VTCDs em sistemas de distribuição de energia elétrica usando redes neurais artificiais.

O objetivo deste trabalho é conhecer e compreender melhor os imprevistos no fornecimento de energia elétrica, quando ocorrem as variações de tensão de curta duração (VTCD). O banco de dados necessário para os diagnósticos das faltas foi obtido através de simulações de um modelo de alimentador radial através do software PSCAD/EMTDC. Este trabalho utiliza um Phase-Locked Loop (PLL) com o intuito de detectar VTCDs e realizar a estimativa automática da frequência, do ângulo de fase e da amplitude das tensões e correntes da rede elétrica. Nesta pesquisa, desenvolveram-se duas redes neurais artificiais: uma para identificar e outra para localizar as VTCDs ocorridas no sistema de distribuição de energia elétrica. A técnica aqui proposta aplica-se a alimentadores trifásicos com cargas desequilibradas, que podem possuir ramais laterais trifásicos, bifásicos e monofásicos. No desenvolvimento da mesma, considera-se que há disponibilidade de medições de tensões e correntes no nó inicial do alimentador e também em alguns pontos esparsos ao longo do alimentador de distribuição. Os desempenhos das arquiteturas das redes neurais foram satisfatórios e demonstram a viabilidade das RNAs na obtenção das generalizações que habilitam o sistema para realizar a classificação de curtos-circuitos.

Localização de faltas de curta duração em redes de distribuição.

O objetivo deste trabalho é contribuir com o desenvolvimento de uma técnica baseada em sistemas inteligentes que possibilite a localização exata ou aproximada do ponto de origem de uma Variação de Tensão de Curta Duração (VTCD) (gerada por uma falta) em um sistema de distribuição de energia elétrica. Este trabalho utiliza um Phase-Locked Loop (PLL) com o intuito de detectar as faltas. Uma vez que a falta é detectada, os sinais de tensão obtidos durante a falta são decompostos em componentes simétricas instantâneas por meio do método proposto. Em seguida, as energias das componentes simétricas são calculadas e utilizadas para estimar a localização da falta. Nesta pesquisa, são avaliadas duas estruturas baseadas em Redes Neurais Artificiais (RNAs). A primeira é projetada para classificar a localização da falta em um dos pontos possíveis e a segunda é projetada para estimar a distância da falta ao alimentador. A técnica aqui proposta aplica-se a alimentadores trifásicos com cargas equilibradas. No desenvolvimento da mesma, considera-se que há disponibilidade de medições de tensões no nó inicial do alimentador e também em pontos esparsos ao longo da rede de distribuição. O banco de dados empregado foi obtido através de simulações de um modelo de alimentador radial usando o programa PSCAD/EMTDC. Testes de sensibilidade empregando validação-cruzada são realizados em ambas as arquiteturas de redes neurais com o intuito de verificar a confiabilidade dos resultados obtidos. Adicionalmente foram realizados testes com faltas não inicialmente contidas no banco de dados a fim de se verificar a capacidade de generalização das redes. Os desempenhos de ambas as arquiteturas de redes neurais foram satisfatórios e demonstram a viabilidade das técnicas propostas para realizar a localização de faltas em redes de distribuição.

PARTIALLY COHERENT DYNAMIC PROGRAMMING ALGORITHM FOR CPM DETECTION.

A dynamic programming algorithm for joint data detection and carrier phase estimation of continuous-phase-modulated signal is presented. The intent is to combine the robustness of noncoherent detectors with the superior performance of coherent ones. The algorithm differs from the Viterbi algorithm only in the metric that it maximizes over the possible transmitted data sequences. This metric is influenced both by the correlation with the received signal and the current estimate of the carrier phase. Carrier-phase estimation is based on decision guiding, but there is no external phase-locked loop. Instead, the phase of the best complex correlation with the received signal over the last few signaling intervals is used. The algorithm is slightly more complex than the coherent Viterbi algorithm but does not require narrowband filtering of the recovered carrier, as earlier appproaches did, to achieve the same level of performance.

Microwave generation in an electro-absorption modulator integrated with a DFB laser subject to optical injection

This paper presents a new technique to generate microwave signal using an electro-absorption modulator (EAM) integrated with a distributed feedback (DFB) laser subject to optical injection. Experiments show that the frequency of the generated microwave can be tuned by changing the wavelength of the external laser or adjusting the bias voltage of the EAM. The frequency response of the EAM is studied and found to be unsmooth due to packaging parasitic effects and four-wave mixing effect occurring in the active layer of the DFB laser. It is also demonstrated that an EA modulator integrated in between two DFB lasers can be used instead of the EML under optical injection. This integrated chip can be used to realize a monolithically integrated tunable microwave source. (C) 2009 Optical Society of America

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

Simple high sensitivity wireless transceiver

This article describes an extremely simple wireless transceiver, comprising of only a low Q VCO and a phase locked loop IC. It is experimentally shown to, simultaneously, transmit an 8-dBm CW interrogation signal, while concurrently demodulating a phase modulated received signal with sensitivity levels of -120 dBm. This makes the performance similar to conventional transceivers, which require complex superheterodyne type architectures and also require a means to provide a high isolation separate the transmit/receive signals (such as a circulator). 

Modulation Insensitive PLL for Tracking Antenna Applications

This article shows practical results of a self-tracking receiving antenna array using a new phase locked loop (PLL) tracking configuration. The PLL configuration differs from other architectures, as it has the new feature of being able to directly track phase modulated signals without requiring an additional unmodulated pilot carrier to be present. The PLLs are used within the antenna array to produce a constant phase intermediate frequency (IF) for each antenna element. These IF's can then be combined in phase, regardless of the angle of arrival of the signal, thus utilizing the antennas array factor. The article's main focus is on the phase jitter performance of the modulation insensitive PLL carrier recovery when tracking phase modulated signals of low signal to noise ratio. From this analysis, it is concluded that the new architecture, when optimally designed, can produce phase jitter performance close to that of a conventional tracking PLL.

SATCOM Retrodirective Array

We present an in depth look at the challenges involved in using analogue retrodirective arrays for satellite communications. The main technical issues surrounding the development of a retrodirective (self-steering) Satellite Communications (SATCOM) system are given and techniques for mitigating these issues provided. Detailed results are given for a prototype high performance circularly polarized retrodirective array architecture suitable for mounting on an un-stabilized mobile platform. The paper concludes with practical retrodirective L-band array results with the array used to acquire actual broadband satellite data signals from a commercial L-band satellite system. Received satellite signals as low as -130dBm at the antenna elements are tracked. Accurate self-tracking occurs over the azimuth range of up to +/- 40 degrees.