914 resultados para Dryden, John, 1631-1700.
Resumo:
This edition of Milton’s Epistolarum Familiarium Liber Unus and of his Uncollected Letters, will appear as 672 pp. of The Complete Works of John Milton Volume XI, eds. Gordon Campbell and Edward Jones (Oxford University Press, forthcoming 2016). A diplomatic Latin text and a new facing English translation are complemented by a detailed Introduction and commentary that situate Milton’s Latin letters in relation to the classical, pedagogical and essentially humanist contexts at the heart of their composition. Now the art of epistolography advocated and exemplified by Cicero and Quintilian and embraced by Renaissance pedagogical manuals is read through a humanist filter whereby, via the precedent (and very title) of Epistolae Familiares, the Miltonic Liber is shown to engage with a neo-Latin re-invention of the classical epistola that had come to birth in quattrocento Italy in the letters of Petrarch and his contemporaries. At the same time the Epistolae are seen as offering fresh insight into Milton’s views on education, philology, his relations with Italian literati, his blindness, the poetic dimension of his Latin prose, and especially his verbal ingenuity as the ‘words’ of Latin ‘Letters’ become a self-conscious showcasing of etymological punning on the ‘letters’ of Latin ‘words’. The edition also announces several new discoveries, most notably its uncovering and collation of a manuscript of Henry Oldenburg’s transcription (in his Liber Epistolaris held in Royal Society, London) of Milton’s Ep. Fam. 25 (to Richard Jones). Oldenburg’s transcription (from the original sent to his pupil Jones) is an important find, given the loss of all but two of the manuscripts of Milton’s original Latin letters included in the 1674 volume. The edition also presents new evidence in regard to Milton’s relationships with the Italian philologist Benedetto Buonmattei, the Greek humanist Leonard Philaras, the radical pastor Jean Labadie (and the French church of London), and the elusive Peter Heimbach.
Resumo:
The United Nations Convention on the Rights of the Child (UNCRC) acknowledges that young people without parental care are entitled to special support and assistance from the State. In detailing their expectations, the UN Committee have issued Guidelines for the Alternative Care of Children which recognise that State parties have a number of responsibilities towards care leavers. The paper explores how the UNCRC reporting process, and guidelines from the Committee outlining how States should promote the rights of young people making the transition from care to adulthood, can be used as an instrument to track global patterns of change in policy and practice. Content analysis of State Party Reports and Concluding Observations from 15 countries reveals that to date there has been limited engagement with understanding and promoting the needs of this group in the reporting process; although where a government is committed to developing legislation and practice then this does find its way into their national reports. Data supplied by affiliates of the International Research Network on Transitions to Adulthood from Care (INTRAC) reveals that national concerns, political ideology, public awareness, attitudes and knowledge of the vulnerability of care leavers influence service responses to protect and promote the rights of this group and the attention afforded to such issues in reports to the Committee. Findings also suggest that global governance is not simply a matter of top down influence. Future work on both promoting and monitoring of the impact of the UNCRC needs to recognise that what is in play is the management of a complex global/national dynamic with all its uneven development, levels of influence and with a range of institutional actors involved.
Resumo:
Sphere Decoding (SD) is a highly effective detection technique for Multiple-Input Multiple-Output (MIMO) wireless communications receivers, offering quasi-optimal accuracy with relatively low computational complexity as compared to the ideal ML detector. Despite this, the computational demands of even low-complexity SD variants, such as Fixed Complexity SD (FSD), remains such that implementation on modern software-defined network equipment is a highly challenging process, and indeed real-time solutions for MIMO systems such as 4 4 16-QAM 802.11n are unreported. This paper overcomes this barrier. By exploiting large-scale networks of fine-grained softwareprogrammable processors on Field Programmable Gate Array (FPGA), a series of unique SD implementations are presented, culminating in the only single-chip, real-time quasi-optimal SD for 44 16-QAM 802.11n MIMO. Furthermore, it demonstrates that the high performance software-defined architectures which enable these implementations exhibit cost comparable to dedicated circuit architectures.
Resumo:
A methodology which allows a non-specialist to rapidly design silicon wavelet transform cores has been developed. This methodology is based on a generic architecture utilizing time-interleaved coefficients for the wavelet transform filters. The architecture is scaleable and it has been parameterized in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is designed in such a way that the cores can also be cascaded without any interface glue logic for any desired level of decomposition. This parameterization allows the use of any orthonormal wavelet family thereby extending the design space for improved transformation from algorithm to silicon. Case studies for stand alone and cascaded silicon cores for single and multi-stage analysis respectively are reported. The typical design time to produce silicon layout of a wavelet based system has been reduced by an order of magnitude. The cores are comparable in area and performance to hand-crafted designs. The designs have been captured in VHDL so they are portable across a range of foundries and are also applicable to FPGA and PLD implementations.
Resumo:
A generator for the automated design of Discrete Cosine Transform (DCT) cores is presented. This can be used to rapidly create silicon circuits from a high level specification. These compare very favourably with existing designs. The DCT cores produced are scaleable in terms of point size as well as input/output and coefficient wordlengths. This provides a high degree of flexibility. An example, 8-point 1D DCT design, produced occupies less than 0.92 mm when implemented in a 0.35µ double level metal CMOS technology. This can be clocked at a rate of 100MHz.