949 resultados para Embedded processor


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Thesis (Master's)--University of Washington, 2016-06

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A specialised reconfigurable architecture is targeted at wireless base-band processing. It is built to cater for multiple wireless standards. It has lower power consumption than the processor-based solution. It can be scaled to run in parallel for processing multiple channels. Test resources are embedded on the architecture and testing strategies are included. This architecture is functionally partitioned according to the common operations found in wireless standards, such as CRC error correction, convolution and interleaving. These modules are linked via Virtual Wire Hardware modules and route-through switch matrices. Data can be processed in any order through this interconnect structure. Virtual Wire ensures the same flexibility as normal interconnects, but the area occupied and the number of switches needed is reduced. The testing algorithm scans all possible paths within the interconnection network exhaustively and searches for faults in the processing modules. The testing algorithm starts by scanning the externally addressable memory space and testing the master controller. The controller then tests every switch in the route-through switch matrix by making loops from the shared memory to each of the switches. The local switch matrix is also tested in the same way. Next the local memory is scanned. Finally, pre-defined test vectors are loaded into local memory to check the processing modules. This paper compares various base-band processing solutions. It describes the proposed platform and its implementation. It outlines the test resources and algorithm. It concludes with the mapping of Bluetooth and GSM base-band onto the platform.

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We present experimental results on the measurement of fidelity decay under contrasting system dynamics using a nuclear magnetic resonance quantum information processor. The measurements were performed by implementing a scalable circuit in the model of deterministic quantum computation with only one quantum bit. The results show measurable differences between regular and complex behavior and for complex dynamics are faithful to the expected theoretical decay rate. Moreover, we illustrate how the experimental method can be seen as an efficient way for either extracting coarse-grained information about the dynamics of a large system or measuring the decoherence rate from engineered environments.

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We propose an asymmetric multi-processor SoC architecture, featuring a master CPU running uClinux, and multiple loosely-coupled slave CPUs running real-time threads assigned by the master CPU. Real-time SoC architectures often demand a compromise between a generic platform for different applications, and application-specific customizations to achieve performance requirements. Our proposed architecture offers a generic platform running a conventional embedded operating system providing a traditional software-oriented development approach, while multiple slave CPUs act as a dedicated independent real-time threads execution unit running in parallel of master CPU to achieve performance requirements. In this paper, the architecture is described, including the application / threading development environment. The performance of the architecture with several standard benchmark routines is also analysed.

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This paper focusses on attracting and retaining young people into technical disciplines. It introduces a new model of technical education from age 14 that the UK Government initiated in 2008. A concept of University led Technical Colleges (UTCs) for 14-19 year olds. These state supported schools, sponsored by a University, have technical curricula, technologically enabled learning environments and strong engagement with employers. As new schools they have been able to recruit outstanding staff that are conversant with the use of technology to enhance learning and all students have their own iPads. The Aston University Engineering Academy opened in September 2012 and a recent survey of staff, students and parents has provided both qualitative and quantitative data on the benefits to motivation and learning of these embedded iPads. The devices have also had advantages for the management of data on student achievement from a leadership, teaching staff and parental view point.

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A long-period grating (LPG) was written into a progressive three-layered single-mode fiber that was embedded into a flexible platform as a curvature sensor. The spectral location and profile of the LPGs were unaltered after implantation in the platform. The curvature sensitivity was 3.747 nm m with a resolution of ± 1.1 × 10-2 m-1. The bend sensor is intended to be part of a respiratory monitoring system and was tested on a resuscitation training manikin. © 2003 society of Photo-Optical Instrumentation Engineers.

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Smart structure sensors based on embedded fibre Bragg grating (FBG) arrays in aluminium alloy matrix by ultrasonic consolidation (UC) technique have been proposed and demonstrated successfully. The temperature, loading and bending responses of the embedded FBG arrays have been systematically characterized. The embedded FBGs exhibit an average temperature sensitivity of ~36 pm °C-1, which is three times higher than that of normal FBGs, a bending sensitivity of 0.73 nm/m-1 and a loading responsivity of ~0.1 nm kg-1 within the dynamic range from 0 kg to 3 kg. These initial experimental results clearly demonstrate that the UC produced metal matrix structures can be embedded with FBG sensor arrays to become smart structures with capabilities to monitor the structure operation and health conditions in applications.