A multiple intelligences theory-based 3D virtual lab environment for digital systems teaching.

This paper describes a 3D virtual lab environment that was developed using OpenSim software integrated into Moodle. Virtuald software tool was used to provide pedagogical support to the lab by enabling to create online texts and delivering them to the students. The courses taught in this virtual lab are methodologically in conformity to theory of multiple intelligences. Some results are presented.

Bacteriocinogenic LAB from cheeses - Application in biopreservation?

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Influence of CAD-CAM diamond bur deterioration on surface roughness and maximum failure load of Y-TZP-based restorations

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Effects of plant regulators on the growth and flowering of Saint Augustine grass plants

The objective of this work was to evaluate the effects of three plant growth inhibitors on the development and emission of floral rachis of Saint Augustine grass [Stenotaphrum secundatum (Walt.) Kuntzel] plants. The study was carried out in a 15 month old lawn with the experimental plots being distributed in accordance with a complete randomized block design with four replications. The treatments consisted of sole application of trinexapac-ethyl (113, 226, 452, 678, and 904 g ai ha(-1)), prohexadione-calcium (100 and 200 g ai ha(-1)), and bispyribac-sodium (40 and 60 g ai ha(-1)) plus a check treatment in which the plants were not submitted to any of the plant growth inhibitors. The effects of those products were evaluated in terms of visual signs of plant intoxication, plant height, emission and height of floral rachises, and chip total dry matter production. All the plant growth inhibitors resulted in visible injury to the plants but these intoxication signs practically disappeared 28 days after the application. Trinexapac-ethyl at the dose of 904 g ai ha(-1) reduced plant height by 59.7%, the emission of floral rachis by 96.4%, and the amount of chip dry matter production by 87.7%. Plant growth inhibitors may reduce the number of times of lawn plants cutting up to 119 days after their application with no harmful effects on the plants visual aspect.

Effect of different solutions on color stability of acrylic resin-based dentures

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Influence of Nd:YAG or Er:YAG laser surface treatment on microtensile bond strength of indirect resin composites to resin cement. Lasers surface treatment of indirect resin composites

This study evaluated the influence of the surface pretreatment of indirect resin composite (Signum, Admira Lab and Sinfony) on the microtensile bond strength of a resin cement. Sixty samples made of each brand were divided into 6 groups, according to surface treatment: (1) control; (2) controlled-air abrasion with Al2O3; (3) Er:YAG Laser 200 mJ, 10 Hz, for 10s; (4) Er: YAG Laser 300 mJ, 10 Hz, for 10 s; (5) Nd:YAG 80 mJ, S15Hz for 1 min; (6) Nd:YAG 120mJ, 15 Hz for 1 min. After treatments, all the groups received an application of 37% phosphoric acid and adhesive. The pair of blocks of the same brand were cemented to each other with dual resin cement. The blocks were sectioned to obtain resin-resin sticks (1 x1 mm) and analyzed by microtensile bond testing. The bond strength values were statistically different, irrespective of the surface treatment performed, with highest values for Sinfony (43.81 MPa) and lowest values for Signum (32.33 MPA). The groups treated with the Nd:YAG laser showed the lowest bond strength values and power did not interfere in the results, both for Nd:YAG laser and Er:YAG. Controlled-air abrasion with Al203 is an efficient surface treatment method and the use of the Nd:YAG and Er:YAG lasers reduced bond strength, irrespective of the intensity of energy used.

Osmotic potentials on water uptake and germination of Guazuma ulmifolia Lam. (Sterculiaceae) seeds

Osmotic potentials on water uptake and germination of Guazuma Ulmifolia Lam. (Sterculiaceae) seeds. This work was carried out in the Germination Lab. of the Department of Botany, Institute of Biosciences, São Paulo State University (UNESP), Botucatu, São Paulo State, Brazil. The aims of this work were to determine the water uptake curve and to evaluate the germination of Guazuma ulmifolia seeds subjected to different water potentials. For the water uptake curve, seven replicates of 50 pre-scarified seeds were placed onto paper moistened with 15 mL PEG 6000 solution under the potentials 0 (control), -0.3 and -0.6 MPa at 25o C in the darkness. For the germination assay, four replicates of 50 seeds were subjected to the same above-described conditions; however, one lot of seeds was modified when there was variation in the refractometric index, whereas the remaining ones were kept in the same solutions until the end of the experiment. All three phases of water uptake were detected under 0 and -0.3 MPa; however, phase II was prolonged under -0.6 MPa and germination was not observed. For 0 and -0.3 MPa, the adopted statistical models consisted of asymptotic (phases I and II) and exponential (phase III) functions, y = a*[1 - b*exp (-c*t) + exp (-d + e*(t - t0)]. For -0.6MPa, only the asymptotic function y = a* [1 - b* exp (-c*t)] was used since there was no evidence of germination. The germination final percentage and speed index were lower under -0.3 MPa, mainly when solutions were not replaced; besides, germination was not detected under -0.6 MPa, with or without solution replacement.

Dependence of brittle-to-ductile transition on crystallographic direction in diamond turning of single-crystal silicon

The objective of this paper is to show the dependence relationship between the crystallographic orientations upon brittle-to-ductile transition during diamond turning of monocrystalline silicon. Cutting tests were performed using a -5 degrees rake angle round nose diamond tool at different machining scales. At the micrometre level, the feedrate was kept constant at 2.5 micrometres per revolution (mu m/r), and the depth of cut was varied from 1 to 5 mu m. At the submicrometre level, the depth of cut was kept constant at 500 nm and the feedrate varied from 5 to 10 mu m/r. At the micrometre level, the uncut shoulder generated with an interrupted cutting test procedure provided a quantitative measurement of the ductile-to-brittle transition. Results show that the critical chip thickness in silicon for ductile material removal reaches a maximum of 285 nm in the [100] direction and a minimum of 115 nm in the [110] direction, when the depth of cut was 5 mu m. It was found that when a submicrometre depth of cut was applied, microcracks were revealed in the [110] direction, which is the softer direction in silicon. Micro Raman spectroscopy was used to estimate surface residual stress after machining. Compressive residual stress in the range 142 MPa and smooth damage free surface finish was probed in the [100] direction for a depth of cut of 5 mu m, whereas residual stresses in the range 350 MPa and brittle damage was probed in the [110] direction for a depth of cut of 500 nm.

The impact of medical education and networking on the outcome of leukemia treatment in developing countries. The experience of International Consortium on Acute Promyelocytic Leukemia (IC-APL)

Objectives: Several clinical trials conducted in Europe and US reported favorable outcomes of patients with APL treated with the combination of all trans retinoic acid (ATRA) and anthracyclines. Nevertheless, the results observed in developing countries with the same regimen was poorer, mainly due to high early mortality mainly due bleeding. The International Consortium on Acute Promyelocytic Leukemia (IC-APL) is an initiative of the International Members Committee of the ASH and the project aims to reduce this gap through the establishment of international network, which was launched in Brazil, Mexico and Uruguay. Methods: The IC-APL treatment protocol is similar to the PETHEMA 2005, but changing idarubicin to daunorubicin. All patients with a suspected diagnosis of APL were immediately started on ATRA, while bone marrow samples were shipped to a national central lab where genetic verification of the diagnosis was performed. The immunofluorescence using an anti-PML antibody allowed a rapid confirmation of the diagnosis and, the importance of supportive measures was reinforced. Results: The interim analysis of 97 patients enrolled in the IC-APL protocol showed that complete remission (CR) rate was 83% and the 2-year overall survival and disease-free survival were 80% and 90%, respectively. Of note, the early mortality rate was reduced to 7.5%. Discussion: The results of IC-APL demonstrate the impact of educational programs and networking on the improvement of the leukemia treatment outcome in developing countries.

Evaluation of the probiotic potential and effect of encapsulation on survival for Lactobacillus plantarum ST16Pa isolated from papaya

Capability to produce antilisterial bacteriocins by lactic acid bacteria (LAB) can be explored by the food industry as a tool to increase the safety of foods. Furthermore, probiotic activity of bacteriogenic LAB brings extra advantages to these strains, as they can confer health benefits to the consumer. Beneficial effects depend on the ability of the probiotic strains to maintain viability in the food during shelf-life and to survive the natural defenses of the host and multiply in the gastrointestinal tract (GIT). This study evaluated the probiotic potential of a bacteriocinogenic Lactobacillus plantarum strain (Lb. plantarum ST16Pa) isolated from papaya fruit and studied the effect of encapsulation in alginate on survival in conditions simulating the human GIT. Good growth of Lb. plantarum ST16Pa was recorded in MRS broth with initial pH values between 5.0 and 9.0 and good capability to survive in pH 4.0, 11.0 and 13.0. Lb. plantarum ST16Pa grew well in the presence of oxbile at concentrations ranging from 0.2 to 3.0%. The level of auto-aggregation was 37%, and various degrees of co-aggregation were observed with different strains of Lb. plantarum, Enterococcus spp., Lb. sakei and Listeria, which are important features for probiotic activity. Growth was affected negatively by several medicaments used for human therapy, mainly anti-inflammatory drugs and antibiotics. Adhesion to Caco-2 cells was within the range reported for other probiotic strains, and PCR analysis indicated that the strain harbored the adhesion genes mapA, mub and EF-Tu. Encapsulation in 2, 3 and 4% alginate protected the cells from exposure to 1 or 2% oxbile added to MRS broth. Studies in a model simulating the transit through the GIT indicated that encapsulated cells were protected from the acidic conditions in the stomach but were less resistant when in conditions simulating the duodenum, jejunum, ileum and first section of the colon. To our knowledge, this is the first report on a bacteriocinogenic LAB isolated from papaya that presents application in food biopreservation and may be beneficial to the consumer health due to its potential probiotic characteristics.

Thermal analysis of the chip formation in austenitic stainless steel

The most important property of austenitic stainless steels is corrosion resistance. In these steels, the transition between paramagnetic and ferromagnetic conditions occurs at low temperatures. Therefore, the use of austenitic stainless steels in conditions in which ferromagnetism absence is important can be considered. On the other hand, the formation of strain-induced martensite is detected when austenitic stainless steels are deformed as well as machined. The strain-induced martensite formed especially in the machining process is not uniform through the chip and its formation can also be related to the Md temperature. Therefore, both the temperature distribution and the gradient during the cutting and chip formation are important to identify regions in which martensite formation is propitiated. The main objective here is evaluate the strain-induced martensite formation throughout machining by observing microstructural features and comparing these to thermal results obtained through finite element method analysis. Results show that thermal analysis can give support to the martensite identified in the microstructural analysis.

A Virtual Programming Lab for Moodle with automatic assessment and anti-plagiarism features

[EN] This paper describes VPL, a Virtual Programming Lab module for Moodle, developed at the University of Las Palmas of Gran Canaria (ULPGC) and released for free uses under GNU/GPL license. For the students, it is a simple development environment with auto evaluation capabilities. For the instructors, it is a students' work management system, with features to facilitate the preparation of assignments, manage the submissions, check for plagiarism, and do assessments with the aid of powerful and flexible assessment tools based on program testing, all of that being independent of the programming language used for the assignments and taken into account critical security issues.

Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects

The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new issues and new challenges are arising, and the conventional ”bulk” architecture is becoming inadequate in order to face them. In order to overcome the limitations related to conventional structures, the researchers community is preparing different solutions, that need to be assessed. Possible solutions currently under scrutiny are represented by: • devices incorporating materials with properties different from those of silicon, for the channel and the source/drain regions; • new architectures as Silicon–On–Insulator (SOI) transistors: the body thickness of Ultra-Thin-Body SOI devices is a new design parameter, and it permits to keep under control Short–Channel–Effects without adopting high doping level in the channel. Among the solutions proposed in order to overcome the difficulties related to scaling, we can highlight heterojunctions at the channel edge, obtained by adopting for the source/drain regions materials with band–gap different from that of the channel material. This solution allows to increase the injection velocity of the particles travelling from the source into the channel, and therefore increase the performance of the transistor in terms of provided drain current. The first part of this thesis work addresses the use of heterojunctions in SOI transistors: chapter 3 outlines the basics of the heterojunctions theory and the adoption of such approach in older technologies as the heterojunction–bipolar–transistors; moreover the modifications introduced in the Monte Carlo code in order to simulate conduction band discontinuities are described, and the simulations performed on unidimensional simplified structures in order to validate them as well. Chapter 4 presents the results obtained from the Monte Carlo simulations performed on double–gate SOI transistors featuring conduction band offsets between the source and drain regions and the channel. In particular, attention has been focused on the drain current and to internal quantities as inversion charge, potential energy and carrier velocities. Both graded and abrupt discontinuities have been considered. The scaling of devices dimensions and the adoption of innovative architectures have consequences on the power dissipation as well. In SOI technologies the channel is thermally insulated from the underlying substrate by a SiO2 buried–oxide layer; this SiO2 layer features a thermal conductivity that is two orders of magnitude lower than the silicon one, and it impedes the dissipation of the heat generated in the active region. Moreover, the thermal conductivity of thin semiconductor films is much lower than that of silicon bulk, due to phonon confinement and boundary scattering. All these aspects cause severe self–heating effects, that detrimentally impact the carrier mobility and therefore the saturation drive current for high–performance transistors; as a consequence, thermal device design is becoming a fundamental part of integrated circuit engineering. The second part of this thesis discusses the problem of self–heating in SOI transistors. Chapter 5 describes the causes of heat generation and dissipation in SOI devices, and it provides a brief overview on the methods that have been proposed in order to model these phenomena. In order to understand how this problem impacts the performance of different SOI architectures, three–dimensional electro–thermal simulations have been applied to the analysis of SHE in planar single and double–gate SOI transistors as well as FinFET, featuring the same isothermal electrical characteristics. In chapter 6 the same simulation approach is extensively employed to study the impact of SHE on the performance of a FinFET representative of the high–performance transistor of the 45 nm technology node. Its effects on the ON–current, the maximum temperatures reached inside the device and the thermal resistance associated to the device itself, as well as the dependence of SHE on the main geometrical parameters have been analyzed. Furthermore, the consequences on self–heating of technological solutions such as raised S/D extensions regions or reduction of fin height are explored as well. Finally, conclusions are drawn in chapter 7.

Tecniche di ottimizzazione del software per sistemi su singolo chip per applicazioni di Nomadic Computing

I moderni sistemi embedded sono equipaggiati con risorse hardware che consentono l’esecuzione di applicazioni molto complesse come il decoding audio e video. La progettazione di simili sistemi deve soddisfare due esigenze opposte. Da un lato è necessario fornire un elevato potenziale computazionale, dall’altro bisogna rispettare dei vincoli stringenti riguardo il consumo di energia. Uno dei trend più diffusi per rispondere a queste esigenze opposte è quello di integrare su uno stesso chip un numero elevato di processori caratterizzati da un design semplificato e da bassi consumi. Tuttavia, per sfruttare effettivamente il potenziale computazionale offerto da una batteria di processoriè necessario rivisitare pesantemente le metodologie di sviluppo delle applicazioni. Con l’avvento dei sistemi multi-processore su singolo chip (MPSoC) il parallel programming si è diffuso largamente anche in ambito embedded. Tuttavia, i progressi nel campo della programmazione parallela non hanno mantenuto il passo con la capacità di integrare hardware parallelo su un singolo chip. Oltre all’introduzione di multipli processori, la necessità di ridurre i consumi degli MPSoC comporta altre soluzioni architetturali che hanno l’effetto diretto di complicare lo sviluppo delle applicazioni. Il design del sottosistema di memoria, in particolare, è un problema critico. Integrare sul chip dei banchi di memoria consente dei tempi d’accesso molto brevi e dei consumi molto contenuti. Sfortunatamente, la quantità di memoria on-chip che può essere integrata in un MPSoC è molto limitata. Per questo motivo è necessario aggiungere dei banchi di memoria off-chip, che hanno una capacità molto maggiore, come maggiori sono i consumi e i tempi d’accesso. La maggior parte degli MPSoC attualmente in commercio destina una parte del budget di area all’implementazione di memorie cache e/o scratchpad. Le scratchpad (SPM) sono spesso preferite alle cache nei sistemi MPSoC embedded, per motivi di maggiore predicibilità, minore occupazione d’area e – soprattutto – minori consumi. Per contro, mentre l’uso delle cache è completamente trasparente al programmatore, le SPM devono essere esplicitamente gestite dall’applicazione. Esporre l’organizzazione della gerarchia di memoria ll’applicazione consente di sfruttarne in maniera efficiente i vantaggi (ridotti tempi d’accesso e consumi). Per contro, per ottenere questi benefici è necessario scrivere le applicazioni in maniera tale che i dati vengano partizionati e allocati sulle varie memorie in maniera opportuna. L’onere di questo compito complesso ricade ovviamente sul programmatore. Questo scenario descrive bene l’esigenza di modelli di programmazione e strumenti di supporto che semplifichino lo sviluppo di applicazioni parallele. In questa tesi viene presentato un framework per lo sviluppo di software per MPSoC embedded basato su OpenMP. OpenMP è uno standard di fatto per la programmazione di multiprocessori con memoria shared, caratterizzato da un semplice approccio alla parallelizzazione tramite annotazioni (direttive per il compilatore). La sua interfaccia di programmazione consente di esprimere in maniera naturale e molto efficiente il parallelismo a livello di loop, molto diffuso tra le applicazioni embedded di tipo signal processing e multimedia. OpenMP costituisce un ottimo punto di partenza per la definizione di un modello di programmazione per MPSoC, soprattutto per la sua semplicità d’uso. D’altra parte, per sfruttare in maniera efficiente il potenziale computazionale di un MPSoC è necessario rivisitare profondamente l’implementazione del supporto OpenMP sia nel compilatore che nell’ambiente di supporto a runtime. Tutti i costrutti per gestire il parallelismo, la suddivisione del lavoro e la sincronizzazione inter-processore comportano un costo in termini di overhead che deve essere minimizzato per non comprometterre i vantaggi della parallelizzazione. Questo può essere ottenuto soltanto tramite una accurata analisi delle caratteristiche hardware e l’individuazione dei potenziali colli di bottiglia nell’architettura. Una implementazione del task management, della sincronizzazione a barriera e della condivisione dei dati che sfrutti efficientemente le risorse hardware consente di ottenere elevate performance e scalabilità. La condivisione dei dati, nel modello OpenMP, merita particolare attenzione. In un modello a memoria condivisa le strutture dati (array, matrici) accedute dal programma sono fisicamente allocate su una unica risorsa di memoria raggiungibile da tutti i processori. Al crescere del numero di processori in un sistema, l’accesso concorrente ad una singola risorsa di memoria costituisce un evidente collo di bottiglia. Per alleviare la pressione sulle memorie e sul sistema di connessione vengono da noi studiate e proposte delle tecniche di partizionamento delle strutture dati. Queste tecniche richiedono che una singola entità di tipo array venga trattata nel programma come l’insieme di tanti sotto-array, ciascuno dei quali può essere fisicamente allocato su una risorsa di memoria differente. Dal punto di vista del programma, indirizzare un array partizionato richiede che ad ogni accesso vengano eseguite delle istruzioni per ri-calcolare l’indirizzo fisico di destinazione. Questo è chiaramente un compito lungo, complesso e soggetto ad errori. Per questo motivo, le nostre tecniche di partizionamento sono state integrate nella l’interfaccia di programmazione di OpenMP, che è stata significativamente estesa. Specificamente, delle nuove direttive e clausole consentono al programmatore di annotare i dati di tipo array che si vuole partizionare e allocare in maniera distribuita sulla gerarchia di memoria. Sono stati inoltre sviluppati degli strumenti di supporto che consentono di raccogliere informazioni di profiling sul pattern di accesso agli array. Queste informazioni vengono sfruttate dal nostro compilatore per allocare le partizioni sulle varie risorse di memoria rispettando una relazione di affinità tra il task e i dati. Più precisamente, i passi di allocazione nel nostro compilatore assegnano una determinata partizione alla memoria scratchpad locale al processore che ospita il task che effettua il numero maggiore di accessi alla stessa.