Desenvolvimento e implementação de um sistema de supervisão e controle residencial

With the technological progress the people are more and more looking for convenience, comfort and safety to your homes. The residential automation is winning space on the market not only by the status and modernity that provide, but also to allow a better use of natural resources, reducing the expense to keep up a residence. This work shows the development of a control system and supervision to be destined to the residential automation. The developed software will be working together with a controller (PLC), acting in the administration, control and supervision all the linked devices, and offering to the user an environment simple and practical for the control residence

Uma implementação paralela híbrida para o problema do caixeiro viajante usando algoritmos genéticos, GRASP e aprendizagem por reforço

The metaheuristics techiniques are known to solve optimization problems classified as NP-complete and are successful in obtaining good quality solutions. They use non-deterministic approaches to generate solutions that are close to the optimal, without the guarantee of finding the global optimum. Motivated by the difficulties in the resolution of these problems, this work proposes the development of parallel hybrid methods using the reinforcement learning, the metaheuristics GRASP and Genetic Algorithms. With the use of these techniques, we aim to contribute to improved efficiency in obtaining efficient solutions. In this case, instead of using the Q-learning algorithm by reinforcement learning, just as a technique for generating the initial solutions of metaheuristics, we use it in a cooperative and competitive approach with the Genetic Algorithm and GRASP, in an parallel implementation. In this context, was possible to verify that the implementations in this study showed satisfactory results, in both strategies, that is, in cooperation and competition between them and the cooperation and competition between groups. In some instances were found the global optimum, in others theses implementations reach close to it. In this sense was an analyze of the performance for this proposed approach was done and it shows a good performance on the requeriments that prove the efficiency and speedup (gain in speed with the parallel processing) of the implementations performed

Implementação de um algoritmo para a análise de curtos-circuitos de alta impedância baseado no fluxo de carga soma de potências

This work has as main objective to show all the particularities regarding the Three-phase Power Summation Method, used for load flow calculation, in what it says respect to the influence of the magnetic coupling among the phases, as well as to the losses presented in all the existent transformers in the feeder to be analyzed. Besides, its application is detailed in the study of the short-circuits, that happen in the presence of high impedance values, which possess a problem, that is its difficult detection and consequent elimination on the part of common devices of protection. That happens due to the characteristic presented by the current of short¬ circuit, in being generally of the same order of greatness that the load currents. Results of simulations accomplished in several situations will be shown, objectifying a complete analysis of the behavior of the proposed method in several types of short-circuits. Confront of the results obtained by the method with results of another works will be presented to verify its effectiveness

Implementação e análise de desempenho dos protocolos de criptografia neural e Diffie-Hellman em sistemas RFID utilizando uma plataforma embarcada

RFID (Radio Frequency Identification) identifies object by using the radio frequency which is a non-contact automatic identification technique. This technology has shown its powerful practical value and potential in the field of manufacturing, retailing, logistics and hospital automation. Unfortunately, the key problem that impacts the application of RFID system is the security of the information. Recently, researchers have demonstrated solutions to security threats in RFID technology. Among these solutions are several key management protocols. This master dissertations presents a performance evaluation of Neural Cryptography and Diffie-Hellman protocols in RFID systems. For this, we measure the processing time inherent in these protocols. The tests was developed on FPGA (Field-Programmable Gate Array) platform with Nios IIr embedded processor. The research methodology is based on the aggregation of knowledge to development of new RFID systems through a comparative analysis between these two protocols. The main contributions of this work are: performance evaluation of protocols (Diffie-Hellman encryption and Neural) on embedded platform and a survey on RFID security threats. According to the results the Diffie-Hellman key agreement protocol is more suitable for RFID systems

Implementação experimental de filtro ativo paralelo de potência com aplicação a gerador de indução trifásico

This work describes the experimental implementation of a shunt active power filter applied to a three-phase induction generator. The control strategy of active filter turned to the excitation control of the machine and to decrease the harmonics in the generator output current. Involved the implementation of a digital PWM switching, and was made a comparison of two techniques for obtaining the reference currents. The first technique is based on the synchronous dq reference method and the second on the theory of instantaneous power. The comparison is performed via simulation and experimental results. To obtain the experimental results, was mounted a bench trial and the control and communications needed were implemented using DSP - MS320F2812. The simulation results and experimental data proved the efficiency of the filter to apply, highlighting the technique of instantaneous power

Uma implementação da análise de componentes independentes em plataforma de hardware reconfigurável

Blind Source Separation (BSS) refers to the problem of estimate original signals from observed linear mixtures with no knowledge about the sources or the mixing process. Independent Component Analysis (ICA) is a technique mainly applied to BSS problem and from the algorithms that implement this technique, FastICA is a high performance iterative algorithm of low computacional cost that uses nongaussianity measures based on high order statistics to estimate the original sources. The great number of applications where ICA has been found useful reects the need of the implementation of this technique in hardware and the natural paralelism of FastICA favors the implementation of this algorithm on digital hardware. This work proposes the implementation of FastICA on a reconfigurable hardware platform for the viability of it's use in blind source separation problems, more specifically in a hardware prototype embedded in a Field Programmable Gate Array (FPGA) board for the monitoring of beds in hospital environments. The implementations will be carried out by Simulink models and it's synthesizing will be done through the DSP Builder software from Altera Corporation.

Implementação de processador banda base ofdma para downlink lte em fpga

This work treats of an implementation OFDMA baseband processor in hardware for LTE Downlink. The LTE or Long Term Evolution consist the last stage of development of the technology called 3G (Mobile System Third Generation) which offers an increasing in data rate and more efficiency and flexibility in transmission with application of advanced antennas and multiple carriers techniques. This technology applies in your physical layer the OFDMA technical (Orthogonal Frequency Division Multiple Access) for generation of signals and mapping of physical resources in downlink and has as base theoretical to OFDM multiple carriers technique (Orthogonal Frequency Division Multiplexing). With recent completion of LTE specifications, different hardware solutions have been developed, mainly, to the level symbol processing where the implementation of OFDMA processor in base band is commonly considered, because it is also considered a basic architecture of others important applications. For implementation of processor, the reconfigurable hardware offered by devices as FPGA are considered which shares not only to meet the high requirements of flexibility and adaptability of LTE as well as offers possibility of an implementation quick and efficient. The implementation of processor in reconfigurable hardware meets the specifications of LTE physical layer as well as have the flexibility necessary for to meet others standards and application which use OFDMA processor as basic architecture for your systems. The results obtained through of simulation and verification functional system approval the functionality and flexibility of processor implemented

Implementação de rotinas computacionais básicas para cabeça estéreo robótica

O Laboratório de Sistemas Inteligentes do Departamento de Engenharia de Computação e Automação da Universidade Federal do Rio Grande do Norte - UFRN -tem como um de seus projetos de pesquisa -Robosense -a construção de uma plataforma robótica móvel. Trata-se de um robô provido de duas rodas, acionadas de forma diferencial, dois braços, com 5 graus de liberdade cada, um cinturão de sonares e uma cabeça estéreo. Como objetivo principal do projeto Robosense, o robô deverá ser capaz de navegar por todo o prédio do LECA, desviando de obstáculos. O sistema de navegação do robô, responsável pela geração e seguimento de rotas, atuará em malha fechada. Ou seja, sensores serão utilizados pelo sistema com o intuito de informar ao robô a sua pose atual, incluindo localização e a configuração de seus recursos. Encoders (sensores especiais de rotação) foram instalados nas rodas, bem como em todos os motores dos dois braços da cabeça estéreo. Sensores de fim-de-curso foram instalados em todas as juntas da cabeça estéreo para que seja possível sua pré-calibração. Sonares e câmeras também farão parte do grupo de sensores utilizados no projeto. O robô contará com uma plataforma composta por, a princípio, dois computadores ligados a um barramento único para uma operação em tempo real, em paralelo. Um deles será responsável pela parte de controle dos braços e de sua navegação, tomando como base as informações recebidas dos sensores das rodas e dos próximos objetivos do robô. O outro computador processará todas as informações referentes à cabeça estéreo do robô, como as imagens recebidas das câmeras. A utilização de técnicas de imageamento estéreo torna-se necessária, pois a informação de uma única imagem não determina unicamente a posição de um dado ponto correspondente no mundo. Podemos então, através da utilização de duas ou mais câmeras, recuperar a informação de profundidade da cena. A cabeça estéreo proposta nada mais é que um artefato físico que deve dar suporte a duas câmeras de vídeo, movimentá-las seguindo requisições de programas (softwares) apropriados e ser capaz de fornecer sua pose atual. Fatores como velocidade angular de movimentação das câmeras, precisão espacial e acurácia são determinantes para o eficiente resultado dos algoritmos que nesses valores se baseiam

Estudo e implementação em plantas físicas de um controlador preditivo generalizado com restrições

This work shows a study about the Generalized Predictive Controllers with Restrictions and their implementation in physical plants. Three types of restrictions will be discussed: restrictions in the variation rate of the signal control, restrictions in the amplitude of the signal control and restrictions in the amplitude of the Out signal (plant response). At the predictive control, the control law is obtained by the minimization of an objective function. To consider the restrictions, this minimization of the objective function is done by the use of a method to solve optimizing problems with restrictions. The chosen method was the Rosen Algorithm (based on the Gradient-projection). The physical plants in this study are two didactical systems of water level control. The first order one (a simple tank) and another of second order, which is formed by two tanks connected in cascade. The codes are implemented in C++ language and the communication with the system to be done through using a data acquisition panel offered by the system producer

Implementação de um sistema embarcado aplicado ao controle de pressão arterial

Hypertension is a dangerous disease that can cause serious harm to a patient health. In some situations the necessity to control this pressure is even greater, as in surgical procedures and post-surgical patients. To decrease the chances of a complication, it is necessary to reduce blood pressure as soon as possible. Continuous infusion of vasodilators drugs, such as sodium nitroprusside (SNP), rapidly decreased blood pressure in most patients, avoiding major problems. Maintaining the desired blood pressure requires constant monitoring of arterial blood pressure and frequently adjusting the drug infusion rate. Manual control of arterial blood pressure by clinical personnel is very demanding, time consuming and, as a result, sometimes of poor quality. Thus, the aim of this work is the design and implementation of a database of tuned controllers based on patients models, in order to find a suitable PID to be embedded in a Programmable Integrated Circuit (PIC), which has a smaller cost, smaller size and lower power consumption. For best results in controlling the blood pressure and choosing the adequate controller, tuning algorithms, system identification techniques and Smith predictor are used. This work also introduces a monitoring system to assist in detecting anomalies and optimize the process of patient care.

Estudo e implementação de um controlador preditivo generalizado bilinear compensado adaptativo

The present work presents the study and implementation of an adaptive bilinear compensated generalized predictive controller. This work uses conventional techniques of predictive control and includes techniques of adaptive control for better results. In order to solve control problems frequently found in the chemical industry, bilinear models are considered to represent the dynamics of the studied systems. Bilinear models are simpler than general nonlinear model, however it can to represent the intrinsic not-linearities of industrial processes. The linearization of the model, by the approach to time step quasilinear , is used to allow the application of the equations of the generalized predictive controller (GPC). Such linearization, however, generates an error of prediction, which is minimized through a compensation term. The term in study is implemented in an adaptive form, due to the nonlinear relationship between the input signal and the prediction error.Simulation results show the efficiency of adaptive predictive bilinear controller in comparison with the conventional.

Análise de escalabilidade de uma implementação paralela do simulated annealing acoplado

This paper analyzes the performance of a parallel implementation of Coupled Simulated Annealing (CSA) for the unconstrained optimization of continuous variables problems. Parallel processing is an efficient form of information processing with emphasis on exploration of simultaneous events in the execution of software. It arises primarily due to high computational performance demands, and the difficulty in increasing the speed of a single processing core. Despite multicore processors being easily found nowadays, several algorithms are not yet suitable for running on parallel architectures. The algorithm is characterized by a group of Simulated Annealing (SA) optimizers working together on refining the solution. Each SA optimizer runs on a single thread executed by different processors. In the analysis of parallel performance and scalability, these metrics were investigated: the execution time; the speedup of the algorithm with respect to increasing the number of processors; and the efficient use of processing elements with respect to the increasing size of the treated problem. Furthermore, the quality of the final solution was verified. For the study, this paper proposes a parallel version of CSA and its equivalent serial version. Both algorithms were analysed on 14 benchmark functions. For each of these functions, the CSA is evaluated using 2-24 optimizers. The results obtained are shown and discussed observing the analysis of the metrics. The conclusions of the paper characterize the CSA as a good parallel algorithm, both in the quality of the solutions and the parallel scalability and parallel efficiency

Implementação paralela escalável e eficiente do algoritmo simplex padrão em arquitetura multicore

This work presents a scalable and efficient parallel implementation of the Standard Simplex algorithm in the multicore architecture to solve large scale linear programming problems. We present a general scheme explaining how each step of the standard Simplex algorithm was parallelized, indicating some important points of the parallel implementation. Performance analysis were conducted by comparing the sequential time using the Simplex tableau and the Simplex of the CPLEXR IBM. The experiments were executed on a shared memory machine with 24 cores. The scalability analysis was performed with problems of different dimensions, finding evidence that our parallel standard Simplex algorithm has a better parallel efficiency for problems with more variables than constraints. In comparison with CPLEXR , the proposed parallel algorithm achieved a efficiency of up to 16 times better

Especificação e implementação de uma linguagem para transformação de modelos MOF em repositórios dMOF

This work presents the specification and the implementation of a language of Transformations in definite Models specification MOF (Meta Object Facility) of OMG (Object Management Group). The specification uses a boarding based on rules ECA (Event-Condition-Action) and was made on the basis of a set of scenes of use previously defined. The Parser Responsible parser for guaranteeing that the syntactic structure of the language is correct was constructed with the tool JavaCC (Java Compiler Compiler) and the description of the syntax of the language was made with EBNF (Extended Backus-Naur Form). The implementation is divided in three parts: the creation of the interpretative program properly said in Java, the creation of an executor of the actions specified in the language and its integration with the type of considered repository (generated for tool DSTC dMOF). A final prototype was developed and tested in the scenes previously defined

Projeto e Implementação em Ambiente Foundation Fieldbus de Filtragem Estocástica Baseada em Análise de Componentes Independentes (M175)

This work considers the development of a filtering system composed of an intelligent algorithm, that separates information and noise coming from sensors interconnected by Foundation Fieldbus (FF) network. The algorithm implementation will be made through FF standard function blocks, with on-line training through OPC (OLE for Process Control), and embedded technology in a DSP (Digital Signal Processor) that interacts with the fieldbus devices. The technique ICA (Independent Component Analysis), that explores the possibility of separating mixed signals based on the fact that they are statistically independent, was chosen to this Blind Source Separation (BSS) process. The algorithm and its implementations will be Presented, as well as the results