Phase perfection in zinc Blende and Wurtzite III-V nanowires using basic growth parameters.

Controlling the crystallographic phase purity of III-V nanowires is notoriously difficult, yet this is essential for future nanowire devices. Reported methods for controlling nanowire phase require dopant addition, or a restricted choice of nanowire diameter, and only rarely yield a pure phase. Here we demonstrate that phase-perfect nanowires, of arbitrary diameter, can be achieved simply by tailoring basic growth parameters: temperature and V/III ratio. Phase purity is achieved without sacrificing important specifications of diameter and dopant levels. Pure zinc blende nanowires, free of twin defects, were achieved using a low growth temperature coupled with a high V/III ratio. Conversely, a high growth temperature coupled with a low V/III ratio produced pure wurtzite nanowires free of stacking faults. We present a comprehensive nucleation model to explain the formation of these markedly different crystal phases under these growth conditions. Critical to achieving phase purity are changes in surface energy of the nanowire side facets, which in turn are controlled by the basic growth parameters of temperature and V/III ratio. This ability to tune crystal structure between twin-free zinc blende and stacking-fault-free wurtzite not only will enhance the performance of nanowire devices but also opens new possibilities for engineering nanowire devices, without restrictions on nanowire diameters or doping.

Improvement of morphology, structure, and optical properties of GaAs nanowires grown on Si substrates

We investigate vertical and defect-free growth of GaAs nanowires on Si (111) substrates via a vapor-liquid-solid (VLS) growth mechanism with Au catalysts by metal-organic chemical vapor deposition (MOCVD). By using annealed thin GaAs buffer layers on the surface of Si substrates, most nanowires are grown on the substrates straight, following (111) direction; by using two temperature growth, the nanowires were grown free from structural defects, such as twin defects and stacking faults. Systematic experiments about buffer layers indicate that V/III ratio of precursor and growth temperature can affect the morphology and quality of the buffer layers. Especially, heterostructural buffer layers grown with different V/III ratios and temperatures and in-situ post-annealing step are very helpful to grow well arranged, vertical GaAs nanowires on Si substrates. The initial nanowires having some structural defects can be defect-free by two-temperature growth mode with improved optical property, which shows us positive possibility for optoelectronic device application. ©2010 IEEE.

III-V nanowires for optoelectronics

The optical and structural properties of binary and ternary III-V nanowires including GaAs, InP, In(Ga)As, Al(Ga)As, and GaAs(Sb) nanowires by metal-organic chemical vapour deposition are investigated, Au colloidal nanoparticles are employed to catalyze nanowire growth. Zinc blende or wurtzite crystal structures with some stacking faults are observed for these nanowires by high resolution transmission electron microscope. In addition, the properties of heterostructure nanowires including GaAs-AlGaAs core-shell nanowires, GaAs-InAs nanowires, and GaAs-GaSb nanowires are reported. Single nanowire luminescence properties from optically bright InP nanowires are reported. Interesting phenomena such as two-temperature procedure, nanowire height enhancement of isolated ternary InGaAs nanowires, kinking effect of InAs-GaAs heterostructure nanowires, and unusual growth property of GaAs-GaSb heterostructure nanowires are investigated. These nanowires will play an essential role in future optoelectronic devices.

Direct observation of charge-carrier heating at WZ-ZB InP nanowire heterojunctions.

We have investigated the dynamics of hot charge carriers in InP nanowire ensembles containing a range of densities of zinc-blende inclusions along the otherwise wurtzite nanowires. From time-dependent photoluminescence spectra, we extract the temperature of the charge carriers as a function of time after nonresonant excitation. We find that charge-carrier temperature initially decreases rapidly with time in accordance with efficient heat transfer to lattice vibrations. However, cooling rates are subsequently slowed and are significantly lower for nanowires containing a higher density of stacking faults. We conclude that the transfer of charges across the type II interface is followed by release of additional energy to the lattice, which raises the phonon bath temperature above equilibrium and impedes the carrier cooling occurring through interaction with such phonons. These results demonstrate that type II heterointerfaces in semiconductor nanowires can sustain a hot charge-carrier distribution over an extended time period. In photovoltaic applications, such heterointerfaces may hence both reduce recombination rates and limit energy losses by allowing hot-carrier harvesting.

Asymmetrical low-voltage ride through of brushless doubly fed induction generators for the wind power generation

Compared with the Doubly fed induction generators (DFIG), the brushless doubly fed induction generator (BDFIG) has a commercial potential for wind power generation due to its lower cost and higher reliability. In the most recent grid codes, wind generators are required to be capable of riding through low voltage faults. As a result of the negative sequence, induction generators response differently in asymmetrical voltage dips compared with the symmetrical dip. This paper gave a full behavior analysis of the BDFIG under different types of the asymmetrical fault and proposed a novel control strategy for the BDFIG to ride through asymmetrical low voltage dips without any extra hardware such as crowbars. The proposed control strategies are experimentally verified by a 250-kW BDFIG. © 2012 IEEE.

Experimental LVRT performance of a 250 kW brushless DFIG

Nowadays, all new wind turbine generators have to meet strict grid codes, especially riding through certain grid faults, such as a low voltage caused by grid short circuits. The Low-Voltage Ride Through (LVRT) capability has become a key issue in assessing the performance of wind turbine generators. The mediumspeed Brushless DFIG in combination with a simplified two-stage gearbox shows commercial promise as a replacement for conventional DFIGs due to its lower cost and higher reliability. Furthermore, the Brushless DFIG has significantly improved LVRT performance when compared with the DFIG due to its inherent design characteristics. In this paper, the authors propose a control strategy for the Brushless DFIG to improve its LVRT performance. The controller has been implemented on a prototype 250 kW Brushless DFIG and test results show that LVRT is possible without a need for any external protective hardware such as a crowbar.

Reconfigurable predictive control for redundantly actuated systems with parameterised input constraints

A method is proposed for on-line reconfiguration of the terminal constraint used to provide theoretical nominal stability guarantees in linear model predictive control (MPC). By parameterising the terminal constraint, its complete reconstruction is avoided when input constraints are modified to accommodate faults. To enlarge the region of feasibility of the terminal control law for a certain class of input faults with redundantly actuated plants, the linear terminal controller is defined in terms of virtual commands. A suitable terminal cost weighting for the reconfigurable MPC is obtained by means of an upper bound on the cost for all feasible realisations of the virtual commands from the terminal controller. Conditions are proposed that guarantee feasibility recovery for a defined subset of faults. The proposed method is demonstrated by means of a numerical example. © 2013 Elsevier B.V. All rights reserved.

Tensile and compressive mechanical behavior of twinned silicon carbide nanowires

Molecular dynamics simulations with the Tersoff potential were used to study the response of twinned SiC nanowires under tensile and compressive strain. The critical strain of the twinned nanowires can be enhanced by twin stacking faults, and their critical strains are larger than those of perfect nanowires with the same diameters. Under axial tensile strain, the bonds of the nanowires are stretched just before failure. The failure behavior is found to depend on the twin segment thickness and the diameter of the nanowires. An atomic chain is observed for thin nanowires with small twin segment thickness under tension strain. Under axial compressive strain, the collapse of twinned SiC nanowires exhibits two different failure modes, depending on the length and diameter of the nanowires, i.e., shell buckling for short nanowires and columnar buckling for longer nanowires.

Microstructure and Optical Properties of Nonpolar m-Plane GaN Films Grown on m-Plane Sapphire by Hydride Vapor Phase Epitaxy

Thick nonpolar (10 (1) over bar0) GaN layers were grown on m-plane sapphire substrates by hydride vapor phase epitaxy (HVPE) using magnetron sputtered ZnO buffers, while semipolar (10 (1) over bar(3) over bar) GaN layers were obtained by the conventional two-step growth method using the same substrate. The in-plane anisotropic structural characteristics and stress distribution of the epilayers were revealed by high. resolution X-ray diffraction and polarized Raman scattering measurements. Atomic force microscopy (AFM) images revealed that the striated surface morphologies correlated with the basal plane stacking faults for both (10 (1) over bar0) and (10 (1) over bar(3) over bar) GaN films. The m-plane GaN surface showed many triangular-shaped pits aligning uniformly with the tips pointing to the c-axis after etching in boiled KOH, whereas the oblique hillocks appeared on the semipolar epilayers. In addition, the dominant emission at 3.42eV in m-plane GaN films displayed a red shift with respect to that in semipolar epilayers, maybe owing to the different strain states present in the two epitaxial layers. [DOI: 10.1143/JJAP.47.3346]

Nature of interfacial defects and their roles in strain relaxation at highly lattice mismatched 3C-SiC/Si (001) interface

Misfit defects in a 3C-SiC/Si (001) interface were investigated using a 200 kV high-resolution electron microscope with a point resolution of 0.194 nm. The [110] high-resolution electron microscopic images that do not directly reflect the crystal structure were transformed into the structure map through image deconvolution. Based on this analysis, four types of misfit dislocations at the 3C-SiC/Si (001) interface were determined. In turn, the strain relaxation mechanism was clarified through the generation of grow-in perfect misfit dislocations (including 90 degrees Lomer dislocations and 60 degrees shuffle dislocations) and 90 partial dislocations associated with stacking faults. (C) 2009 American Institute of Physics. [doi:10.1063/1.3234380]

Structural characterization of epitaxial lateral overgrown GaN on patterned GaN/GaAs(001) substrates

Epitaxial lateral overgrown (ELO) cubic GaN (c-GaN) on SiO2 patterned GaN/GaAs(0 0 1) substrates by metalorganic vapor phase epitaxy was investigated using transmission electron microscopy and X-ray diffraction (XRD) measurements. The density of stacking faults (SFs) in ELO c-GaN was similar to6 x 10(8) cm(-2), while that in underlying GaN template was similar to5 x 10(9) cm(-2). XRD measurements showed that the full-width at half-maximum of c-GaN (0 0 2) rocking curve decreased from 33 to 17.8 arcmin, indicating the improved crystalline quality of ELO c-GaN. The mechanism of SF reduction in ELO c-GaN was also discussed. (C) 2002 Elsevier Science B.V. All rights reserved.

Influences of initial nitridation process on the optical and structural characterization of GaN layer grown on sapphire (0001) by metalorganic chemical vapor deposition

In this paper. we investigate the influences of the initial nitridation of sapphire substrates on the optical and structural characterizations in GaN films. Two GaN samples with and without 3 min nitridation process were investigated by photoluminescence (PL) spectroscopy in the temperature range of 12-300 K and double-crystal X-ray diffraction (XRD). In the 12 K PL spectra of the GaN sample without nitridation, four dominant peaks at 3.476, 3.409 3.362 and 3.308 eV were observed, which were assigned to donor bound exciton, excitons bound to stacking faults and extended structural defects. In the sample with nitridation, three peaks at 3.453, 3.365. and 3.308 eV were observed at 12 K, no peak related to stacking faults. XRD results at different reflections showed that there are more stacking faults in the samples without nitridation.

Effect of Si doping on cubic GaN films grown on GaAs(100)

Epitaxial layers of cubic GaN have been grown by metalorganic vapor-phase epitaxy (MOVPE) with Si-doping carrier concentration ranging from 3 x 10(18) to 2.4 x 10(20)/cm(3). Si-doping decreased the yellow emission of GaN. However, the heavily doped n-type material has been found to induce phase transformation. As the Si-doping concentration increases, the hexagonal GaN nanoparticles increase. Judged from the linewidth of X-ray rocking curve, Si-doping increases the density of dislocations and stacking faults. Based on these observations, a model is proposed to interpret the phase transformation induced by the generated microdefects, such as dislocations and precipitates, and induced stacking faults under heavy Si-doping. (C) 1999 Elsevier Science B.V. All rights reserved.

TEM study of dislocations in ZnTe/GaAs heterostructure grown by hot-wall epitaxy

A ZnTe layer grown on GaAs substrate by hot-wall epitaxy (HWE) was studied using transmission electron microscopy (TEM). For a (110) cross-sectional specimen, its (001) ZnTe/GaAs interface was analysed by large angle stereo-projection (LASP) and high resolution electron microscopy (HREM). In the LASP, a double diffraction occurred and moire fringes were formed, meanwhile misfit dislocations were revealled clearly by weak beam technique. In HREM, not only Lomer and 60 degrees types of misfit dislocations were observed, but also two types of stacking faults were analysed. The residual strain was estimated by both methods.

Strain relaxation of GeSi alloy with low dislocation density grown on low-temperature Si buffers

We have developed a low-temperature (LT) growth technique. Even with Ge fraction x upto 90%, the total thickness of fully relaxed GexSi1-x buffers can he reduced to 1.7 mu m with dislocation density lower than 5 x 10(6) cm(-2). The surface roughness is no more than 6 nm. The strain relaxation is quite inhomogeneous From the beginning. Stacking faults generate and form the mismatch dislocations in the interface of GeSi/LT-Si. (C) 1999 Elsevier Science B.V. All rights reserved.