903 resultados para single test electron model
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This article assesses how the last-visit features and the socio-demographic profile of tourists moderate repeat-visit patterns to Portugal, a mature destination where the persistence of loyal visitors has made its mark on tourism development. The methodology used is a survival analysis to assess the tourists’ repeat patterns. To test the model, a database of 4612 observations was employed, which was obtained from a survey of international tourists. Only repeat visitors with more than two visits over the years were considered for the purpose of the research. The study finds that a combination of socio-demographic characteristics, expectation/satisfaction, trip purpose, pull motivations and regional destination has a positive effect on repeat patterns, confirming that tourists’ willingness to repeat visits to Portugal is far from ceasing. Based on those tourists to Portugal who declared when they started to visit the country, and the number of years of their repeat visits, the article contributes to the literature by introducing new methods of assessing tourists’ repeat patterns for destinations.
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Recent measurements of electron escape from a nonequilibrium charged quantum dot are interpreted within a two-dimensional (2D) separable model. The confining potential is derived from 3D self-consistent Poisson-Thomas-Fermi calculations. It is found that the sequence of decay lifetimes provides a sensitive test of the confining potential and its dependence on electron occupation
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The traditional monostable-bistable transition logic element (MOBILE) structure is usually composed of resonant tunneling diodes (RTD). This letter describes a new type MOBILE structure consisting of single-electron transistors (i.e. SET-MOBILE). The analytical model of single-electron transistors ( SET) has been considered three states (including an excited state) of the discrete quantum energy levels. The simulation results show negative differential conductance (NDC) characteristics in I-DS-V-DS curve. The SET-MOBILE utilizing NDC characteristics can successfully realize the basic logic functions as the RTD-MOBILE.
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This study was designed to present the feasibility of an in vivo image-guided percutaneous cryoablation of the porcine vertebral body. Methods The institutional animal care committee approved this study. Cone-beam computed tomography (CBCT)-guided vertebral cryoablations (n = 22) were performed in eight pigs with short, 2-min, single or double-freezing protocols. Protective measures to nerves included dioxide carbon (CO2) epidural injections and spinal canal temperature monitoring. Clinical, radiological, and pathological data with light (n = 20) or transmission electron (n = 2) microscopic analyses were evaluated after 6 days of clinical follow-up and euthanasia. Results CBCT/fluoroscopic-guided transpedicular vertebral body cryoprobe positioning and CO2 epidural injection were successful in all procedures. No major complications were observed in seven animals (87.5 %, n = 8). A minor complication was observed in one pig (12.5 %, n = 1). Logistic regression model analysis showed the cryoprobe-spinal canal (Cp-Sc) distance as the most efficient parameter to categorize spinal canal temperatures lower than 19 °C (p<0.004), with a significant Pearson’s correlation test (p < 0.041) between the Cp-Sc distance and the lowest spinal canal temperatures. Ablation zones encompassed pedicles and the posterior wall of the vertebral bodies with an inflammatory rim, although no inflammatory infiltrate was depicted in the surrounding neural structures at light microscopy. Ultrastructural analyses evidenced myelin sheath disruption in some large nerve fibers, although neurological deficits were not observed. Conclusions CBCT-guided vertebral cryoablation of the porcine spine is feasible under a combination of a short freezing protocol and protective measures to the surrounding nerves. Ultrastructural analyses may be helpful assess the early modifications of the nerve fibers.
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The single electron transistor (SET) is a charge-based device that may complement the dominant metal-oxide-semiconductor field effect transistor (MOSFET) technology. As the cost of scaling MOSFET to smaller dimensions are rising and the the basic functionality of MOSFET is encountering numerous challenges at dimensions smaller than 10nm, the SET has shown the potential to become the next generation device which operates based on the tunneling of electrons. Since the electron transfer mechanism of a SET device is based on the non-dissipative electron tunneling effect, the power consumption of a SET device is extremely low, estimated to be on the order of 10^-18J. The objectives of this research are to demonstrate technologies that would enable the mass produce of SET devices that are operational at room temperature and to integrate these devices on top of an active complementary-MOSFET (CMOS) substrate. To achieve these goals, two fabrication techniques are considered in this work. The Focus Ion Beam (FIB) technique is used to fabricate the islands and the tunnel junctions of the SET device. A Ultra-Violet (UV) light based Nano-Imprint Lithography (NIL) call Step-and-Flash- Imprint Lithography (SFIL) is used to fabricate the interconnections of the SET devices. Combining these two techniques, a full array of SET devices are fabricated on a planar substrate. Test and characterization of the SET devices has shown consistent Coulomb blockade effect, an important single electron characteristic. To realize a room temperature operational SET device that function as a logic device to work along CMOS, it is important to know the device behavior at different temperatures. Based on the theory developed for a single island SET device, a thermal analysis is carried out on the multi-island SET device and the observation of changes in Coulomb blockade effect is presented. The results show that the multi-island SET device operation highly depends on temperature. The important parameters that determine the SET operation is the effective capacitance Ceff and tunneling resistance Rt . These two parameters lead to the tunneling rate of an electron in the SET device, Γ. To obtain an accurate model for SET operation, the effects of the deviation in dimensions, the trap states in the insulation, and the background charge effect have to be taken into consideration. The theoretical and experimental evidence for these non-ideal effects are presented in this work.
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Nanoparticle manipulation by various plasma forces in near-substrate areas of the Integrated Plasma-Aided Nanofabrication Facility (IPANF) is investigated. In the IPANF, high-density plasmas of low-temperature rf glow discharges are sustained. The model near-substrate area includes a variable-length pre-sheath, where a negatively charged nanoparticle is accelerated, and a self-consistent collisionless sheath with a repulsive electrostatic potential. Conditions enabling the nanoparticle to overcome the repulsive barrier and deposit onto the substrate are investigated numerically and experimentally. Under certain conditions the momentum gained by the nanoparticle in the pre-sheath area appears to be sufficient for the driving ion drag force to outbalance the repulsive electrostatic and thermophoretic forces. Numerical results are applied for the explanation of size-selective nanoparticle deposition in the Ar+H2+CH4 plasma-assisted chemical vapor deposition of various carbon nanostructure patterns for electron field emitters and are cross-referenced by the field emission scanning electron microscopy. It is shown that the nanoparticles can be efficiently manipulated by the temperature gradient-controlled thermophoretic force. Experimentally, the temperature gradients in the near-substrate areas are measured in situ by means of the temperature gradient probe and related to the nanofilm fabrication conditions. The results are relevant to plasma-assisted synthesis of numerous nanofilms employing structural incorporation of the plasma-grown nanoparticles, including but not limited to nanofabrication of ordered single-crystalline carbon nanotip arrays for electron field emission applications.
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Possible integration of Single Electron Transistor (SET) with CMOS technology is making the study of semiconductor SET more important than the metallic SET and consequently, the study of energy quantization effects on semiconductor SET devices and circuits is gaining significance. In this paper, for the first time, the effects of energy quantization on SET inverter performance are examined through analytical modeling and Monte Carlo simulations. It is observed that the primary effect of energy quantization is to change the Coulomb Blockade region and drain current of SET devices and as a result affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. It is shown that SET inverter designed with CT : CG = 1/3 (where CT and CG are tunnel junction and gate capacitances respectively) offers maximum robustness against energy quantization.
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In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.
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In this paper, the effects of energy quantization on different single-electron transistor (SET) circuits (logic inverter, current-biased circuits, and hybrid MOS-SET circuits) are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantizationmainly increases the Coulomb blockade area and Coulomb blockade oscillation periodicity, and thus, affects the SET circuit performance. A new model for the noise margin of the SET inverter is proposed, which includes the energy quantization effects. Using the noise margin as a metric, the robustness of the SET inverter is studied against the effects of energy quantization. An analytical expression is developed, which explicitly defines the maximum energy quantization (termed as ``quantization threshold'') that an SET inverter can withstand before its noise margin falls below a specified tolerance level. The effects of energy quantization are further studiedfor the current-biased negative differential resistance (NDR) circuitand hybrid SETMOS circuit. A new model for the conductance of NDR characteristics is also formulated that explains the energy quantization effects.
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For the first time, the impact of energy quantisation in single electron transistor (SET) island on the performance of hybrid complementary metal oxide semiconductor (CMOS)-SET transistor circuits has been studied. It has been shown through simple analytical models that energy quantisation primarily increases the Coulomb Blockade area and Coulomb Blockade oscillation periodicity of the SET device and thus influences the performance of hybrid CMOS-SET circuits. A novel computer aided design (CAD) framework has been developed for hybrid CMOS-SET co-simulation, which uses Monte Carlo (MC) simulator for SET devices along with conventional SPICE for metal oxide semiconductor devices. Using this co-simulation framework, the effects of energy quantisation have been studied for some hybrid circuits, namely, SETMOS, multiband voltage filter and multiple valued logic circuits. Although energy quantisation immensely deteriorates the performance of the hybrid circuits, it has been shown that the performance degradation because of energy quantisation can be compensated by properly tuning the bias current of the current-biased SET devices within the hybrid CMOS-SET circuits. Although this study is primarily done by exhaustive MC simulation, effort has also been put to develop first-order compact model for SET that includes energy quantisation effects. Finally, it has been demonstrated that one can predict the SET behaviour under energy quantisation with reasonable accuracy by slightly modifying the existing SET compact models that are valid for metallic devices having continuous energy states.
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In this letter, a closed-form analytical model for temperature-dependent longitudinal diffusive lattice thermal conductivity (kappa) of a metallic single-walled carbon nanotube (SWCNT) has been addressed. Based on the Debye theory, the second-order three-phonon Umklapp, mass difference (MD), and boundary scatterings have been incorporated to formulate. in both low-and high-temperature regimes. It is proposed that. at low temperature (T) follows the T-3 law and is independent of the second-order three-phonon Umklapp and MD scatterings. The form factor due to MD scattering also plays a key role in the significant variation of. in addition to the SWCNT length. The present diameter-independent model of. agrees well with the available experimental data on suspended intrinsic metallic SWCNTs over a wide range of temperature and can be carried forward for electrothermal analyses of CNT-based interconnects.
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In this paper, we address a physics-based analytical model of electric-field-dependent electron mobility (mu) in a single-layer graphene sheet using the formulation of Landauer and Mc Kelvey's carrier flux approach under finite temperature and quasi-ballistic regime. The energy-dependent, near-elastic scattering rate of in-plane and out-of-plane (flexural) phonons with the electrons are considered to estimate mu over a wide range of temperature. We also demonstrate the variation of mu with carrier concentration as well as the longitudinal electric field. We find that at high electric field (>10(6) Vm(-1)), the mobility falls sharply, exhibiting the scattering between the electrons and flexural phonons. We also note here that under quasi-ballistic transport, the mobility tends to a constant value at low temperature, rather than in between T-2 and T-1 in strongly diffusive regime. Our analytical results agree well with the available experimental data, while the methodologies are put forward to estimate the other carrier-transmission-dependent transport properties.
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Coherent coupling between a large number of qubits is the goal for scalable approaches to solid state quantum information processing. Prototype systems can be characterized by spectroscopic techniques. Here, we use pulsed-continuous wave microwave spectroscopy to study the behavior of electrons trapped at defects within the gate dielectric of a sol-gel-based high-k silicon MOSFET. Disorder leads to a wide distribution in trap properties, allowing more than 1000 traps to be individually addressed in a single transistor within the accessible frequency domain. Their dynamical behavior is explored by pulsing the microwave excitation over a range of times comparable to the phase coherence time and the lifetime of the electron in the trap. Trap occupancy is limited to a single electron, which can be manipulated by resonant microwave excitation and the resulting change in trap occupancy is detected by the change in the channel current of the transistor. The trap behavior is described by a classical damped driven simple harmonic oscillator model, with the phase coherence, lifetime and coupling strength parameters derived from a continuous wave (CW) measurement only. For pulse times shorter than the phase coherence time, the energy exchange between traps, due to the coupling, strongly modulates the observed drain current change. This effect could be exploited for 2-qubit gate operation. The very large number of resonances observed in this system would allow a complex multi-qubit quantum mechanical circuit to be realized by this mechanism using only a single transistor.
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In this paper, a cellular neural network with depressing synapses for contrast-invariant pattern classification and synchrony detection is presented, starting from the impulse model of the single-electron tunneling junction. The results of the impulse model and the network are simulated using simulation program with integrated circuit emphasis (SPICE). It is demonstrated that depressing synapses should be an important candidate of robust systems since they exhibit a rapid depression of excitatory postsynaptic potentials for successive presynaptic spikes.