Synthesis of tellurium nanorods via spontaneous oxidation of NaHTe at room temperature

Trigonal phase of tellurium (t-Te) nanorods with tapered ends have been synthesized through spontaneous oxidation of NaHTe by dissolved oxygen at room temperature. Utilization of sodium dodecyl benzenesulfonate was found to help to obtain high-quality nanorods. The product was characterized by X-ray diffraction and Transmission electron microscopy. In addition, the possible nucleation and growth mechanism of the t-Te nanorods was discussed.

Synthesis and photoluminescence of the Y2O3 : Eu3+ phosphor nanowires in AAO template

The monodisperse array and nanowires Of Y2O3:Eu3+ phosphor were synthesized using anodic aluminum oxide (AAO) template by sol-gel method. Scanning electron microscope (SEM) images indicated that Y2O3:Eu3+ nanowires are parallelly arranged, all of which are in uniform diameter of about 50 nm. The high-magnification SEM image showed that each nanowire is composed of a lot of agglutinating particles. The patterns of selected-area electron diffraction confirmed that Y2O3:EU3+ nanowires mainly consist of polycrystalline materials. Excitation and emission spectra Of Y2O3:E U3+/AAO composite films were measured. The characteristic red emission peak of EU3+ ion attributed to D-5(0)-->F-7(2) transition in Y2O3:EU3+/AAO nanowires broadened its halfwidth.

Preparation of highly conductive, self-assembled gold/polyaniline nanocables and polyaniline nanotubes

One-dimensional gold/polyaniline (Au/PANI-CSA) coaxial nanocables with an average diameter of 5060 nm and lengths of more than 1 mu m were successfully synthesized by reacting aniline monomer with chlorauric acid (HAuCl4) through a self-assembly process in the presence Of D-camphor-10-sulfonic acid (CSA), which acts as both a dopant and surfactant. It was found that the formation probability and the size of the Au/PANI-CSA nanocables depends on the molar ratio of aniline to HAuCl4 and the concentration of CSA, respectively. A synergistic growth mechanism was proposed to interpret the formation of the Au/PANI-CSA nanocables. The directly measured conductivity of a single gold/polyaniline nanocable was found to be high (approximate to 77.2S cm(-1)). Hollow PANI-CSA nanotubes, with an average diameter of 50-60 nm, were also obtained successfully by dissolving the Au nanowire core of the Au/PANI-CSA nanocables.

Surfactantless synthesis of multiple shapes of gold nanostructures and their shape-dependent SERS spectroscopy

A useful method for the synthesis of various gold nanostructures is presented. The results demonstrated that flowerlike nanoparticle arrays, nanowire networks, nanosheets, and nanoflowers were obtained on the solid substrate under different experimental conditions. In addition, surface-enhanced Raman scattering (SERS) spectra of 4-aminothiophenol (4-ATP) on the as-prepared gold nanostructures of various shapes were measured, and their shape-dependent properties were evaluated. The intensity of the SERS signal was the smallest for the gold nanosheets, and the flowerlike nanoparticle arrays gave the strongest SERS signals.

Self-assembly of cinnamic acid-capped gold nanoparticles

In this work, a new capping agent, cinnamic acid ( CA) was used to synthesize Au nanoparticles (NPs) under ambient conditions. The size of the NPs can be controlled by adjusting the concentration of reductant ( in our experiment sodium borohydride was used) or CA. The CA-stabilized Au NPs can self-assemble into 'nanowire-like' or 'pearl-necklace-like' nanostructures by adjusting the molar ratio of CA to HAuCl4 or by tuning the pH value of the Au colloidal solution. The process of Au NPs self-assembly was investigated by UV - vis spectroscopy and transmission electron microscopy. The results reveal that the induced dipole - dipole interaction is the driving force of Au NP linear assemblies.

A solvothermal route to size- and shape-controlled CdSe and CdTe nanocrystals

The size- and shape-controlled CdSe and CdTe nanocrystals, which exhibit obvious quantum confinement effect, have been synthesized by a solvothermal route. It is found that initial precursor concentrations are key factors in controlling the shape of the resulting nanocrystals. Moreover, the obtained nanocrystals are all of zinc blende structure, regardless of their sizes and shapes. A possible mechanism for the formation and growth of the nanocrystals is put forward. It is inferred that the adhesion and subsequent recrystallization of nanocrystals with an assistance of remaining monomers should be a major reason for formation and growth of the elongated nanocrystals.

Construction of CdS nanostructures on DNA template by LB technique

Mixed monolayer films of octadecylamine (ODA) and oligo-DNA were prepared by Langmuir-Blodgett technique and the monolayer films were used as template to direct the formation of different CdS nanostructures. It was found that CdS nanowire was observed when the monolayer film prepared at low surface pressure was used as template, and aggregate of CdS spheres was obtained when the monolayer film deposited at high surface pressure was used as template.

纳电子器件制备的单根碳纳米管精确装配与电连接研究

目前,利用单根碳纳米管进行纳电子器件的研制成为纳电子学界研究的前沿与热点,但在纳电子器件研制过程中,如何实现单根碳纳米管与微电极的精确装配与电连接成为关键技术难题之一。为探索实现此关键技术的新方法,本文尝试将介电电泳与具有实时力/视觉反馈的原子力显微镜操作方法相结合,从而结合粗、精两级操作方式,来实现单根碳纳米管的精确装配与电连接。单根多壁碳纳米管的精确装配与电特性测试实验验证了该方法的有效性,从而为装配研制基于单根纳米管/线的纳电子器件提供了一种新颖可行的方法。

Nanostructured ferroelectric materials

Nanostructured materials are central to the evolution of future electronics and information technologies. Ferroelectrics have already been established as a dominant branch in the electronics sector because of their diverse application range such as ferroelectric memories, ferroelectric tunnel junctions, etc. The on-going dimensional downscaling of materials to allow packing of increased numbers of components onto integrated circuits provides the momentum for the evolution of nanostructured ferroelectric materials and devices. Nanoscaling of ferroelectric materials can result in a modification of their functionality, such as phase transition temperature or Curie temperature (TC), domain dynamics, dielectric constant, coercive field, spontaneous polarisation and piezoelectric response. Furthermore, nanoscaling can be used to form high density arrays of monodomain ferroelectric nanostructures, which is desirable for the miniaturisation of memory devices. This thesis details the use of various types of nanostructuring approaches to fabricate arrays of ferroelectric nanostructures, particularly non-oxide based systems. The introductory chapter reviews some exemplary research breakthroughs in the synthesis, characterisation and applications of nanoscale ferroelectric materials over the last decade, with priority given to novel synthetic strategies. Chapter 2 provides an overview of the experimental methods and characterisation tools used to produce and probe the properties of nanostructured antimony sulphide (Sb2S3), antimony sulpho iodide (SbSI) and lead titanate zirconate (PZT). In particular, Chapter 2 details the general principles of piezoresponse microscopy (PFM). Chapter 3 highlights the fabrication of arrays of Sb2S3 nanowires with variable diameters using newly developed solventless template-based approach. A detailed account of domain imaging and polarisation switching of these nanowire arrays is also provided. Chapter 4 details the preparation of vertically aligned arrays of SbSI nanorods and nanowires using a surface-roughness assisted vapour-phase deposition method. The qualitative and quantitative nanoscale ferroelectric properties of these nanostructures are also discussed. Chapter 5 highlights the fabrication of highly ordered arrays of PZT nanodots using block copolymer self-assembled templates and their ferroelectric characterisation using PFM. Chapter 6 summarises the conclusions drawn from the results reported in chapters 3, 4 and 5 and the future work.

Block copolymer self-assembly based device structures

This thesis investigated the block copolymer (BCP) thin film characteristics and pattern formation using a set of predetermined molecular weights of PS-b-PMMA and PS-b-PDMS. Post BCP pattern fabrication on the required base substrate a dry plasma etch process was utilised for successful pattern transfer of the BCP resist onto underlying substrate. The resultant sub-10 nm device features were used in front end of line (FEoL) fabrication of active device components in integrated circuits (IC). The potential use of BCP templates were further extended to metal and metal-oxide nanowire fabrication. These nanowires were further investigated in real-time applications as novel sensors and supercapacitors.

A study of silicon and germanium junctionless transistors

Technology boosters, such as strain, HKMG and FinFET, have been introduced into semiconductor industry to extend Moore’s law beyond 130 nm technology nodes. New device structures and channel materials are highly demanded to keep performance enhancement when the device scales beyond 22 nm. In this work, the properties and feasibility of the proposed Junctionless transistor (JNT) have been evaluated for both Silicon and Germanium channels. The performance of Silicon JNTs with 22 nm gate length have been characterized at elevated temperature and stressed conditions. Furthermore, steep Subthreshold Slopes (SS) in JNT and IM devices are compared. It is observed that the floating body in JNT is relatively dynamic comparing with that in IM devices and proper design of the device structure may further reduce the VD for a sub- 60 mV/dec subthreshold slope. Diode configuration of the JNT has also been evaluated, which demonstrates the first diode without junctions. In order to extend JNT structure into the high mobility material Germanium (Ge), a full process has been develop for Ge JNT. Germanium-on-Insulator (GeOI) wafers were fabricated using Smart-Cut with low temperature direct wafer bonding method. Regarding the lithography and pattern transfer, a top-down process of sub-50-nm width Ge nanowires is developed in this chapter and Ge nanowires with 35 nm width and 50 nm depth are obtained. The oxidation behaviour of Ge by RTO has been investigated and high-k passivation scheme using thermally grown GeO2 has been developed. With all developed modules, JNT with Ge channels have been fabricated by the CMOScompatible top-down process. The transistors exhibit the lowest subthreshold slope to date for Ge JNT. The devices with a gate length of 3 μm exhibit a SS of 216 mV/dec with an ION/IOFF current ratio of 1.2×103 at VD = -1 V and DIBL of 87 mV/V.

Synthesis & characterisation of group IV semiconducting nanowires

Semiconductor nanowires, particularly group 14 semiconductor nanowires, have been the subject of intensive research in the recent past. They have been demonstrated to provide an effective, versatile route towards the continued miniaturisation and improvement of microelectronics. This thesis aims to highlight some novel ways of fabricating and controlling various aspects of the growth of Si and Ge nanowires. Chapter 1 highlights the primary technique used for the growth of nanowires in this study, namely, supercritical fluid (SCF) growth reactions. The advantages (and disadvantages) of this technique for the growth of Si and Ge nanowires are highlighted, citing numerous examples from the past ten years. The many variables involved in this technique are discussed along with the resultant characteristics of nanowires produced (diameter, doping, orientation etc.). Chapter 2 outlines the experimental methodologies used in this thesis. The analytical techniques used for the structural characterisation of nanowires produced are also described as well as the techniques used for the chemical analysis of various surface terminations. Chapter 3 describes the controlled self-seeded growth of highly crystalline Ge nanowires, in the absence of conventional metal seed catalysts, using a variety of oligosilylgermane precursors and mixtures of germane and silane compounds. A model is presented which describes the main stages of self-seeded Ge nanowire growth (nucleation, coalescence and Ostwald ripening) from the oligosilylgermane precursors and in conjunction with TEM analysis, a mechanism of growth is proposed. Chapter 4 introduces the metal assisted etching (MAE) of Si substrates to produce Si nanowires. A single step metal-assisted etch (MAE) process, utilising metal ion-containing HF solutions in the absence of an external oxidant, was developed to generate heterostructured Si nanowires with controllable porous (isotropically etched) and non-porous (anisotropically etched) segments. In Chapter 5 the bottom-up growth of Ge nanowires, similar to that described in Chapter 3, and the top down etching of Si, described in Chapter 4, are combined. The introduction of a MAE processing step in order to “sink” the Ag seeds into the growth substrate, prior to nanowire growth, is shown to dramatically decrease the mean nanowire diameters and to narrow the diameter distributions. Finally, in Chapter 6, the biotin – streptavidin interaction was explored for the purposes of developing a novel Si junctionless nanowire transistor (JNT) sensor.

High speed nonlinear optical components for next-generation optical communications

Electronic signal processing systems currently employed at core internet routers require huge amounts of power to operate and they may be unable to continue to satisfy consumer demand for more bandwidth without an inordinate increase in cost, size and/or energy consumption. Optical signal processing techniques may be deployed in next-generation optical networks for simple tasks such as wavelength conversion, demultiplexing and format conversion at high speed (≥100Gb.s-1) to alleviate the pressure on existing core router infrastructure. To implement optical signal processing functionalities, it is necessary to exploit the nonlinear optical properties of suitable materials such as III-V semiconductor compounds, silicon, periodically-poled lithium niobate (PPLN), highly nonlinear fibre (HNLF) or chalcogenide glasses. However, nonlinear optical (NLO) components such as semiconductor optical amplifiers (SOAs), electroabsorption modulators (EAMs) and silicon nanowires are the most promising candidates as all-optical switching elements vis-à-vis ease of integration, device footprint and energy consumption. This PhD thesis presents the amplitude and phase dynamics in a range of device configurations containing SOAs, EAMs and/or silicon nanowires to support the design of all optical switching elements for deployment in next-generation optical networks. Time-resolved pump-probe spectroscopy using pulses with a pulse width of 3ps from mode-locked laser sources was utilized to accurately measure the carrier dynamics in the device(s) under test. The research work into four main topics: (a) a long SOA, (b) the concatenated SOA-EAMSOA (CSES) configuration, (c) silicon nanowires embedded in SU8 polymer and (d) a custom epitaxy design EAM with fast carrier sweepout dynamics. The principal aim was to identify the optimum operation conditions for each of these NLO device configurations to enhance their switching capability and to assess their potential for various optical signal processing functionalities. All of the NLO device configurations investigated in this thesis are compact and suitable for monolithic and/or hybrid integration.

Simulation of multigate SOI transistors with silicon, germanium and III-V channels

In this work by employing numerical three-dimensional simulations we study the electrical performance and short channel behavior of several multi-gate transistors based on advanced SOI technology. These include FinFETs, triple-gate and gate-all-around nanowire FETs with different channel material, namely Si, Ge, and III-V compound semiconductors, all most promising candidates for future nanoscale CMOS technologies. Also, a new type of transistor called “junctionless nanowire transistor” is presented and extensive simulations are carried out to study its electrical characteristics and compare with the conventional inversion- and accumulation-mode transistors. We study the influence of device properties such as different channel material and orientation, dimensions, and doping concentration as well as quantum effects on the performance of multi-gate SOI transistors. For the modeled n-channel nanowire devices we found that at very small cross sections the nanowires with silicon channel are more immune to short channel effects. Interestingly, the mobility of the channel material is not as significant in determining the device performance in ultrashort channels as other material properties such as the dielectric constant and the effective mass. Better electrostatic control is achieved in materials with smaller dielectric constant and smaller source-to-drain tunneling currents are observed in channels with higher transport effective mass. This explains our results on Si-based devices. In addition to using the commercial TCAD software (Silvaco and Synopsys TCAD), we have developed a three-dimensional Schrödinger-Poisson solver based on the non-equilibrium Green’s functions formalism and in the framework of effective mass approximation. This allows studying the influence of quantum effects on electrical performance of ultra-scaled devices. We have implemented different mode-space methodologies in our 3D quantum-mechanical simulator and moreover introduced a new method to deal with discontinuities in the device structures which is much faster than the coupled-mode-space approach.

Nanoscale electronic properties of conjugated polymers and nanocrystals

The objective of this thesis is the exploration and characterisation of the nanoscale electronic properties of conjugated polymers and nanocrystals. In Chapter 2, the first application of conducting-probe atomic force microscopy (CP-AFM)-based displacement-voltage (z-V) spectroscopy to local measurement of electronic properties of conjugated polymer thin films is reported. Charge injection thresholds along with corresponding single particle gap and exciton binding energies are determined for a poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene] thin film. By performing measurements across a grid of locations on the film, a series of exciton binding energy distributions are identified. The variation in measured exciton binding energies is in contrast to the smoothness of the film suggesting that the variation may be attributable to differences in the nano-environment of the polymer molecules within the film at each measurement location. In Chapter 3, the CP-AFM-based z-V spectroscopy method is extended for the first time to local, room temperature measurements of the Coulomb blockade voltage thresholds arising from sequential single electron charging of 28 kDa Au nanocrystal arrays. The fluid-like properties of the nanocrystal arrays enable reproducible formation of nanoscale probe-array-substrate junctions, allowing the influence of background charge on the electronic properties of the array to be identified. CP-AFM also allows complementary topography and phase data to be acquired before and after spectroscopy measurements, enabling comparison of local array morphology with local measurements of the Coulomb blockade thresholds. In Chapter 4, melt-assisted template wetting is applied for the first time to massively parallel fabrication of poly-(3-hexylthiophene) nanowires. The structural characteristics of the wires are first presented. Two-terminal electrical measurements of individual nanowires, utilising a CP-AFM tip as the source electrode, are then used to obtain the intrinsic nanowire resistivity and the total nanowire-electrode contact resistance subsequently allowing single nanowire hole mobility and mean nanowire-electrode barrier height values to be estimated. In Chapter 5, solution-assisted template wetting is used for fabrication of fluorene-dithiophene co-polymer nanowires. The structural characteristics of these wires are also presented. Two-terminal electrical measurements of individual nanowires indicate barrier formation at the nanowire-electrode interfaces and measured resistivity values suggest doping of the nanowires, possibly due to air exposure. The first report of single conjugated polymer nanowires as ultra-miniature photodetectors is presented, with single wire devices yielding external quantum efficiencies ~ 0.1 % and responsivities ~ 0.4 mA/W under monochromatic illumination.