Translucent Procedures, Abstraction without Opacity

This report introduces TRANSLUCENT PROCEDURES as a new mechanism for implementing behavioral abstractions. Like an ordinary procedure, a translucent procedure can be invoked, and thus provides an obvious way to capture a BEHAVIOR. Translucent procedures, like ordinary procedures, can be manipulated as first-class objects and combined using functional composition. But unlike ordinary procedures, translucent procedures have structure that can be examined in well-specified non-destructive ways, without invoking the procedure.

New Architectural Models for Visibly Controllable Computing: The Relevance of Dynamic Object Oriented Architectures and Plan Based Computing Models

Traditionally, we've focussed on the question of how to make a system easy to code the first time, or perhaps on how to ease the system's continued evolution. But if we look at life cycle costs, then we must conclude that the important question is how to make a system easy to operate. To do this we need to make it easy for the operators to see what's going on and to then manipulate the system so that it does what it is supposed to. This is a radically different criterion for success. What makes a computer system visible and controllable? This is a difficult question, but it's clear that today's modern operating systems with nearly 50 million source lines of code are neither. Strikingly, the MIT Lisp Machine and its commercial successors provided almost the same functionality as today's mainstream sytsems, but with only 1 Million lines of code. This paper is a retrospective examination of the features of the Lisp Machine hardware and software system. Our key claim is that by building the Object Abstraction into the lowest tiers of the system, great synergy and clarity were obtained. It is our hope that this is a lesson that can impact tomorrow's designs. We also speculate on how the spirit of the Lisp Machine could be extended to include a comprehensive access control model and how new layers of abstraction could further enrich this model.

Strained Silicon on Silicon by Wafer Bonding and Layer Transfer from Relaxed SiGe Buffer

We report the creation of strained silicon on silicon (SSOS) substrate technology. The method uses a relaxed SiGe buffer as a template for inducing tensile strain in a Si layer, which is then bonded to another Si handle wafer. The original Si wafer and the relaxed SiGe buffer are subsequently removed, thereby transferring a strained-Si layer directly to Si substrate without intermediate SiGe or oxide layers. Complete removal of Ge from the structure was confirmed by cross-sectional transmission electron microscopy as well as secondary ion mass spectrometry. A plan-view transmission electron microscopy study of the strained-Si/Si interface reveals that the lattice-mismatch between the layers is accommodated by an orthogonal array of edge dislocations. This misfit dislocation array, which forms upon bonding, is geometrically necessary and has an average spacing of approximately 40nm, in excellent agreement with established dislocation theory. To our knowledge, this is the first study of a chemically homogeneous, yet lattice-mismatched, interface.

Memory Hierarchy Hardware-Software Co-design in Embedded Systems

The memory hierarchy is the main bottleneck in modern computer systems as the gap between the speed of the processor and the memory continues to grow larger. The situation in embedded systems is even worse. The memory hierarchy consumes a large amount of chip area and energy, which are precious resources in embedded systems. Moreover, embedded systems have multiple design objectives such as performance, energy consumption, and area, etc. Customizing the memory hierarchy for specific applications is a very important way to take full advantage of limited resources to maximize the performance. However, the traditional custom memory hierarchy design methodologies are phase-ordered. They separate the application optimization from the memory hierarchy architecture design, which tend to result in local-optimal solutions. In traditional Hardware-Software co-design methodologies, much of the work has focused on utilizing reconfigurable logic to partition the computation. However, utilizing reconfigurable logic to perform the memory hierarchy design is seldom addressed. In this paper, we propose a new framework for designing memory hierarchy for embedded systems. The framework will take advantage of the flexible reconfigurable logic to customize the memory hierarchy for specific applications. It combines the application optimization and memory hierarchy design together to obtain a global-optimal solution. Using the framework, we performed a case study to design a new software-controlled instruction memory that showed promising potential.

Partial disjoint path for multi-layer protection in GMPLS networks

In this paper, different recovery methods applied at different network layers and time scales are used in order to enhance the network reliability. Each layer deploys its own fault management methods. However, current recovery methods are applied to only a specific layer. New protection schemes, based on the proposed partial disjoint path algorithm, are defined in order to avoid protection duplications in a multi-layer scenario. The new protection schemes also encompass shared segment backup computation and shared risk link group identification. A complete set of experiments proves the efficiency of the proposed methods in relation with previous ones, in terms of resources used to protect the network, the failure recovery time and the request rejection ratio

Enhanced multi-layer protection in multi-service GMPLS networks

This paper focuses on QoS routing with protection in an MPLS network over an optical layer. In this multi-layer scenario each layer deploys its own fault management methods. A partially protected optical layer is proposed and the rest of the network is protected at the MPLS layer. New protection schemes that avoid protection duplications are proposed. Moreover, this paper also introduces a new traffic classification based on the level of reliability. The failure impact is evaluated in terms of recovery time depending on the traffic class. The proposed schemes also include a novel variation of minimum interference routing and shared segment backup computation. A complete set of experiments proves that the proposed schemes are more efficient as compared to the previous ones, in terms of resources used to protect the network, failure impact and the request rejection ratio

Adobe Photoshop : Layer Basics

Find out more about Photoshop layers with this share of links and video tutorials.

Black Boxes and Abstraction or A quick run through how computers work

How we get from transistors through to logic gates to ALUs and memory to the stored program and the fetch execute cycle through to machine code and high level languages. Inspired by Tanenbaum's approach in "Structured Computer Organozation"

Abstraction: From Transistors to Computers and from Bits to Programs

Takes the Tanenbaum (Structured Computer Organisation) approach to show how application of successive levels of abstraction allow us to understand how computers are made from transitors and how they are programmed.

Immersió guiada en el maquinari dels ordinadors. 'Inmersión guiada en el hardware de los ordenadores'.

Resumen tomado de la publicación. Se adjuntan actividades de consolidación de los contenidos del curso. Incluye imágenes

Loss of nerve fiber layer in HIV positive patients and comparative patterns in a series of cases in Bucaramanga, Colombia

Objective: The objective of this study is to conduct a description of the features of optic neuropathy associated with Human Immunodeficiency Virus in relation to their possible incidence within our population, regarding that there is no data in our population in terms of frequency of this pathology (1,2). Methodology: Descriptive cross-sectional study of a clinical series of patients infected with human immunodeficiency virus, but AIDS, and the thickness of optic nerve´s layer of fibers studied with OCT technology (optical coherence tomography), patients were cited once captured. OCT was performed by the same observer, by taking 3 shots and picking the one with better reliability. Patients were given personally to the Ophthalmologic Foundation of Santander to conduct the review called OCT (optical coherence tomography). Results: In terms of viral load variable, we found a clear correlation in which validates the hypothesis that lower viral load means a thicker layer of fibers finding statistically significant differences for the 6 hours in right eye and 12 and 6 hours in left eye. Comparison between the known nomogram of fiber layer thickness for the population of Bucaramanga, Santander and thickness found in our sample, we note a clear decrease in the upper and lower quadrants, specifically in 7 hours and 11 hours, being more important in 7 hours, showing statistically significant differences. Conclusions: The pattern  of thinning of the nerve fiber layer in HIV positive patients without AIDS, and antiretroviral treatment type HAART, showed a statistically significant thinning targeted at 7 hours and 11 hours, being higher in first. Viral load figures have a direct relation with loss fiber layer, showing a statistically significant difference for the 6 and 12 hours.