938 resultados para low power electronics


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A grid-connected microinverter with a reduced number of power conversion stages and fewer passive components is proposed. A high-frequency transformer and a series-resonant tank are used to interface the full-bridge inverter to the half-wave cycloconverter. All power switches are switched with zero-voltage switching. Phase-shift power modulation is used to control the output power of the inverter. A steady-state analysis of the proposed topology is presented to determine the average output power of the inverter. Analysis of soft switching of the full-bridge and the half-wave cycloconverter is presented with respect to voltage gain, quality factor, and phase shift of the inverter. Simulation and experimental results are presented to validate the operation of the proposed topology.

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Modulation and control of a cascade multilevel static synchronous compensator (STATCOM) configuration to improve the quality of voltage generated by wind power systems are presented. The proposed STATCOM configuration needs only four dc-link capacitors and 24 switches to synthesise nine-level operation. In addition to that, switching losses are further reduced by splitting the voltage source inverter of the STATCOM into two units called the `bulk inverter` and the `conditioning inverter`. The high-power bulk inverter is operated at low frequency whereas the low-power conditioning inverter is operated at high frequency to suppress harmonics produced by the bulk inverter. Fluctuations at the point of common coupling voltage, caused by sudden wind changes, are suppressed by controlling reactive power of the STATCOM. Simulation and experimental results are presented to verify the efficacy of the proposed modulation and control techniques used in the STATCOM.

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It is commonly believed that in order to synthesize high-quality hydrogenated amorphous silicon carbide (a-Si1-xCx : H) films at competitive deposition rates it is necessary to operate plasma discharges at high power regimes and with heavy hydrogen dilution. Here we report on the fabrication of hydrogenated amorphous silicon carbide films with different carbon contents x (ranging from 0.09 to 0.71) at high deposition rates using inductively coupled plasma (ICP) chemical vapour deposition with no hydrogen dilution and at relatively low power densities (∼0.025 W cm -3) as compared with existing reports. The film growth rate R d peaks at x = 0.09 and x = 0.71, and equals 18 nm min-1 and 17 nm min-1, respectively, which is higher than other existing reports on the fabrication of a-Si1-xCx : H films. The extra carbon atoms for carbon-rich a-Si1-xCx : H samples are incorporated via diamond-like sp3 C-C bonding as deduced by Fourier transform infrared absorption and Raman spectroscopy analyses. The specimens feature a large optical band gap, with the maximum of 3.74 eV obtained at x = 0.71. All the a-Si1-xCx : H samples exhibit low-temperature (77 K) photoluminescence (PL), whereas only the carbon-rich a-Si1-xCx : H samples (x ≥ 0.55) exhibit room-temperature (300 K) PL. Such behaviour is explained by the static disorder model. High film quality in our work can be attributed to the high efficiency of the custom-designed ICP reactor to create reactive radical species required for the film growth. This technique can be used for a broader range of material systems where precise compositional control is required. © 2008 IOP Publishing Ltd.

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Reliable calculations of the electron/ion energy losses in low-pressure thermally nonequilibrium low-temperature plasmas are indispensable for predictive modeling related to numerous applications of such discharges. The commonly used simplified approaches to calculation of electron/ion energy losses to the chamber walls use a number of simplifying assumptions that often do not account for the details of the prevailing electron energy distribution function (EEDF) and overestimate the contributions of the electron losses to the walls. By direct measurements of the EEDF and careful calculation of contributions of the plasma electrons in low-pressure inductively coupled plasmas, it is shown that the actual losses of kinetic energy of the electrons and ions strongly depend on the EEDF. It is revealed that the overestimates of the total electron/ion energy losses to the walls caused by improper assumptions about the prevailing EEDF and about the ability of the electrons to pass through the repulsive potential of the wall may lead to significant overestimates that are typically in the range between 9 and 32%. These results are particularly important for the development of power-saving strategies for operation of low-temperature, low-pressure gas discharges in diverse applications that require reasonably low power densities. © 2008 American Institute of Physics.

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The usual practice to study a large power system is through digital computer simulation. However, the impact of large scale use of small distributed generators on a power network cannot be evaluated strictly by simulation since many of these components cannot be accurately modelled. Moreover, the network complexity makes the task of practical testing on a physical network nearly impossible. This study discusses the paradigm of interfacing a real-time simulation of a power system to real-life hardware devices. This type of splitting a network into two parts and running a real-time simulation with a physical system in parallel is usually termed as power-hardware-in-the-loop (PHIL) simulation. The hardware part is driven by a voltage source converter that amplifies the signals of the simulator. In this paper, the effects of suitable control strategy on the performance of PHIL and the associated stability aspects are analysed in detail. The analyses are validated through several experimental tests using an real-time digital simulator.

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To overcome the limitations of existing gate drive topologies an improved gate drive concept is proposed to provide fast, controlled switching of power MOSFETs. The proposed topology exploits the cascode configuration with the inclusion of an active gate clamp to ensure that the driven MOSFET may be turned off under all load conditions. Key operating principles and advantages of the proposed gate drive topology are discussed. Characteristic waveforms are investigated via simulation and experimentation for the cascode driver in an inductive switching application at 375V and 10A. Experimental waveforms compared well with simulations with long gate charging delays (including the Miller plateau) being eliminated from the gate voltage waveform.

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This paper presents a grid-side inverter based supercapacitor direct integration scheme for wind power systems. The inverter used in this study consists of a conventional two-level inverter and three H-bridge modules. Three supercapacitor banks are directly connected to the dc-links of H-bridge modules. This approach eliminates the need for interfacing dc-dc converters and thus considerably improves the overall efficiency. However, for the maximum utilization of super capacitors their voltages should be allowed to vary. As a result of this variable voltage space vectors of the hybrid inverter get distributed unevenly. To handle this issue, a modified PWM method and a space vector modulation method are proposed and they can generate undistorted current even in the presence of unevenly distributed space vectors. A supercapacitor voltage balancing method is also presented in this paper. Simulation results are presented to validate the efficacy of the proposed scheme, modulation methods and control techniques.

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This paper explores the possibility of using grid side inverter as an interface to connect energy storage systems. A dual inverter system, formed by cascading two 2-level inverters through a coupling transformer, is used as the testing model. The inverters are named as “main inverter” and “auxiliary inverter”. The main inverter is powered by the rectified output of the wind generator while the auxiliary inverter is attached to a Battery Energy Storage System (BESS). If there is a surplus of wind power compared to the demand, then that would be stored in BESS while if there is a deficit in wind power then the demand will be satisfied by supplying power from the BESS. This enables constant power dispatch to the grid irrespective of wind changes. Novel modulation and control techniques are proposed to address the problem of non-integer, dynamically-varying dc-link voltage ratio, which is due to random wind changes. Furthermore, a maximum power tracking controller for this unique system is explained in detail. Simulation results verify the efficacy of proposed modulation and control techniques in suppressing random power fluctuations.

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Modulation and control of a cascade multilevel inverter, which has a high potential in future wind generation applications, are presented. The inverter is a combination of a high power, three level “bulk inverter” and a low power “conditioning inverter”. To minimize switching losses, the bulk inverter operates at a low frequency producing square wave outputs while high frequency conditioning inverter is used to suppress harmonic content produced by the bulk inverter output. This paper proposes an improved Space Vector Modulation (SVM) algorithm and a neutral point potential balancing technique for the inverter. Furthermore, a maximum power tracking controller for the Permanent Magnet Synchronous Generator (PMSG) is described in detail. The proposed SVM technique eliminates most of the computational burdens on the digital controller and renders a greater controllability under varying DC-link voltage conditions. The DC-link capacitor voltage balancing of both bulk and conditioning inverters is carried out using Redundant State Selection (RSS) method and is explained in detail. Experimental results are presented to verify the proposed modulation and control techniques.

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This paper presents a novel STATCOM configuration for voltage quality improvement in wind power generation systems. The proposed STATCOM is formed by cascading two 3-level inverters, `bulk inverter' and `conditioning inverter', through a coupling transformer. Both inverters are powered by dc-link capacitors and they are charged by a small amount of active power drawn from the grid. To minimize switching losses, the high power bulk inverter operates at low frequency while low power high frequency conditioning inverter is used to suppress harmonic content produced by the bulk inverter output. With only 24 switches this topology can synthesize a nine level inverter, if the dc-link voltage ratio is maintained at 3:1. Modulation and control techniques have been developed to meet this requirement. Reactive power of the STATCOM is controlled to mitigate voltage sags or swells caused by sudden wind changes. Simulation and experimental results are presented to verify the efficacy of the proposed modulation and control techniques used in the STATCOM.

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A power electronics-based buffer is examined in which through control of its PWM converters, the buffer-load combination is driven to operate under either constant power or constant impedance modes. A battery, incorporated within the buffer, provides the energy storage facility to facilitate the necessary power flow control. Real power demand from upstream supply is regulated under fault condition, and the possibility of voltage or network instability is reduced. The proposed buffer is also applied to a wind farm. It is shown that the buffer stabilizes the power contribution from the farm. Based on a battery cost-benefit analysis, a method is developed to determine the optimal level of the power supplied from the wind farm and the corresponding capacity of the battery storage system.

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Unidirectional inductive power transfer (UIPT) systems allow loads to consume power while bidirectional IPT (BIPT) systems are more suitable for loads requiring two way power flow such as vehicle to grid (V2G) applications with electric vehicles (EVs). Many attempts have been made to improve the performance of BIPT systems. In a typical BIPT system, the output power is control using the pickup converter phase shift angle (PSA) while the primary converter regulates the input current. This paper proposes an optimized phase shift modulation strategy to minimize the coil losses of a series – series (SS) compensated BIPT system. In addition, a comprehensive study on the impact of power converters on the overall efficiency of the system is also presented. A closed loop controller is proposed to optimize the overall efficiency of the BIPT system. Theoretical results are presented in comparison to both simulations and measurements of a 0.5 kW prototype to show the benefits of the proposed concept. Results convincingly demonstrate the applicability of the proposed system offering high efficiency over a wide range of output power.

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Two studies documented the “David and Goliath” rule—the tendency for people to perceive criticism of “David” groups (groups with low power and status) as less normatively permissible than criticism of “Goliath” groups (groups with high power and status). The authors confirmed the existence of the David and Goliath rule across Western and Chinese cultures (Study 1). However, the rule was endorsed more strongly in Western than in Chinese cultures, an effect mediated by cultural differences in power distance. Study 2 identified the psychological underpinnings of this rule in an Australian sample. Lower social dominance orientation (SDO) was associated with greater endorsement of the rule, an effect mediated through the differential attribution of stereotypes. Specifically, those low in SDO were more likely to attribute traits of warmth and incompetence to David versus Goliath groups, a pattern of stereotypes that was related to the protection of David groups from criticism.

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This thesis proposes a novel gate drive circuit to improve the switching performance of MOSFET power switches in power electronic converters. The proposed topology exploits the cascode configuration, allowing the minimisation of switching losses in the presence of practical circuit constraints, which enables efficiency and power density improvements. Switching characteristics of the new topology are investigated and key mechanisms that control the switching process are identified. Unique analysis tools and techniques are also developed to demonstrate the application of the cascode gate drive circuit for switching performance optimisation.