Cognitive deficit and depressive symptoms in a community group of elderly people: a preliminary study

Since the number and proportion of old people increases worldwide, health professionals and systems should be made aware and prepared to deal with their problems. Cognitive deficit and symptoms of depression are commom among the elderly, and may occur in relation to various risk factors such as health conditions and psychosocial variables. In order to study cognitive deficit and the presence of signs and symptoms of depression, 62 elderly community subjects enrolled at a Community Health Unit in Porto Alegre, southern Brazil, were interviewed. They were evaluated by means of the Mini Mental State Exam, the Montgomery-Asberg Depression rating scale, and a questionnaire on health conditions, living arrangements and social variables. Higher levels of symptoms of depression were observed among subjects exposed to major risk factors for cerebrovascular diseases (diabetes and coronary disease), while impaired cognitive performance was seen among individuals who could not count on the presence of a confidant (social network variable). The results suggest that the early identification of major risk groups among old people can help to prevent institutionalization and keep individuals in the community.

Projecto de um conversor redutor CC-CC comutado para SoC

A evolução da tecnologia CMOS tem possibilitado uma maior densidade de integração de circuitos tornando possível o aumento da complexidade dos sistemas. No entanto, a integração de circuitos de gestão de potência continua ainda em estudo devido à dificuldade de integrar todos os componentes. Esta solução apresenta elevadas vantagens, especialmente em aplicações electrónicas portáteis alimentadas a baterias, onde a autonomia é das principais características. No âmbito dos conversores redutores existem várias topologias de circuitos que são estudadas na área de integração. Na categoria dos conversores lineares utiliza-se o LDO (Low Dropout Regulator), apresentando no entanto baixa eficiência para relações de conversão elevadas. Os conversores comutados são elaborados através do recurso a circuitos de comutação abrupta, em que a eficiência deste tipo de conversores não depende do rácio de transformação entre a tensão de entrada e a de saída. A diminuição física dos processos CMOS tem como consequência a redução da tensão máxima que os transístores suportam, impondo o estudo de soluções tolerantes a “altatensão”, com o intuito de manter compatibilidade com tensões superiores que existam na placa onde o circuito é incluído. Os sistemas de gestão de energia são os primeiros a acompanhar esta evolução, tendo de estar aptos a fornecer a tensão que os restantes circuitos requerem. Neste trabalho é abordada uma metodologia de projecto para conversores redutores CCCC comutados em tecnologia CMOS, tendo-se maximizado a frequência com vista à integração dos componentes de filtragem em circuito integrado. A metodologia incide sobre a optimização das perdas totais inerentes à comutação e condução, dos transístores de potência e respectivos circuitos auxiliares. É apresentada uma nova metodologia para o desenvolvimento de conversores tolerantes a “alta-tensão”.

Organization knowledge management change from a complex adaptive systems perpective with ability for ambidexeterity

We are working on the confluence of knowledge management, organizational memory and emergent knowledge with the lens of complex adaptive systems. In order to be fundamentally sustainable organizations search for an adaptive need for managing ambidexterity of day-to-day work and innovation. An organization is an entity of a systemic nature, composed of groups of people who interact to achieve common objectives, making it necessary to capture, store and share interactions knowledge with the organization, this knowledge can be generated in intra-organizational or inter-organizational level. The organizations have organizational memory of knowledge of supported on the Information technology and systems. Each organization, especially in times of uncertainty and radical changes, to meet the demands of the environment, needs timely and sized knowledge on the basis of tacit and explicit. This sizing is a learning process resulting from the interaction that emerges from the relationship between the tacit and explicit knowledge and which we are framing within an approach of Complex Adaptive Systems. The use of complex adaptive systems for building the emerging interdependent relationship, will produce emergent knowledge that will improve the organization unique developing.

A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V-OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm(2) in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm(2), is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m(2). After starting-up, the system requires an irradiance of only 0.18 W/m(2) (18 mu W/cm(2)) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mu W. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 mu W, which is comparable with reported values from circuits operating at similar power levels.

Object transportation by multiple mobile robots controlled by attractor dynamics: theory and implementation

Dynamical systems theory is used as a theoretical language and tool to design a distributed control architecture for teams of mobile robots, that must transport a large object and simultaneously avoid collisions with (either static or dynamic) obstacles. Here we demonstrate in simulations and implementations in real robots that it is possible to simplify the architectures presented in previous work and to extend the approach to teams of n robots. The robots have no prior knowledge of the environment. The motion of each robot is controlled by a time series of asymptotical stable states. The attractor dynamics permits the integration of information from various sources in a graded manner. As a result, the robots show a strikingly smooth an stable team behaviour.

From design-for-test to design-for-debug-and-test: analysis of requirements and limitations for 1149.1

The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mounting technologies restrict the usefulness of conventional in-circuit debugging tools, such as in-circuit emulators for microprocessors and microcontrollers. However, this same trend enables the development of more complex products, which in turn require more powerful debugging tools. These conflicting demands could be met if the standard scan test infrastructures now common in most complex components were able to match the debugging requirements of design verification and prototype validation. This paper analyses the main debug requirements in the design of microprocessor-based applications and the feasibility of their implementation using the mandatory, optional and additional operating modes of the standard IEEE 1149.1 test infrastructure.

ALS-Sence: sistema de aquisição e processamento de electromiogramas para pacientes com ALS

Dissertação para obtenção do grau de Mestre em Engenharia de Eletrónica e Computadores

Intelligent decision support systems for collaboration in industrial plants

Dissertação apresentada para obtenção do Grau de Doutor em Sistemas de Informação Industriais, Engenharia Electrotécnica, pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

A Generic and Compositional Framework for Multicore Response Time Analysis

23rd International Conference on Real-Time Networks and Systems (RTNS 2015). 4 to 6, Nov, 2015, Main Track. Lille, France. Best Paper Award Nominee

Study of the Reliability of Statistical Timing Analysis for Real-Time Systems

Presented at 23rd International Conference on Real-Time Networks and Systems (RTNS 2015). 4 to 6, Nov, 2015, Main Track. Lille, France.

Effects of Acute Autonomic Modulation on Atrial Conduction Delay and Local Electrograms Duration in Paroxysmal Atrial Fibrillation

Slowed atrial conduction may contribute to reentry circuits and vulnerability for atrial fibrillation (AF). The autonomic nervous system (ANS) has modulating effects on electrophysiological properties. However, complex interactions of the ANS with the arrhythmogenic substrate make it difficult to understand the mechanisms underlying induction and maintenance of AF. AIM: To determine the effect of acute ANS modulation in atrial activation times in patients (P) with paroxysmal AF (PAF). METHODS AND RESULTS: 16P (9 men; 59±14years) with PAF, who underwent electrophysiological study before AF ablation, and 15P (7 men; 58±11years) with atrioventricular nodal reentry tachycardia, without documentation or induction of AF (control group). Each group included 7P with arterial hypertension but without underlying structural heart disease. The study was performed while off drugs. Multipolar catheters were placed at the high right atrium (HRA), right atrial appendage (RAA), coronary sinus (CS) and His bundle area (His). At baseline and with HRA pacing (600ms, shortest propagated S2) we measured: i) intra-atrial conduction time (IACT, between RAA and atrial deflection in the distal His), ii) inter-atrial conduction time (interACT, between RAA and distal CS), iii) left atrial activation time (LAAT, between atrial deflection in the distal His and distal CS), iv) bipolar electrogram duration at four atrial sites (RAA, His, proximal and distal CS). In the PAF group, measurements were also determined during handgrip and carotid sinus massage (CSM), and after pharmacological blockade of the ANS (ANSB). AF was induced by HRA programmed stimulation in 56% (self-limited - 6; sustained - 3), 68.8% (self-limited - 6; sustained - 5), and 50% (self-limited - 5; sustained - 3) of the P, in basal, during ANS maneuvers, and after ANSB, respectively (p=NS). IACT, interACT and LAAT significantly lengthened during HRA pacing in both groups (600ms, S2). P with PAF have longer IACT (p<0.05), a higher increase in both IACT, interACT (p<0.01) and electrograms duration (p<0.05) with S2, and more fragmented activity, compared with the control group. Atrial conduction times and electrograms duration were not significantly changed during ANS stimulation. Nevertheless, ANS maneuvers increased heterogeneity of the local electrograms duration. Also, P with sustained AF showed longer interACT and LAAT during CSM. CONCLUSION: Atrial conduction times, electrograms duration and fractionated activity are increased in PAF, suggesting a role for conduction delays in the arrhythmogenic substrate. Acute vagal stimulation is associated with prolonged interACT and LAAT in P with inducible sustained AF and ANS modulation may influence the heterogeneity of atrial electrograms duration.

Responsible innovation: bringing together technology assessment, applied ethics, and STS research

Paper presented as "key note" at the Doctorate Conference on Technology Assessment in June 2011, at FCT-UNL, Monte de Caparica.

Controller implementation using analog reconfigurable hardware (FPAA)

This Thesis has the main target to make a research about FPAA/dpASPs devices and technologies applied to control systems. These devices provide easy way to emulate analog circuits that can be reconfigurable by programming tools from manufactures and in case of dpASPs are able to be dynamically reconfigurable on the fly. It is described different kinds of technologies commercially available and also academic projects from researcher groups. These technologies are very recent and are in ramp up development to achieve a level of flexibility and integration to penetrate more easily the market. As occurs with CPLD/FPGAs, the FPAA/dpASPs technologies have the target to increase the productivity, reducing the development time and make easier future hardware reconfigurations reducing the costs. FPAA/dpAsps still have some limitations comparing with the classic analog circuits due to lower working frequencies and emulation of complex circuits that require more components inside the integrated circuit. However, they have great advantages in sensor signal condition, filter circuits and control systems. This thesis focuses practical implementations of these technologies to control system PID controllers. The result of the experiments confirms the efficacy of FPAA/dpASPs on signal condition and control systems.

Verification of analog circuits in power-down mode

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e Computadores

Predictive control of a current-source inverter for solar photovoltaic grid interface

Solar photovoltaic systems are an increasing option for electricity production, since they produce electrical energy from a clean renewable energy resource, and over the years, as a result of the research, their efficiency has been increasing. For the interface between the dc photovoltaic solar array and the ac electrical grid is necessary the use of an inverter (dc-ac converter), which should be optimized to extract the maximum power from the photovoltaic solar array. In this paper is presented a solution based on a current-source inverter (CSI) using continuous control set model predictive control (CCS-MPC). All the power circuits and respective control systems are described in detail along the paper and were tested and validated performing computer simulations. The paper shows the simulation results and are drawn several conclusions.