Implementação de um protótipo de uma aplicação multimídia sobre a Ilha Rei George, Antártica

Esta dissertação aborda a implementação de um protótipo de aplicação multimídia referente à Ilha Rei George (61º 50’ S, 57º 30’ W e 62º 15’ S, 59º 00' W), Antártica. Nessa ilha o Brasil mantém sua única estação polar, onde realiza parte das pesquisas do Programa Antártico Brasileiro (PROANTAR). O presente trabalho visa reduzir a carência por materiais didáticos em língua portuguesa sobre as regiões polares e aborda aspectos gerais da biota, geografia física (geologia, climatologia e oceanografia) e geografia humana (história de ocupação, turismo, pesquisa e impactos gerados pela presença humana). O público alvo são pessoas com nível de instrução de ensino médio incompleto ou níveis mais avançados. O conteúdo é apresentado de forma a cativar a atenção do usuário, sem exageros estéticos. A fim de obter material para subsidiar o projeto, foram realizados registros por meio de fotografias, gravações em vídeo e entrevistas durante os trabalhos de campo na ilha, realizados no verão de 2004. Além dos registros em campo, são apresentados materiais didáticos tais como textos, ilustrações e animações em 3D. Parte do material gerado está disponível para utilização posterior em outros projetos O ambiente de desenvolvimento utilizado para a aplicação foi o Macromedia Director, para Apple Macintosh. O produto do projeto é um protótipo que pode ser distribuído em mídia removível, CD-ROM (Compact Disk Read Only Memory) ou DVD-ROM (Digital Versatile Disc Read Only Memory) e é encontrado como um encarte no final desta dissertação. A informação compilada e reunida na aplicação permite ao público acesso a dados atualizados sobre o ambiente antártico de forma simples, didática e interativa. O trabalho esclarece as relações entre a Antártica e o mundo, principalmente no que faz referência à ilha Rei George, buscando a valorização das regiões polares.

Práticas de formação continuada da EJA pelo olhar investigativo da formadora

Pós-graduação em Educação - IBRC

A recepção crítica de J.-K. Huysmans em periódicos no Brasil (1884 – 2013)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

A type system with usage aspects

Linear typing schemes can be used to guarantee non-interference and so the soundness of in-place update with respect to a functional semantics. But linear schemes are restrictive in practice, and more restrictive than necessary to guarantee soundness of in-place update. This limitation has prompted research into static analysis and more sophisticated typing disciplines to determine when in-place update may be safely used, or to combine linear and non-linear schemes. Here we contribute to this direction by defining a new typing scheme that better approximates the semantic property of soundness of in-place update for a functional semantics. We begin from the observation that some data are used only in a read-only context, after which it may be safely re-used before being destroyed. Formalising the in-place update interpretation in a machine model semantics allows us to refine this observation, motivating three usage aspects apparent from the semantics that are used to annotate function argument types. The aspects are (1) used destructively, (2), used read-only but shared with result, and (3) used read-only and not shared with the result. The main novelty is aspect (2), which allows a linear value to be safely read and even aliased with a result of a function without being consumed. This novelty makes our type system more expressive than previous systems for functional languages in the literature. The system remains simple and intuitive, but it enjoys a strong soundness property whose proof is non-trivial. Moreover, our analysis features principal types and feasible type reconstruction, as shown in M. Konen'y (In TYPES 2002 workshop, Nijmegen, Proceedings, Springer-Verlag, 2003).

Algorithms for efficient transaction management and consistent queries in client -server semantic object-oriented parallel databases

Large read-only or read-write transactions with a large read set and a small write set constitute an important class of transactions used in such applications as data mining, data warehousing, statistical applications, and report generators. Such transactions are best supported with optimistic concurrency, because locking of large amounts of data for extended periods of time is not an acceptable solution. The abort rate in regular optimistic concurrency algorithms increases exponentially with the size of the transaction. The algorithm proposed in this dissertation solves this problem by using a new transaction scheduling technique that allows a large transaction to commit safely with significantly greater probability that can exceed several orders of magnitude versus regular optimistic concurrency algorithms. A performance simulation study and a formal proof of serializability and external consistency of the proposed algorithm are also presented.^ This dissertation also proposes a new query optimization technique (lazy queries). Lazy Queries is an adaptive query execution scheme which optimizes itself as the query runs. Lazy queries can be used to find an intersection of sub-queries in a very efficient way, which does not require full execution of large sub-queries nor does it require any statistical knowledge about the data.^ An efficient optimistic concurrency control algorithm used in a massively parallel B-tree with variable-length keys is introduced. B-trees with variable-length keys can be effectively used in a variety of database types. In particular, we show how such a B-tree was used in our implementation of a semantic object-oriented DBMS. The concurrency control algorithm uses semantically safe optimistic virtual "locks" that achieve very fine granularity in conflict detection. This algorithm ensures serializability and external consistency by using logical clocks and backward validation of transactional queries. A formal proof of correctness of the proposed algorithm is also presented. ^

Range Queries on an encrypted outsourced database

This project is about retrieving data in range without allowing the server to read it, when the database is stored in the server. Basically, our goal is to build a database that allows the client to maintain the confidentiality of the data stored, despite all the data is stored in a different location from the client's hard disk. This means that all the information written on the hard disk can be easily read by another person who can do anything with it. Given that, we need to encrypt that data from eavesdroppers or other people. This is because they could sell it or log into accounts and use them for stealing money or identities. In order to achieve this, we need to encrypt the data stored in the hard drive, so that only the possessor of the key can easily read the information stored, while all the others are going to read only encrypted data. Obviously, according to that, all the data management must be done by the client, otherwise any malicious person can easily retrieve it and use it for any malicious intention. All the methods analysed here relies on encrypting data in transit. In the end of this project we analyse 2 theoretical and practical methods for the creation of the above databases and then we tests them with 3 datasets and with 10, 100 and 1000 queries. The scope of this work is to retrieve a trend that can be useful for future works based on this project.

Improvements in Hardware Transactional Memory for GPU Architectures

In the multi-core CPU world, transactional memory (TM)has emerged as an alternative to lock-based programming for thread synchronization. Recent research proposes the use of TM in GPU architectures, where a high number of computing threads, organized in SIMT fashion, requires an effective synchronization method. In contrast to CPUs, GPUs offer two memory spaces: global memory and local memory. The local memory space serves as a shared scratch-pad for a subset of the computing threads, and it is used by programmers to speed-up their applications thanks to its low latency. Prior work from the authors proposed a lightweight hardware TM (HTM) support based in the local memory, modifying the SIMT execution model and adding a conflict detection mechanism. An efficient implementation of these features is key in order to provide an effective synchronization mechanism at the local memory level. After a quick description of the main features of our HTM design for GPU local memory, in this work we gather together a number of proposals designed with the aim of improving those mechanisms with high impact on performance. Firstly, the SIMT execution model is modified to increase the parallelism of the application when transactions must be serialized in order to make forward progress. Secondly, the conflict detection mechanism is optimized depending on application characteristics, such us the read/write sets, the probability of conflict between transactions and the existence of read-only transactions. As these features can be present in hardware simultaneously, it is a task of the compiler and runtime to determine which ones are more important for a given application. This work includes a discussion on the analysis to be done in order to choose the best configuration solution.

Human osteogeny explained in two lectures, read in the Anatomical Theatre of the Surgeons of London, July the first and second, anno 1731 : in which not only the beginning and gradual increase of the bones of human foetuses are described, but also the nature of ossification is considered, and the general notion, that all bones are formed from cartilages, is demonstrated to be a mistake /

Mode of access: Internet.

Acta regia : or, an historical account, in order of time, not only of those records in Rymer's Foedera, on which Mons. Rapin has grounded his History of England; but of several grants from the Crown, Summons's to Parliament and Convocation, royal mandates to the clergy and laity for general masses, subsidies, etc. Proclamations and memorials of divers kinds, conge d'elires, dispensations for marriages, and numerous other publick acts relating to particular families, and our own domestick affairs: from the reign of King Henry the First, to that of King Charles the First. Which never yet appear'd elsewhere in the English tongue: and which are absolutely necessary to be known by all that read Rapin's, or any other history of England /

Includes index.

U.S. Grant and the colored people. : His wise, just, practical, and effective friendship thoroughly vindicated by incontestable facts in his record from 1862 to 1872. : Words of truth and soberness! He who runs may read and understand!! Be not deceived, only truth can endure!!!.

Text printed in two columns.

The paradigm shift in realising the right to read : how ebook libraries are enabling in the university sector

Millions of people with print disabilities are denied the right to read. While some important efforts have been made to convert standard books to accessible formats and create accessible repositories, these have so far only addressed this crisis in an ad hoc way. This article argues that universally designed ebook libraries have the potential of substantially enabling persons with print disabilities. As a case study of what is possible, we analyse 12 academic ebook libraries to map their levels of accessibility. The positive results from this study indicate that universally designed ebooks are more than possible; they exist. While results are positive, however, we also found that most ebook libraries have some features that frustrate full accessibility, and some ebook libraries present critical barriers for people with disabilities. Based on these findings, we consider that some combination of private pressure and public law is both possible and necessary to advance the right-to-read cause. With access improving and recent advances in international law, now is the time to push for universal design and equality.

A 100MHz to 1GHz, 0.35V to 1.5V supply 256 x 64 SRAM mock using symmetrized 9T SRAM cell with controlled read

In this paper, we present Dynamic Voltage and Frequency Managed 256 x 64 SRAM block in 65nm technology, for frequency ranging from 100MHz to 1GHz. The total energy is minimized for any operating frequency in the above range and leakage energy is minimized during standby mode. Since noise margin of SRAM cell deteriorates at low voltages, we propose Static Noise Margin improvement circuitry, which symmetrizes the SRAM cell by controlling the body bias of pull down NMOS transistor. We used a 9T SRAM cell that isolates Read and Hold Noise Margin and has less leakage. We have implemented an efficient technique of pushing address decoder into zigzag-super-cut-off in stand-by mode without affecting its performance in active mode of operation. The Read Bit Line (RBL) voltage drop is controlled and pre-charge of bit lines is done only when needed for reducing power wastage.

A 100MHz to 1GHz, 0.35V to 1.5V Supply 256 x 64 SRAM Block Using Symmetrized 9T SRAM Cell with Controlled Read

In this paper, we present dynamic voltage and frequency Managed 256 x 64 SRAM block in 65 nm technology, for frequency ranging from 100 MHz to 1 GHz. The total energy is minimized for any operating frequency in the above range and leakage energy is minimized during standby mode. Since noise margin of SRAM cell deteriorates at low voltages, we propose static noise margin improvement circuitry, which symmetrizes the SRAM cell by controlling the body bias of pull down NMOS transistor. We used a 9T SRAM cell that isolates Read and hold noise margin and has less leakage. We have implemented an efficient technique of pushing address decoder into zigzag- super-cut-off in stand-by mode without affecting its performance in active mode of operation. The read bit line (RBL) voltage drop is controlled and pre-charge of bit lines is done only when needed for reducing power wastage.

A Novel 4T nMOS-Only SRAM Cell in 32nm Technology Node

This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator （SO1） technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic ＂1＂ while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable ＂read＂ operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin （SNM） of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.

A Randomized Controlled Trial Evaluation of Time to Read, a Volunteer Tutoring Program for 8-9 Year Olds

Tutoring is commonly employed to prevent early reading failure, and evidence suggests that it can have a positive effect. This article presents findings from a large-scale (n = 734) randomized controlled trial evaluation of the effect of Time to Read—a volunteer tutoring program aimed at children aged 8 to 9 years—on reading comprehension, self-esteem, locus of control, enjoyment of learning, and future aspirations. The study found that the program had only a relatively small effect on children’s aspirations (effect size +0.17, 95% confidence interval [0.015, 0.328]) and no other outcomes. It is suggested that this lack of evidence found may be due to misspecification of the program logic model and outcomes identified and program-related factors, particularly the low dosage of the program.