Design of digital computer circuits using a basic logic cell.

Thesis (M.S.)--University of Illinois.

Security through Obscurity: Layout Obfuscation of Digital Integrated Circuits using Don't Care Conditions

Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.

Automatic synthesis of VHDL Hardware Components from IOPT Petri Net models

Conferência: 39th Annual Conference of the IEEE Industrial-Electronics-Society (IECON), Vienna, Austria, Nov 10-14, 2013

Constraint solving over multi-valued logics - application to digital circuits

Due to usage conditions, hazardous environments or intentional causes, physical and virtual systems are subject to faults in their components, which may affect their overall behaviour. In a ‘black-box’ agent modelled by a set of propositional logic rules, in which just a subset of components is externally visible, such faults may only be recognised by examining some output function of the agent. A (fault-free) model of the agent’s system provides the expected output given some input. If the real output differs from that predicted output, then the system is faulty. However, some faults may only become apparent in the system output when appropriate inputs are given. A number of problems regarding both testing and diagnosis thus arise, such as testing a fault, testing the whole system, finding possible faults and differentiating them to locate the correct one. The corresponding optimisation problems of finding solutions that require minimum resources are also very relevant in industry, as is minimal diagnosis. In this dissertation we use a well established set of benchmark circuits to address such diagnostic related problems and propose and develop models with different logics that we formalise and generalise as much as possible. We also prove that all techniques generalise to agents and to multiple faults. The developed multi-valued logics extend the usual Boolean logic (suitable for faultfree models) by encoding values with some dependency (usually on faults). Such logics thus allow modelling an arbitrary number of diagnostic theories. Each problem is subsequently solved with CLP solvers that we implement and discuss, together with a new efficient search technique that we present. We compare our results with other approaches such as SAT (that require substantial duplication of circuits), showing the effectiveness of constraints over multi-valued logics, and also the adequacy of a general set constraint solver (with special inferences over set functions such as cardinality) on other problems. In addition, for an optimisation problem, we integrate local search with a constructive approach (branch-and-bound) using a variety of logics to improve an existing efficient tool based on SAT and ILP.

Error probability in synchronous digital circuits due to power supply noise

This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits.The analysis here considered gives the timing violation error probability as a new design quality factor in front of conventional techniques that assume the full perfection of the circuit. The evaluation of the error bound can be useful for new design paradigms where retry and self-recoveringtechniques are being applied to the design of high performance processors. The method here described allows to evaluate the performance of these techniques by means of calculating the expected error probability in terms of power supply distribution quality.

Model-Based Troubleshooting of Digital Systems

This thesis describes a methodology, a representation, and an implemented program for troubleshooting digital circuit boards at roughly the level of expertise one might expect in a human novice. Existing methods for model-based troubleshooting have not scaled up to deal with complex circuits, in part because traditional circuit models do not explicitly represent aspects of the device that troubleshooters would consider important. For complex devices the model of the target device should be constructed with the goal of troubleshooting explicitly in mind. Given that methodology, the principal contributions of the thesis are ways of representing complex circuits to help make troubleshooting feasible. Temporally coarse behavior descriptions are a particularly powerful simplification. Instantiating this idea for the circuit domain produces a vocabulary for describing digital signals. The vocabulary has a level of temporal detail sufficient to make useful predictions abut the response of the circuit while it remains coarse enough to make those predictions computationally tractable. Other contributions are principles for using these representations. Although not embodied in a program, these principles are sufficiently concrete that models can be constructed manually from existing circuit descriptions such as schematics, part specifications, and state diagrams. One such principle is that if there are components with particularly likely failure modes or failure modes in which their behavior is drastically simplified, this knowledge should be incorporated into the model. Further contributions include the solution of technical problems resulting from the use of explicit temporal representations and design descriptions with tangled hierarchies.

Synthesis of a PEG-bipolar-dimyristoylphosphatidylethanoline

The problem of drug delivery has been of continuous research interest to the biomedical scientific community. The basic problem of drug delivery is to facilitate the transport of medication via the bloodstream to the target organs. This process can be significantly hampered by the hydrophobic nature of most medications. Pharmaceutical compounds and in particular chemotherapeutics (which are a specific area of research at the Cornell Medical Center and the Sloan-Kettering Institute) tend to be extremely hydrophobic. Blood is a hydrophilic environment, so the hydrophobic drugs simply cannot dissolve in the bloodstream. As a result they cannot be transported successfully to the target tissues. For example, Sloan-Kettering possesses compounds that kill cancer cells 100ln vitro, yet those same compounds are virtually inactive in vivo because of their insolubility in the blood. It was our purpose, therefore, to develop an appropriate and successful drug delivery system.

Selective Synthesis of Oxacalix[6]arenes and Mixed Oxacalix[4]arenes

Calixarenesare macrocycles composed of benzene rings meta linked to each other by one carbon atom. These exotic compounds can be used for a variety of purposes including metalleaching for environmental cleanup, surface technology, luminescent probes, nuclear waste treatment, among others. A variety of calixarenesexist, including azacalix[n]arenesthiocalix[n]arenes(where n = the number of benzene rings) and oxacalix[n]arenes; these macrocycles use nitrogen, sulfur and oxygen, respectively, as the atom whichlinks the benzene rings together. My research has focused on synthesizing oxacalix[6]arenes (“hexamer”) in high yield, which is a synthetic challenge because it is generally accepted that oxacalix[n>4]arenes will thermodynamically decompose to the oxacalix[4]arene (“tetramer”); i.e. heating the reaction mixture will yield the tetramer, not the hexamer. To generate the hexamer, “trimer”precursors have been synthesized, in the hopes of facilitating hexamer ring closure.

Synthesis of 2-oxo-16-(3', 4'-methylenedioxyphenyl)-trans-15-hexadecene

This work presents the progress made towards synthesizing 2-oxo-16-(3', 4'methylenedioxyphenyl)-trans-15-hexadecene, an antimycobacterial compound that was originally isolated from the leaves of Piper Sanctum. The hydrocarbon chain of the molecule was synthesized first by opening a 15-pentadecanolactone ring by means of HI, and performing an E2 elimination reaction on the molecule followed by an organolithium reaction with CH3Li. Hexadec-15-en-2-one that was afforded this way was later reacted with 5-bromobenzo[d][1,3]dioxole following the appropriate Heck reaction protocol that allows for the formation of a palladium catalyzed carbon-carbon bond. The modes of action of 2-oxo-16-(3', 4'-methylenedioxyphenyl)-trans-15hexadecene are comparable to the ones of rifampicin, a marketable drug that has been successfully used in the treatment of tuberculosis in the past. Additionally, this compound can serve as an intermediate towards the synthesis of 2-oxo-16-(3', 4' methylenedioxyphenyl)-hexadecane and 2-oxo-14-(3', 4' -methylenedioxyphenyl) tetradecane, both strong inhibitors of the growth of Mycobacterium tuberculosis. Lastly, due to Multi-Drug Resistant tuberculosis, there has been an increasing need to find alternative cures for tuberculosis. Therefore, the work on 2-qxo-16-(3', 4'methylenedioxyphenyl)-trans-15-hexadecene is not only chemically interesting but it is also biologically important.

A petri net based timing model for hardware/software co-design of digital systems

We have recently proposed an extension to Petri nets in order to be able to directly deal with all aspects of embedded digital systems. This extension is meant to be used as an internal model of our co-design environment. After analyzing relevant related work, and presenting a short introduction to our extension as a background material, we describe the details of the timing model we use in our approach, which is mainly based in Merlin's time model. We conclude the paper by discussing an example of its usage. © 2004 IEEE.

Methodology analysis of a computational tool used in electronic circuit design

This paper considers the importance of using a top-down methodology and suitable CAD tools in the development of electronic circuits. The paper presents an evaluation of the methodology used in a computational tool created to support the synthesis of digital to analog converter models by translating between different tools used in a wide variety of applications. This tool is named MS 2SV and works directly with the following two commercial tools: MATLAB/Simulink and SystemVision. Model translation of an electronic circuit is achieved by translating a mixed-signal block diagram developed in Simulink into a lower level of abstraction in VHDL-AMS and the simulation project support structure in SystemVision. The method validation was performed by analyzing the power spectral of the signal obtained by the discrete Fourier transform of a digital to analog converter simulation model. © 2011 IEEE.

Synthesis of Macrocyclic Polymers Formed via Intramolecular Radical Trap-Assisted Atom Transfer Radical Coupling

The synthesis of cyclic polystyrene (Pst) with an alkoxyamine functionality has been accomplished by intramolecular radical coupling in the presence of a nitroso radical trap Linear alpha,omega-dibrominated polystyrene, produced by the atom transfer radical polymerization (ATRP) of styrene using a dibrominated initiator, was subjected to chain-end activation via the atom transfer radical coupling (ATRC) process under pseudodilute conditions in the presence of 2-methyl-2-nitrosopropane (MNP). This radical trap-assisted, intramolecular ATRC (RTA-ATRC) produced cyclic polymers in greater than 90% yields possessing < G > values in the 0.8-0.9 range as determined by gel permeation chromatography (GPC). Thermal-induced opening of the cycles, made possible by the incorporated alkoxyamine, resulted in a return to the original apparent molecular weight, further supporting the formation of cyclic polymers in the RTA-ATRC reaction. Liquid chromatography-mass spectrometry (LC-MS) provided direct confirmation of the cyclic architecture and the incorporation of the nitroso group into the macrocycle RTA-ATRC cyclizations carried out with faster rates of polymer addition into the redox active solution and/or in the presence of a much larger excess of MNP (up to a 250:1 ratio of MNP:C-Br chain end) still yielded cyclic polymers that contained alkoxyamine functionality.

Rapid synthesis of arylgold compounds using dielectric heating

Dielectric heating has been successfully used in the preparation of a range of arylgold compounds. The approach is tolerant of a number of functional groups and rapidly generates the organometallic complexes in moderate to excellent yields.