Rearrangeable nonblocking thermo-optic 4 x 4 switching matrix in silicon-on-insulator

A rearrangeable nonblocking thermo-optic 4 x 4 switching matrix is demonstrated. The matrix, which consists of five 2 x 2 multimode interference-based Mach-Zehnder interferometer (MMI-MZI) switch elements, is fabricated in silicon-on-insulator waveguide system. The average excess loss for the optical path experiencing 2 and 3 switch elements is 6.6 and 10.1 dB respectively. The crosstalk in the matrix is measured to be between -12 and -19 dB. The switching time of the device is less than 30 mu s.

Column switching-back flushing technique for the analysis of aromatic compounds in gasoline

A simple method, based on the technique of capillary column switching-back flushing, has been developed for the detailed analysis of aromatic compounds in gasoline. The sample was first separated on a 30-m long OV-2330 polar precolumn and then backflushed onto a nonpolar analytical column. The early eluting components from the precolumn and the components of interest (aromatic compounds plus heavier compounds) eluting from the analytical column are all directed to the same flame ionization detection system through a T piece, which permits the quantitative analysis of aromatic hydrocarbons in gasoline by a normalization method using correcting factors. The switching time window of the method is +/-5 s, resulting in easier operation and higher reliability. The reproducibility of the quantitative analysis was less than or equal to3% RSD for real gasoline samples. (C) 2002 Elsevier Science B.V. All rights reserved.

A new multilevel converter configuration for high power and high quality applications

The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with specific emphasis on renewable energy systems. The rapid evolution of renewable energy within the last several years has resulted in the design of efficient power converters suitable for medium and high-power applications such as wind turbine and photovoltaic (PV) systems. Today, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements controlled by powerful processor systems. However, it is hard to connect the traditional converters to the high and medium voltage grids, as a single power switch cannot stand at high voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Besides this important feature, multilevel converters have the capability to generate stepped waveforms. Consequently, in comparison with conventional two-level inverters, they present lower switching losses, lower voltage stress across loads, lower electromagnetic interference (EMI) and higher quality output waveforms. These properties enable the connection of renewable energy sources directly to the grid without using expensive, bulky, heavy line transformers. Additionally, they minimize the size of the passive filter and increase the durability of electrical devices. However, multilevel converters have only been utilised in very particular applications, mainly due to the structural limitations, high cost and complexity of the multilevel converter system and control. New developments in the fields of power semiconductor switches and processors will favor the multilevel converters for many other fields of application. The main application for the multilevel converter presented in this work is the front-end power converter in renewable energy systems. Diode-clamped and cascade converters are the most common type of multilevel converters widely used in different renewable energy system applications. However, some drawbacks – such as capacitor voltage imbalance, number of components, and complexity of the control system – still exist, and these are investigated in the framework of this thesis. Various simulations using software simulation tools are undertaken and are used to study different cases. The feasibility of the developments is underlined with a series of experimental results. This thesis is divided into two main sections. The first section focuses on solving the capacitor voltage imbalance for a wide range of applications, and on decreasing the complexity of the control strategy on the inverter side. The idea of using sharing switches at the output structure of the DC-DC front-end converters is proposed to balance the series DC link capacitors. A new family of multioutput DC-DC converters is proposed for renewable energy systems connected to the DC link voltage of diode-clamped converters. The main objective of this type of converter is the sharing of the total output voltage into several series voltage levels using sharing switches. This solves the problems associated with capacitor voltage imbalance in diode-clamped multilevel converters. These converters adjust the variable and unregulated DC voltage generated by renewable energy systems (such as PV) to the desirable series multiple voltage levels at the inverter DC side. A multi-output boost (MOB) converter, with one inductor and series output voltage, is presented. This converter is suitable for renewable energy systems based on diode-clamped converters because it boosts the low output voltage and provides the series capacitor at the output side. A simple control strategy using cross voltage control with internal current loop is presented to obtain the desired voltage levels at the output voltage. The proposed topology and control strategy are validated by simulation and hardware results. Using the idea of voltage sharing switches, the circuit structure of different topologies of multi-output DC-DC converters – or multi-output voltage sharing (MOVS) converters – have been proposed. In order to verify the feasibility of this topology and its application, steady state and dynamic analyses have been carried out. Simulation and experiments using the proposed control strategy have verified the mathematical analysis. The second part of this thesis addresses the second problem of multilevel converters: the need to improve their quality with minimum cost and complexity. This is related to utilising asymmetrical multilevel topologies instead of conventional multilevel converters; this can increase the quality of output waveforms with a minimum number of components. It also allows for a reduction in the cost and complexity of systems while maintaining the same output quality, or for an increase in the quality while maintaining the same cost and complexity. Therefore, the asymmetrical configuration for two common types of multilevel converters – diode-clamped and cascade converters – is investigated. Also, as well as addressing the maximisation of the output voltage resolution, some technical issues – such as adjacent switching vectors – should be taken into account in asymmetrical multilevel configurations to keep the total harmonic distortion (THD) and switching losses to a minimum. Thus, the asymmetrical diode-clamped converter is proposed. An appropriate asymmetrical DC link arrangement is presented for four-level diode-clamped converters by keeping adjacent switching vectors. In this way, five-level inverter performance is achieved for the same level of complexity of the four-level inverter. Dealing with the capacitor voltage imbalance problem in asymmetrical diodeclamped converters has inspired the proposal for two different DC-DC topologies with a suitable control strategy. A Triple-Output Boost (TOB) converter and a Boost 3-Output Voltage Sharing (Boost-3OVS) converter connected to the four-level diode-clamped converter are proposed to arrange the proposed asymmetrical DC link for the high modulation indices and unity power factor. Cascade converters have shown their abilities and strengths in medium and high power applications. Using asymmetrical H-bridge inverters, more voltage levels can be generated in output voltage with the same number of components as the symmetrical converters. The concept of cascading multilevel H-bridge cells is used to propose a fifteen-level cascade inverter using a four-level H-bridge symmetrical diode-clamped converter, cascaded with classical two-level Hbridge inverters. A DC voltage ratio of cells is presented to obtain maximum voltage levels on output voltage, with adjacent switching vectors between all possible voltage levels; this can minimize the switching losses. This structure can save five isolated DC sources and twelve switches in comparison to conventional cascade converters with series two-level H bridge inverters. To increase the quality in presented hybrid topology with minimum number of components, a new cascade inverter is verified by cascading an asymmetrical four-level H-bridge diode-clamped inverter. An inverter with nineteen-level performance was achieved. This synthesizes more voltage levels with lower voltage and current THD, rather than using a symmetrical diode-clamped inverter with the same configuration and equivalent number of power components. Two different predictive current control methods for the switching states selection are proposed to minimise either losses or THD of voltage in hybrid converters. High voltage spikes at switching time in experimental results and investigation of a diode-clamped inverter structure raised another problem associated with high-level high voltage multilevel converters. Power switching components with fast switching, combined with hard switched-converters, produce high di/dt during turn off time. Thus, stray inductance of interconnections becomes an important issue and raises overvoltage and EMI issues correlated to the number of components. Planar busbar is a good candidate to reduce interconnection inductance in high power inverters compared with cables. The effect of different transient current loops on busbar physical structure of the high-voltage highlevel diode-clamped converters is highlighted. Design considerations of proper planar busbar are also presented to optimise the overall design of diode-clamped converters.

Growth and study of antiferroelectric lead zirconate thin films by pulsed laser ablation

Antiferroelectric lead zirconate (PZ) thin films were deposited by pulsed laser ablation on platinum-coated silicon substrates. Films showed a polycrystalline pervoskite structure upon annealing at 650 degrees C for 5-10 min. Dielectric properties were investigated as a function of temperature and frequency. The dielectric constant of PZ films was 220 at 100 kHz with a dissipation factor of 0.03. The electric field induced transformation from the antiferroelectric phase to the ferroelectric phase was observed through the polarization change, using a Sawyer-Tower circuit. The maximum polarization value obtained was 40 mu C/cm(2). The average fields to excite the ferroelectric state, and to reverse to the antiferroelectric state were 71 and 140 kV/cm, respectively. The field induced switching was also observed through double maxima in capacitance-voltage characteristics. Leakage current was studied in terms of current versus time and current versus voltage measurements. A leakage current density of 5x10(-7) A/cm(2) at 3 V, for a film of 0.7 mu m thickness, was noted at room temperature. The trap mechanism was investigated in detail in lead zirconate thin films based upon a space charge limited conduction mechanism. The films showed a backward switching time of less than 90 ns at room temperature.

Microprocessor-based transient analyser

An 8085-based microprocessor system readily available in the laboratory has been developed in conjunction with a slow A/D converter to digitize repetitive transient signals arising in a solid-state physics experiment. The unit has been successfully used to measure the domain switching time in ferroelectric crystals, the duration of which is of the order of milliseconds-seconds.

Antiferroelectric lead zirconate thin films by pulsed laser ablation

Lead Zirconate (PbZrO3) thin films were deposited by pulsed laser ablation method. Pseudocubic (110) oriented in-situ films were grown at low pressure. The field enforced anti-ferroelectric (AFE) to ferroelectric (FE) phase transformation behaviour was investigated by means of a modified Sawyer Tower circuit as well as capacitance versus applied voltage measurements. The maximum polarisation obtained was 36 mu C cm(-2) and the critical field to induce ferroelectric state and to reverse the antiferroelectric slates were 65 and 90 kV cm(-1) respectively. The dielectric properties were investigated as a function of frequency and temperature. The dielectric constant of the AFE lead zirconate thin him was 190 at 100 kHz which is more than the bulk ceramic value (120) with a dissipation factor of less than 0.07. The polarisation switching kinetics of the antiferroelectric PbZrO3 thin films showed that the switching time to be around 275 ns between antipolar state to polar states. (C) 1999 Elsevier Science S.A. All rights reserved.

Polarization analysis and experimental implementation of PLZT electro-optical switch using fiber Sagnac interferometers

The polarization characteristics of electro-optical (EO) switches using fiber Sagnac interferometer (FSI) structures are theoretically investigated. Analytical solutions of output fields are presented when the twists and birefringence in a Sagnac loop are considered. Numerical calculations show that the twists of fiber, the orientation of the inserted phase retarder, and the splitting ratio of the coupler will influence both the output intensity and the output polarization properties of the proposed switch. A polarization-independent EO switch based on a Sagnac interferometer and a PUT bar was experimentally implemented, which showed good coincidence with the analytical results. The experiment showed a switch with 22 dB extinction ratio and less than 31.1 ns switching time. (c) 2006 Optical Society of America.

A novel scalable photonic analog switch architecture based on semiconductor optical amplifiers

We propose a novel semiconductor optical amplifier (SOA) based switch architecture for analog applications. Proof-of-principle experiments show that the system is very linear with an SFDR of approximately 100dB·Hz 2/3 for a switching time of 50μs. The port number of this switch is scalable and can be expanded to 80 × 80.

Monolithic MZI-SOA hybrid switch for low-power and low-penalty operation.

We report the first experimental demonstration of a monolithically integrated hybrid dilated 2×2 modular optical switch using Mach-Zehnder modulators as low-loss 1×2 switching elements and short semiconductor optical amplifiers to provide additional extinction and gain. An excellent 40 dB cross-talk/extinction ratio is recorded with data-modulated signal-to-noise ratios of up to 44 dB in a 0.1 nm bandwidth. A switching time of 3 ns is demonstrated. Bit error rate studies show extremely low subsystem penalties of less than 0.1 dB, and studies indicate that, by using this hybrid switch building block, an 8×8 port switch could be achieved with 14 dB input power dynamic range for subsystem penalties of less than 0.5 dB.

Modular hybrid dilated Mach-Zehnder switch with integrated SOAs for large port count switches

A modular dilated MZI based optical switch with integrated SOAs is demonstrated with excellent -40dB crosstalk/extinction ratio, 3ns switching time and nearly penalty-free operation. Studies show an 8×8 switch with 14dB IPDR for 0.5dB penalty. © 2014 OSA.

A 4x4 strictly nonblocking silicon-on-insulator thermo-optic switch matrix

A 4 x 4 strictly nonblocking thermo-optic switch matrix implemented with a 2 x 2 Mach-Zehnder switch unit was fabricated in silicon-on-insulator wafer. Insertion losses of the shortest and the longest path in the device are about 14.8 dB and 19.2 dB, respectively. The device presents a very low loss dependent on wavelength. For one switch unit, the power consumption needed for operation is measured to be 0.270 W-0.288 W and the switching time is about 13 +/- 1 mu s.

Fabrication of a 4x4 strictly nonblocking SOI switch matrix

A 4 x 4 strictly nonblocking thermo-optical switch matrix based on Mach-Zehnder (MZ) switching unit was designed and fabricated in silicon-on-insulator (SOI) wafer. The paired multi-mode interferometers (MMI) were used as power splitters and combiners in MZ structures. The device presents an average insertion loss of 17 dB and an average crosstalk of 16.5 dB. The power consumption needed for operation is reduced to 0.288 W by adding isolating trenches. The switching time of the device is about 15 mu s, which is much faster than that of silica-based switches. (C) 2005 Elsevier B.V. All rights reserved.

Fabrication and analysis of 2x2 thermo-optic SOI waveguide switch with low power consumption and fast response by anisotropy chemical etching

A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

SOI-based 16x16 thermo-optic waveguide switch matrix

A 16 x 16 thermo-optic wavelenght switch matrix has been designed and febricated on silicon-on-insulator wafer. For reducing device lenght, blocking switch matrix configuration is chosen. The building block of a matix is a 2 x 2 cell with Mach-Zehnder interferometer configuration, where a multi-mode interferometer serves as splitters/combiners. Spot size converters and isolating grooves are integrated on the same chip to reduce loss and power consumption. Average power consumption of the switch cell is 220 mW. The switching time of a switch cell is less than 3 mu s.