Cost-effective 10 Gb/s polymer-based chip-to-chip optical interconnect

Board-level optical links are an attractive alternative to their electrical counterparts as they provide higher bandwidth and lower power consumption at high data rates. However, on-board optical technology has to be cost-effective to be commercially deployed. This study presents a chip-to-chip optical interconnect formed on an optoelectronic printed circuit board that uses a simple optical coupling scheme, cost-effective materials and is compatible with well-established manufacturing processes common to the electronics industry. Details of the link architecture, modelling studies of the link's frequency response, characterisation of optical coupling efficiencies and dynamic performance studies of this proof-of-concept chip-to-chip optical interconnect are reported. The fully assembled link exhibits a -3 dBe bandwidth of 9 GHz and -3 dBo tolerances to transverse component misalignments of ±25 and ±37 μm at the input and output waveguide interfaces, respectively. The link has a total insertion loss of 6 dBo and achieves error-free transmission at a 10 Gb/s data rate with a power margin of 11.6 dBo for a bit-error-rate of 10 -12. The proposed architecture demonstrates an integration approach for high-speed board-level chip-to-chip optical links that emphasises component simplicity and manufacturability crucial to the migration of such technology into real-world commercial systems. © 2012 The Institution of Engineering and Technology.

Polymer waveguide-based backplanes for board-level optical interconnects

Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplane as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, two different types of polymer waveguide-based optical backplanes are presented. The first one implements a passive shuffle architecture enabling non-blocking on-board optical interconnection between different cards/modules, while the second one deploys a regenerative bus architecture allowing the interconnection of an arbitrary number of electrical cards over a common optical bus. The polymer materials and the multimode waveguide components used to form the optical backplanes are presented, while details of the interconnection architectures and design of the backplanes are described. Proof-of-principle demonstrators fabricated onto low-cost FR4 substrates, including a 10-card 1 Tb/s-capacity passive shuffle router and 4-channel 3-card polymeric bus modules, are reported and their optical performance characteristics are presented. Low-loss, low-crosstalk on-board interconnection is achieved and error-free (BER10 12) 10 Gb/s communication between different card/module interfaces is demonstrated in both polymeric backplane systems. © 2012 IEEE.

Advanced schemes for optical datacommunications

The demand for high-speed optical links within local-area networks and storage-area networks continues to grow rapidly, with standards under development that demand single-wavelength solutions at data rates of 30 Gb/s and beyond. Robust low-cost schemes are required, with a particular emphasis on multimode-fibre links using optical transceivers based on vertical-cavity surface-emitting lasers. © 2012 IEEE.

Low-cost PCB-integrated 10-Gb/s optical transceiver built with a novel integration method

A novel integration method for the production of cost-effective optoelectronic printed circuit boards (OE PCBs) is presented. The proposed integration method allows fabrication of OE PCBs with manufacturing processes common to the electronics industry while enabling direct attachment of electronic components onto the board with solder reflow processes as well as board assembly with automated pick-and-place tools. The OE PCB design is based on the use of polymer multimode waveguides, end-fired optical coupling schemes, and simple electro-optic connectors, eliminating the need for additional optical components in the optical layer, such as micro-mirrors and micro-lenses. A proof-of-concept low-cost optical transceiver produced with the proposed integration method is presented. This transceiver is fabricated on a low-cost FR4 substrate, comprises a polymer Y-splitter together with the electronic circuitry of the transmitter and receiver modules and achieves error-free 10-Gb/s bidirectional data transmission. Theoretical studies on the optical coupling efficiencies and alignment tolerances achieved with the employed end-fired coupling schemes are presented while experimental results on the optical transmission characteristics, frequency response, and data transmission performance of the integrated optical links are reported. The demonstrated optoelectronic unit can be used as a front-end optical network unit in short-reach datacommunication links. © 2011-2012 IEEE.

A polymer waveguide-based 40 Gb/s optical bus backplane for board-level optical interconnects

Optical interconnects are increasingly considered for use in high-performance electronic systems. Multimode polymer waveguides are a promising technology for the formation of optical backplanes as they enable cost-effective integration of optical links onto standard printed circuit boards. In this paper, we present a 40 Gb/s optical backplane demonstrator based on the use of polymer multimode waveguides and a regenerative shared bus architecture. The system allows bus extension by cascading multiple polymeric bus modules through 3R regenerator units enabling the connection of an arbitrary number of electrical cards onto the bus. The proof-ofprinciple demonstrator reported here is formed with low-cost, commercially-available active devices and electronic components mounted on conventional FR4 substrates and achieves error-free 4×10 Gb/s optical interconnection between any two card interfaces on the bus. © 2013 IEEE.

Multimode polymer waveguide components for complex on-board optical topologies

Multimode polymer waveguides are an attractive transmission medium for board-level optical links as they provide high bandwidth, relaxed alignment tolerances, and can be directly integrated onto conventional printed circuit boards. However, the performance of multimode waveguide components depends on the launch conditions at the component input, complicating their use in topologies that require the concatenation of multiple multimode components. This paper presents key polymer components for a multichannel optical bus and reports their performance under different launch conditions, enabling useful rules that can be used to design complex interconnection topologies to be derived. The components studied are multimode signal splitters and combiners, 90°-crossings, S-bends, and 90°-bends. By varying the width of the splitter arms, a splitting ratio between 1% and 95% is achieved from the 1 × 2 splitters, while low-loss signal combining is demonstrated with the waveguide combiners. It is shown that a 3 dB improvement in the combiner excess loss can be achieved by increasing the bus width by 50 μm. The worst-case insertion loss of 50 × 100 μm waveguide crossings is measured to be 0.1 dB/crossing. An empirical method is proposed and used to estimate the insertion losses of on-board optical paths of a polymeric four-channel optical bus module. Good agreement is achieved between the predicted and measured values. Although the components and empirical method have been tailored for use in a multichannel optical bus architecture, they can be used for any on-board optical interconnection topology. © 1983-2012 IEEE.

Review of the technology and reliability issues arising as optical interconnects migrate onto the circuit board

Light has the greatest information carrying potential of all the perceivable interconnect mediums; consequently, optical fiber interconnects rapidly replaced copper in telecommunications networks, providing bandwidth capacity far in excess of its predecessors. As a result the modern telecommunications infrastructure has evolved into a global mesh of optical networks with VCSEL’s (Vertical Cavity Surface Emitting Lasers) dominating the short-link markets, predominately due to their low-cost. This cost benefit of VCSELs has allowed optical interconnects to again replace bandwidth limited copper as bottlenecks appear on VSR (Very Short Reach) interconnects between co-located equipment inside the CO (Central-Office). Spurred by the successful deployment in the VSR domain and in response to both intra-board backplane applications and inter-board requirements to extend the bandwidth between IC’s (Integrated Circuits), current research is migrating optical links toward board level USR (Ultra Short Reach) interconnects. Whilst reconfigurable Free Space Optical Interconnect (FSOI) are an option, they are complicated by precise line-of-sight alignment conditions hence benefits exist in developing guided wave technologies, which have been classified into three generations. First and second generation technologies are based upon optical fibers and are both capable of providing a suitable platform for intra-board applications. However, to allow component assembly, an integral requirement for inter-board applications, 3rd generation Opto-Electrical Circuit Boards (OECB’s) containing embedded waveguides are desirable. Currently, the greatest challenge preventing the deployment of OECB’s is achieving the out-of-plane coupling to SMT devices. With the most suitable low-cost platform being to integrate the optics into the OECB manufacturing process, several research avenues are being explored although none to date have demonstrated sufficient coupling performance. Once in place, the OECB assemblies will generate new reliability issues such as assembly configurations, manufacturing tolerances, and hermetic requirements that will also require development before total off-chip photonic interconnection can truly be achieved

Ensaios avançados com fibras ópticas = advanced characterization of optical fibers

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

Optimization of Amplifier Placements in Switch-Based Optical Networks

Wavelength division multiplexing (WDM) offers a solution to the problem of exploiting the large bandwidth on optical links; it is the current favorite multiplexing technology for optical communication networks. Due to the high cost of an optical amplifier, it is desirable to strategically place the amplifiers throughout the network in a way that guarantees that all the signals are adequately amplified while minimizing the total number amplifiers being used. Previous studies all consider a star-based network. This paper demonstrates an original approach for solving the problem in switch-based WDM optical network assuming the traffic matrix is always the permutation of the nodes. First we formulate the problem by choosing typical permutations which can maximize traffic load on individual links; then a GA (Genetic Algorithm) is used to search for feasible amplifier placements. Finally, by setting up all the lightpaths without violating the power constaints we confirm the feasibility of the solution.

Capacity estimates for optical transmission based on the nonlinear Fourier transform

What is the maximum rate at which information can be transmitted error-free in fibre-optic communication systems? For linear channels, this was established in classic works of Nyquist and Shannon. However, despite the immense practical importance of fibre-optic communications providing for >99% of global data traffic, the channel capacity of optical links remains unknown due to the complexity introduced by fibre nonlinearity. Recently, there has been a flurry of studies examining an expected cap that nonlinearity puts on the information-carrying capacity of fibre-optic systems. Mastering the nonlinear channels requires paradigm shift from current modulation, coding and transmission techniques originally developed for linear communication systems. Here we demonstrate that using the integrability of the master model and the nonlinear Fourier transform, the lower bound on the capacity per symbol can be estimated as 10.7 bits per symbol with 500 GHz bandwidth over 2,000 km.

Design and modeling of optical fibers for spatial division multiplexing using the orbital angular momentum of light

Les besoins toujours croissants en terme de transfert de données numériques poussent au développement de nouvelles technologies pour accroître la capacité des réseaux, notamment en ce qui concerne les réseaux de fibre optique. Parmi ces nouvelles technologies, le multiplexage spatial permet de multiplier la capacité des liens optiques actuels. Nous nous intéressons particulièrement à une forme de multiplexage spatial utilisant le moment cinétique orbital de la lumière comme base orthogonale pour séparer un certain nombre de canaux. Nous présentons d’abord les notions d’électromagnétisme et de physique nécessaires à la compréhension des développements ultérieurs. Les équations de Maxwell sont dérivées afin d’expliquer les modes scalaires et vectoriels de la fibre optique. Nous présentons également d’autres propriétés modales, soit la coupure des modes, et les indices de groupe et de dispersion. La notion de moment cinétique orbital est ensuite introduite, avec plus particulièrement ses applications dans le domaine des télécommunications. Dans une seconde partie, nous proposons la carte modale comme un outil pour aider au design des fibres optiques à quelques modes. Nous développons la solution vectorielle des équations de coupure des modes pour les fibres en anneau, puis nous généralisons ces équations pour tous les profils de fibres à trois couches. Enfin, nous donnons quelques exemples d’application de la carte modale. Dans la troisième partie, nous présentons des designs de fibres pour la transmission des modes avec un moment cinétique orbital. Les outils développés dans la seconde partie sont utilisés pour effectuer ces designs. Un premier design de fibre, caractérisé par un centre creux, est étudié et démontré. Puis un second design, une famille de fibres avec un profil en anneau, est étudié. Des mesures d’indice effectif et d’indice de groupe sont effectuées sur ces fibres. Les outils et les fibres développés auront permis une meilleure compréhension de la transmission dans la fibre optique des modes ayant un moment cinétique orbital. Nous espérons que ces avancements aideront à développer prochainement des systèmes de communications performants utilisant le multiplexage spatial.

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.

Research and design of high-speed advanced analogue front-ends for fibre-optic transmission systems

In the last decade, we have witnessed the emergence of large, warehouse-scale data centres which have enabled new internet-based software applications such as cloud computing, search engines, social media, e-government etc. Such data centres consist of large collections of servers interconnected using short-reach (reach up to a few hundred meters) optical interconnect. Today, transceivers for these applications achieve up to 100Gb/s by multiplexing 10x 10Gb/s or 4x 25Gb/s channels. In the near future however, data centre operators have expressed a need for optical links which can support 400Gb/s up to 1Tb/s. The crucial challenge is to achieve this in the same footprint (same transceiver module) and with similar power consumption as today’s technology. Straightforward scaling of the currently used space or wavelength division multiplexing may be difficult to achieve: indeed a 1Tb/s transceiver would require integration of 40 VCSELs (vertical cavity surface emitting laser diode, widely used for short‐reach optical interconnect), 40 photodiodes and the electronics operating at 25Gb/s in the same module as today’s 100Gb/s transceiver. Pushing the bit rate on such links beyond today’s commercially available 100Gb/s/fibre will require new generations of VCSELs and their driver and receiver electronics. This work looks into a number of state‐of-the-art technologies and investigates their performance restraints and recommends different set of designs, specifically targeting multilevel modulation formats. Several methods to extend the bandwidth using deep submicron (65nm and 28nm) CMOS technology are explored in this work, while also maintaining a focus upon reducing power consumption and chip area. The techniques used were pre-emphasis in rising and falling edges of the signal and bandwidth extensions by inductive peaking and different local feedback techniques. These techniques have been applied to a transmitter and receiver developed for advanced modulation formats such as PAM-4 (4 level pulse amplitude modulation). Such modulation format can increase the throughput per individual channel, which helps to overcome the challenges mentioned above to realize 400Gb/s to 1Tb/s transceivers.

Trigger and data link system for CMS Resistive Plate Chambers at the LHC accelerator

The purpose of the work was to realize a high-speed digital data transfer system for RPC muon chambers in the CMS experiment on CERN’s new LHC accelerator. This large scale system took many years and many stages of prototyping to develop, and required the participation of tens of people. The system interfaces to Frontend Boards (FEB) at the 200,000-channel detector and to the trigger and readout electronics in the control room of the experiment. The distance between these two is about 80 metres and the speed required for the optic links was pushing the limits of available technology when the project was started. Here, as in many other aspects of the design, it was assumed that the features of readily available commercial components would develop in the course of the design work, just as they did. By choosing a high speed it was possible to multiplex the data from some the chambers into the same fibres to reduce the number of links needed. Further reduction was achieved by employing zero suppression and data compression, and a total of only 660 optical links were needed. Another requirement, which conflicted somewhat with choosing the components a late as possible was that the design needed to be radiation tolerant to an ionizing dose of 100 Gy and to a have a moderate tolerance to Single Event Effects (SEEs). This required some radiation test campaigns, and eventually led to ASICs being chosen for some of the critical parts. The system was made to be as reconfigurable as possible. The reconfiguration needs to be done from a distance as the electronics is not accessible except for some short and rare service breaks once the accelerator starts running. Therefore reconfigurable logic is extensively used, and the firmware development for the FPGAs constituted a sizable part of the work. Some special techniques needed to be used there too, to achieve the required radiation tolerance. The system has been demonstrated to work in several laboratory and beam tests, and now we are waiting to see it in action when the LHC will start running in the autumn 2008.

Analytical expressions for the FM and AM responses of an integrated laser-modulator

The need for low-chirp and compact transmitters for high-bit-rate optical links has led to the development of integrated laser electroabsorption modulators (ILM). We have investigated feedback effects inducing frequency chirp by developing a model treating the ILM as a whole and obtained analytical expressions of the FM and AM responses. The variation of the frequency chirp with the residual facet reflectivity of the modulator section is calculated. The model predicts the unusual peak in the measured frequency responses and has been used to define design rules.