Benefits of a low-cost one-phase current distortion detection device in appliance supply in low-voltage residential networks

In this bachelor’s thesis are examined the benefits of current distortion detection device application in customer premises low voltage networks. The purpose of this study was to find out if there are benefits for measuring current distortion in low-voltage residential networks. Concluding into who can benefit from measuring the power quality. The research focuses on benefits based on the standardization in Europe and United States of America. In this research, were also given examples of appliances in which current distortion detection device could be used. Along with possible illustration of user interface for the device. The research was conducted as an analysis of the benefits of current distortion detection device in residential low voltage networks. The research was based on literature review. The study was divided to three sections. The first explain the reasons for benefitting from usage of the device and the second portrays the low-cost device, which could detect one-phase current distortion, in theory. The last section discuss of the benefits of usage of current distortion detection device while focusing on the beneficiaries. Based on the result of this research, there are benefits from usage to the current distortion detection device. The main benefitting party of the current distortion detection device was found to be manufactures, as they are held responsible of limiting the current distortion on behalf of consumers. Manufactures could adjust equipment to respond better to the distortion by having access to on-going current distortion in network. The other benefitting party are system operators, who would better locate distortion issues in low-voltage residential network to start prevention of long-term problems caused by current distortion early on.

Modelling of faults in low-voltage cables

Power line modelling has become an interesting research area in recent years as a result of advances in the power line distribution network system. Extensive knowledge about the power line cable characteristics can be implemented in a software algorithm in a modern broadband power-line communication modem. In this study, a novel approach for modelling power line cables (AMCMK) based on the broadband impedance spectroscopy (BIS) and transmission line matrix (TLM) techniques is recommended in characterizing a healthy cable and the various faults associated with low-voltage cables for both open and short circuit situation. Models for different cable conditions are developed and tuned, which include six models for both healthy and faulty cables situations. The models are on the basis of impedance response analysis of the cable. The resulting spectra from the simulations are also cross-correlated to determine the degree of similarities between the healthy cable spectra and their respective faulty spectra.

Low-voltage driven ZnS:Mn MIS and MISIM thin film electroluminescent devices with Eu2O3 insulator layer

AC thin film electroluminescent devices of MIS and MISIM have been fabricated with a novel dielectric layer of Eu2O3 as an insulator. The threshold voltage for light emission is found to depend strongly on the frequency of excitation source in these devices. These devices are fabricated with an active layer of ZnS:Mn and a novel dielectric layer of Eu2O3 as an insulator. The observed frequency dependence of brightness-voltage characteristics has been explained on the basis of the loss characteristic of the insulator layer. Changes in the threshold voltage and brightness with variation in emitting or insulating film thickness have been investigated in metal-insulator-semiconductor (MIS) structures. It has been found that the decrease in brightness occurring with decreasing ZnS layer thickness can be compensated by an increase in brightness obtained by reducing the insulator thickness. The optimal condition for low threshold voltage and higher stability has been shown to occur when the active layer to insulator thickness ratio lies between one and two.

FEM based Virtual Prototyping and Design of Third Harmonic Excitation System for Low Voltage Brushless Alternators

Salient pole brushless alternators coupled to IC engines are extensively used as stand-by power supply units for meeting in- dustrial power demands. Design of such generators demands high power to weight ratio, high e ciency and low cost per KVA out- put. Moreover, the performance characteristics of such machines like voltage regulation and short circuit ratio (SCR) are critical when these machines are put into parallel operation and alterna- tors for critical applications like defence and aerospace demand very low harmonic content in the output voltage. While designing such alternators, accurate prediction of machine characteristics, including total harmonic distortion (THD) is essential to mini- mize development cost and time. Total harmonic distortion in the output voltage of alternators should be as low as possible especially when powering very sophis- ticated and critical applications. The output voltage waveform of a practical AC generator is replica of the space distribution of the ux density in the air gap and several factors such as shape of the rotor pole face, core saturation, slotting and style of coil disposition make the realization of a sinusoidal air gap ux wave impossible. These ux harmonics introduce undesirable e ects on the alternator performance like high neutral current due to triplen harmonics, voltage distortion, noise, vibration, excessive heating and also extra losses resulting in poor e ciency, which in turn necessitate de-rating of the machine especially when connected to non-linear loads. As an important control unit of brushless alternator, the excitation system and its dynamic performance has a direct impact on alternator's stability and reliability. The thesis explores design and implementation of an excitation i system utilizing third harmonic ux in the air gap of brushless al- ternators, using an additional auxiliary winding, wound for 1=3rd pole pitch, embedded into the stator slots and electrically iso- lated from the main winding. In the third harmonic excitation system, the combined e ect of two auxiliary windings, one with 2=3rd pitch and another third harmonic winding with 1=3rd pitch, are used to ensure good voltage regulation without an electronic automatic voltage regulator (AVR) and also reduces the total harmonic content in the output voltage, cost e ectively. The design of the third harmonic winding by analytic methods demands accurate calculation of third harmonic ux density in the air gap of the machine. However, precise estimation of the amplitude of third harmonic ux in the air gap of a machine by conventional design procedures is di cult due to complex geome- try of the machine and non-linear characteristics of the magnetic materials. As such, prediction of the eld parameters by conven- tional design methods is unreliable and hence virtual prototyping of the machine is done to enable accurate design of the third har- monic excitation system. In the design and development cycle of electrical machines, it is recognized that the use of analytical and experimental methods followed by expensive and in exible prototyping is time consum- ing and no longer cost e ective. Due to advancements in com- putational capabilities over recent years, nite element method (FEM) based virtual prototyping has become an attractive al- ternative to well established semi-analytical and empirical design methods as well as to the still popular trial and error approach followed by the costly and time consuming prototyping. Hence, by virtually prototyping the alternator using FEM, the important performance characteristics of the machine are predicted. Design of third harmonic excitation system is done with the help of results obtained from virtual prototype of the machine. Third harmonic excitation (THE) system is implemented in a 45 KVA ii experimental machine and experiments are conducted to validate the simulation results. Simulation and experimental results show that by utilizing third harmonic ux in the air gap of the ma- chine for excitation purposes during loaded conditions, triplen harmonic content in the output phase voltage is signi cantly re- duced. The prototype machine with third harmonic excitation system designed and developed based on FEM analysis proved to be economical due to its simplicity and has the added advan- tage of reduced harmonics in the output phase voltage.

Control methodologies: Peak reduction algorithms for DNO owned storage devices on the Low Voltage network

The Distribution Network Operators (DNOs) role is becoming more difficult as electric vehicles and electric heating penetrate the network, increasing the demand. As a result it becomes harder for the distribution networks infrastructure to remain within its operating constraints. Energy storage is a potential alternative to conventional network reinforcement such as upgrading cables and transformers. The research presented here in this paper shows that due to the volatile nature of the LV network, the control approach used for energy storage has a significant impact on performance. This paper presents and compares control methodologies for energy storage where the objective is to get the greatest possible peak demand reduction across the day from a pre-specified storage device. The results presented show the benefits and detriments of specific types of control on a storage device connected to a single phase of an LV network, using aggregated demand profiles based on real smart meter data from individual homes. The research demonstrates an important relationship between how predictable an aggregation is and the best control methodology required to achieve the objective.

A peak reduction scheduling algorithm for storage devices on the low voltage network

Reinforcing the Low Voltage (LV) distribution network will become essential to ensure it remains within its operating constraints as demand on the network increases. The deployment of energy storage in the distribution network provides an alternative to conventional reinforcement. This paper presents a control methodology for energy storage to reduce peak demand in a distribution network based on day-ahead demand forecasts and historical demand data. The control methodology pre-processes the forecast data prior to a planning phase to build in resilience to the inevitable errors between the forecasted and actual demand. The algorithm uses no real time adjustment so has an economical advantage over traditional storage control algorithms. Results show that peak demand on a single phase of a feeder can be reduced even when there are differences between the forecasted and the actual demand. In particular, results are presented that demonstrate when the algorithm is applied to a large number of single phase demand aggregations that it is possible to identify which of these aggregations are the most suitable candidates for the control methodology.

The impact of location and type on the performance of Low-Voltage network connected Battery Energy Storage Systems

This paper assesses the impact of the location and configuration of Battery Energy Storage Systems (BESS) on Low-Voltage (LV) feeders. BESS are now being deployed on LV networks by Distribution Network Operators (DNOs) as an alternative to conventional reinforcement (e.g. upgrading cables and transformers) in response to increased electricity demand from new technologies such as electric vehicles. By storing energy during periods of low demand and then releasing that energy at times of high demand, the peak demand of a given LV substation on the grid can be reduced therefore mitigating or at least delaying the need for replacement and upgrade. However, existing research into this application of BESS tends to evaluate the aggregated impact of such systems at the substation level and does not systematically consider the impact of the location and configuration of BESS on the voltage profiles, losses and utilisation within a given feeder. In this paper, four configurations of BESS are considered: single-phase, unlinked three-phase, linked three-phase without storage for phase-balancing only, and linked three-phase with storage. These four configurations are then assessed based on models of two real LV networks. In each case, the impact of the BESS is systematically evaluated at every node in the LV network using Matlab linked with OpenDSS. The location and configuration of a BESS is shown to be critical when seeking the best overall network impact or when considering specific impacts on voltage, losses, or utilisation separately. Furthermore, the paper also demonstrates that phase-balancing without energy storage can provide much of the gains on unbalanced networks compared to systems with energy storage.

Low voltage and variable-pressure scanning electron microscopy of fractured composites

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Low voltage four-quadrant current multiplier: An improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Low voltage analog synthesizer of orthogonal signals: A current-mode approach

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Experimental results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low voltage analog synthesizer of orthogonal signals using current mode techniques

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Simulation results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low voltage four-quadrant current multiplier: an improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

A low-voltage wide-swing programmable-gain current amplifier

A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications

A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.