Determinação de posicionamento de nós roteadores em redes sem fio utilizando redes imunológicas.

A tecnologia sem fio (wireless) vem tomando conta do mundo. A cada dia mais pessoas estão trocando seus equipamentos com fio por equipamentos com a tecnologia wireless. Isso vem crescendo, devido as suas vantagens, tais como: facilidade de instalação e manutenção, redução de tempo de instalação de dispositivos, inexistência de estrutura de cabeamento, economia no custo de projetos, economia em infraestrutura, flexibilidade de configuração de dispositivos, economia no custo de montagem, flexibilidade na alteração de arquiteturas existentes e outros. Por essas facilidades supracitadas a área de automação industrial está também aumentando o seu interesse nessa tecnologia wireless. Nessa área, a segurança, confiabilidade e robustez dos dados são de suma importância. Então, para minimizar os efeitos das interferências geradas nesse meio são usadas técnicas de espalhamento em frequência e topologia em malha ou árvore para transmissão dos dados enviados pelos sensores aos nós roteadores até chegar ao gateway. Sendo assim, o posicionamento dos nós roteadores na rede em malha garantirá a menor influência dessas interferências. Esse trabalho propõe uma ferramenta de posicionamento de nós roteadores intermediários, chamado POSIMNET (Positioning Immune Network Rede Imunológica de Posicionamento), que auxilia o projetista da rede de automação industrial a encontrar a melhor configuração da rede sem fio. O POSIMNET é baseado nas redes imunológicas artificiais, que propõe criar n caminhos quaisquer ou disjuntos para as informações enviadas pelos nós sensores chegarem ao gateway, através da supressão, clonagem e reconfiguração de nós roteadores intermediários. Além disso, o algoritmo também é capaz de atender os critérios de baixo grau de falha e baixo número de retransmissão pelos roteadores. Esses critérios podem ser habilitados individualmente ou combinados com pesos iguais ou diferentes para cada um, a critério do usuário. A ferramenta POSIMNET é formada por dois módulos: (i) Rede Imunológica agrega elementos de dois modelos de redes imunológicas (SSAIS e AiNet); (ii) Campos Potenciais - posiciona os nós roteadores pelos campos potenciais, onde os sensores críticos os atraem enquanto que os obstáculos e outros roteadores os repelem.

WIA建筑能耗测量与优化运行系统

在分析建筑高能耗原因的基础上,提出了一个基于WIA的建筑能耗测量与优化运行方案,详细介绍了该方案的结构组成和原理。

基于工业无线网络WIA技术的储油罐监测系统

在分析现有的储油罐区监测技术的基础上,提出了一个基于工业无线网络WIA技术的储油罐监测系统方案,详细介绍了该方案的系统运行原理、系统结构及系统功能。

基于工业无线网络WIA技术的管道泄漏监测系统

在分析现有的管道泄漏监测技术的基础上,提出了一个基于工业无线网络WIA技术的管道泄漏监测系统方案,详细介绍了该方案的系统运行原理、系统结构及系统性能及特点。

基于以太网的工业控制网络

应用传统现场总线的工业控制网络无法实现办公室自动化与工业自动化的无缝结合 .由于以太网在确定性、速度和优先法则等方面性能的提高 ,阻碍以太网应用于实时控制环境的难点已被解决 .以太网早已成为商业管理网络的首要选择 ,那么它应用于企业现场设备控制层是控制网络发展的趋势 ,将极大地促进信息从传感器到管理层的集成

Systematic delay-driven power optimisation and power-driven delay optimisation of combinational circuits

With the proliferation of mobile wireless communication and embedded systems, the energy efficiency becomes a major design constraint. The dissipated energy is often referred as the product of power dissipation and the input-output delay. Most of electronic design automation techniques focus on optimising only one of these parameters either power or delay. Industry standard design flows integrate systematic methods of optimising either area or timing while for power consumption optimisation one often employs heuristics which are characteristic to a specific design. In this work we answer three questions in our quest to provide a systematic approach to joint power and delay Optimisation. The first question of our research is: How to build a design flow which incorporates academic and industry standard design flows for power optimisation? To address this question, we use a reference design flow provided by Synopsys and integrate in this flow academic tools and methodologies. The proposed design flow is used as a platform for analysing some novel algorithms and methodologies for optimisation in the context of digital circuits. The second question we answer is: Is possible to apply a systematic approach for power optimisation in the context of combinational digital circuits? The starting point is a selection of a suitable data structure which can easily incorporate information about delay, power, area and which then allows optimisation algorithms to be applied. In particular we address the implications of a systematic power optimisation methodologies and the potential degradation of other (often conflicting) parameters such as area or the delay of implementation. Finally, the third question which this thesis attempts to answer is: Is there a systematic approach for multi-objective optimisation of delay and power? A delay-driven power and power-driven delay optimisation is proposed in order to have balanced delay and power values. This implies that each power optimisation step is not only constrained by the decrease in power but also the increase in delay. Similarly, each delay optimisation step is not only governed with the decrease in delay but also the increase in power. The goal is to obtain multi-objective optimisation of digital circuits where the two conflicting objectives are power and delay. The logic synthesis and optimisation methodology is based on AND-Inverter Graphs (AIGs) which represent the functionality of the circuit. The switching activities and arrival times of circuit nodes are annotated onto an AND-Inverter Graph under the zero and a non-zero-delay model. We introduce then several reordering rules which are applied on the AIG nodes to minimise switching power or longest path delay of the circuit at the pre-technology mapping level. The academic Electronic Design Automation (EDA) tool ABC is used for the manipulation of AND-Inverter Graphs. We have implemented various combinatorial optimisation algorithms often used in Electronic Design Automation such as Simulated Annealing and Uniform Cost Search Algorithm. Simulated Annealing (SMA) is a probabilistic meta heuristic for the global optimization problem of locating a good approximation to the global optimum of a given function in a large search space. We used SMA to probabilistically decide between moving from one optimised solution to another such that the dynamic power is optimised under given delay constraints and the delay is optimised under given power constraints. A good approximation to the global optimum solution of energy constraint is obtained. Uniform Cost Search (UCS) is a tree search algorithm used for traversing or searching a weighted tree, tree structure, or graph. We have used Uniform Cost Search Algorithm to search within the AIG network, a specific AIG node order for the reordering rules application. After the reordering rules application, the AIG network is mapped to an AIG netlist using specific library cells. Our approach combines network re-structuring, AIG nodes reordering, dynamic power and longest path delay estimation and optimisation and finally technology mapping to an AIG netlist. A set of MCNC Benchmark circuits and large combinational circuits up to 100,000 gates have been used to validate our methodology. Comparisons for power and delay optimisation are made with the best synthesis scripts used in ABC. Reduction of 23% in power and 15% in delay with minimal overhead is achieved, compared to the best known ABC results. Also, our approach is also implemented on a number of processors with combinational and sequential components and significant savings are achieved.

Recognition of Planar Segments in Point Cloud Based on Wavelet Transform

© 2005-2012 IEEE.Within industrial automation systems, three-dimensional (3-D) vision provides very useful feedback information in autonomous operation of various manufacturing equipment (e.g., industrial robots, material handling devices, assembly systems, and machine tools). The hardware performance in contemporary 3-D scanning devices is suitable for online utilization. However, the bottleneck is the lack of real-time algorithms for recognition of geometric primitives (e.g., planes and natural quadrics) from a scanned point cloud. One of the most important and the most frequent geometric primitive in various engineering tasks is plane. In this paper, we propose a new fast one-pass algorithm for recognition (segmentation and fitting) of planar segments from a point cloud. To effectively segment planar regions, we exploit the orthonormality of certain wavelets to polynomial function, as well as their sensitivity to abrupt changes. After segmentation of planar regions, we estimate the parameters of corresponding planes using standard fitting procedures. For point cloud structuring, a z-buffer algorithm with mesh triangles representation in barycentric coordinates is employed. The proposed recognition method is tested and experimentally validated in several real-world case studies.

A Structured Approach to Simulate Manufacturing System In Virtual Environment

Nowadays, the realization of the Virtual Factory (VF) is the strategic goal of many manufacturing enterprises for the coming years. The industrial scenario is characterized by the dynamics of innovations increment and the product life cycle became shorter. Furthermore products and the corresponding manufacturing processes get more and more complex. Therefore, companies need new methods for the planning of manufacturing systems.
To date, the efforts have focused on the creation of an integrated environment to design and manage the manufacturing process of a new product. The future goal is to integrate Virtual Reality (VR) tools into the Product Lifecycle Management of the manufacturing industries.
In order to realize this goal the authors have conducted a study to perform VF simulation steps for a supplier of Industrial Automation Systems and have provided a structured approach focusing on interaction between simulation software and VR hardware tools in order to simulate both robotic and
manual work cells.
The first results of the study in progress have been carried out in the VR Laboratory of the Competence Regional Centre for the qualification of the Transportation Systems that has been founded by Campania Region.

Neural networks assisted PID autotuning

The Proportional, Integral and Derivative (PID) controllers are standard building blocks for industrial automation. Their popularity comes from their rebust performance and also from their functional simplicity.

Neural networks assisted PID autotuning

A scheme of automatically tuning the existing industrial PID controllers using neural networks is proposed. The scheme estimates the process critical data on-line in proportional control mode.

Connectionist approach to PID autotuning

Proportional, Integral and Derivative (PID) regulators are standard building blocks for industrial automation. The popularity of these regulatores comes from their rebust performance in a wide range of operationg conditions, and also from their functional simplicity, which makes them suitable for manual tuning.

A neural network PID autotuner

Proportional, Integral and Derivative (PID) regulators are standard building blocks for industrial automation. Their popularity comes from their rebust performance and also from their functional simplicity. Whether because the plant is time-varying, or because of components ageing, these controllers need to be regularly retuned.

A connectionist approach to PID autotuning

Proportional, Integral and Derivative (PID) regulators are standard building blocks for industrial automation. The popularity of these regulators comes from their rebust performance in a wide range of operating conditions, and also from their functional simplicity, which makes them suitable for manual tuning.

A neural network controller

Proportional, Integral and Derivative (PID) regulators are standard building blocks for industrial automation. The popularity of these regulators comes from their rebust performance in a wide range of operating conditions, and also from their functional simplicity, which makes them suitable for manual tuning.