962 resultados para IGBTs in parallel
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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
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The resistive-type superconducting fault current limiters (RSFCL) prototypes using YBCO-coated conductors have shown current limitation for medium voltage class applications for acting time up to 80 ms. By connecting an air-core reactor in parallel with the RSFCL, thus making an hybrid current limiter, one can extend the acting time for up to 1 s. In this work, we report the performance of a hybrid current limiter subjected to an AC peak fault current of 2 kA during 1 s for which within the first 80 ms the SFCL limits the current concurrently with the air-core reactor, and for the remaining 920 ms, only the air-core reactor limits the current. In order to evaluate the actual conditions for subsequent reconnection of RSFCL to the power grid, the hybrid fault current limiter was tested varying the time interval for recovery from 900 ms and 1.2 s, followed again by the concurrent operation of the hybrid limiter during 1 s (SFCL during 80 ms). From this evaluation test, the recovery time can be measured and compared using the voltage peak generated in superconducting module from the first and second fault test. The recovery time was also determined through the pulsed current method (PCM) on short-length sample test. The results showed that the fault current was limited from 1.9 kA down to 514 A after 1 cycle of 60 Hz frequency, with recovery time lower than 1.2 s for two subsequent fault current tests.
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Objective: Gastric development depends directly on the proliferation and differentiation of epithelial cells, and these processes are controlled by multiple elements, such as diet, hormones, and growth factors. Protein restriction affects gastrointestinal functions, but its effects on gastric growth are not fully understood. Methods: The present study evaluated cell proliferation in the gastric epithelia of rats subjected to protein restriction since gestation. Because ghrelin is increasingly expressed from the fetal to the weaning stages and might be part of growth regulation, its distribution in the stomach of rats was investigated at 14, 30, and 50 d old. Results: Although the protein restriction at 8% increased the intake of food and body weight, the body mass was lower (P < 0.05). The stomach and intestine were also smaller but increased proportionately throughout treatment. Cell proliferation was estimated through DNA synthesis and metaphase indices, and lower rates (P < 0.05) were detected at the different ages. The inhibition was concomitant with a larger number of ghrelin-immunolabeled cells at 30 and 50 d postnatally. Conclusion: Protein restriction impairs cell proliferation in the gastric epithelium, and a ghrelin upsurge under this condition is parallel to lower gastric and body growth rates. (C) 2012 Elsevier Inc. All rights reserved.
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We study a strongly interacting "quantum dot 1" and a weakly interacting "dot 2" connected in parallel to metallic leads. Gate voltages can drive the system between Kondo-quenched and non-Kondo free-moment phases separated by Kosterlitz-Thouless quantum phase transitions. Away from the immediate vicinity of the quantum phase transitions, the physical properties retain signatures of first-order transitions found previously to arise when dot 2 is strictly noninteracting. As interactions in dot 2 become stronger relative to the dot-lead coupling, the free moment in the non-Kondo phase evolves smoothly from an isolated spin-one-half in dot 1 to a many-body doublet arising from the incomplete Kondo compensation by the leads of a combined dot spin-one. These limits, which feature very different spin correlations between dot and lead electrons, can be distinguished by weak-bias conductance measurements performed at finite temperatures.
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Limited data are available regarding the frequency of oesophageal motility and bolus transit abnormalities in subgroups of patients with gastro-oesophageal reflux disease (GERD).
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BACKGROUND Oesophageal clearance has been scarcely studied. AIMS Oesophageal clearance in endoscopy-negative heartburn was assessed to detect differences in bolus clearance time among patients sub-grouped according to impedance-pH findings. METHODS In 118 consecutive endoscopy-negative heartburn patients impedance-pH monitoring was performed off-therapy. Acid exposure time, number of refluxes, baseline impedance, post-reflux swallow-induced peristaltic wave index and both automated and manual bolus clearance time were calculated. Patients were sub-grouped into pH/impedance positive (abnormal acid exposure and/or number of refluxes) and pH/impedance negative (normal acid exposure and number of refluxes), the former further subdivided on the basis of abnormal/normal acid exposure time (pH+/-) and abnormal/normal number of refluxes (impedance+/-). RESULTS Poor correlation (r=0.35) between automated and manual bolus clearance time was found. Manual bolus clearance time progressively decreased from pH+/impedance+ (42.6s), pH+/impedance- (27.1s), pH-/impedance+ (17.8s) to pH-/impedance- (10.8s). There was an inverse correlation between manual bolus clearance time and both baseline impedance and post-reflux swallow-induced peristaltic wave index, and a direct correlation between manual bolus clearance and acid exposure time. A manual bolus clearance time value of 14.8s had an accuracy of 93% to differentiate pH/impedance positive from pH/impedance negative patients. CONCLUSIONS When manually measured, bolus clearance time reflects reflux severity, confirming the pathophysiological relevance of oesophageal clearance in reflux disease.
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Myanmar maintained a multiple exchange rate system, and the parallel market exchange rate was left untamed. In the last two decades, the Myanmar kyat exchange rate of the parallel market has exhibited the sharpest fluctuations among Southeast Asian currencies in real terms. Since the move to a managed float regime in April 2012, the question arises of whether exchange rate policies will be effective in stabilizing the real exchange rate. This paper investigates the sources of fluctuations in the real effective exchange rate using Blanchard and Quah’s (1989) structural vector autoregression model. As nominal shocks can be created by exchange rate policies, a persistent impact of a nominal shock implies more room for exchange rate policies. Decomposition of the fluctuations into nominal and real shocks indicates that the impact of nominal shocks is small and quickly diminishes, implying that complementary sterilization is necessary for effective foreign exchange market interventions.
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We present a technique to estimate accurate speedups for parallel logic programs with relative independence from characteristics of a given implementation or underlying parallel hardware. The proposed technique is based on gathering accurate data describing one execution at run-time, which is fed to a simulator. Alternative schedulings are then simulated and estimates computed for the corresponding speedups. A tool implementing the aforementioned techniques is presented, and its predictions are compared to the performance of real systems, showing good correlation.
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Incorporating the possibility of attaching attributes to variables in a logic programming system has been shown to allow the addition of general constraint solving capabilities to it. This approach is very attractive in that by adding a few primitives any logic programming system can be turned into a generic constraint logic programming system in which constraint solving can be user defined, and at source level - an extreme example of the "glass box" approach. In this paper we propose a different and novel use for the concept of attributed variables: developing a generic parallel/concurrent (constraint) logic programming system, using the same "glass box" flavor. We argüe that a system which implements attributed variables and a few additional primitives can be easily customized at source level to implement many of the languages and execution models of parallelism and concurrency currently proposed, in both shared memory and distributed systems. We illustrate this through examples.
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The term "Logic Programming" refers to a variety of computer languages and execution models which are based on the traditional concept of Symbolic Logic. The expressive power of these languages offers promise to be of great assistance in facing the programming challenges of present and future symbolic processing applications in Artificial Intelligence, Knowledge-based systems, and many other areas of computing. The sequential execution speed of logic programs has been greatly improved since the advent of the first interpreters. However, higher inference speeds are still required in order to meet the demands of applications such as those contemplated for next generation computer systems. The execution of logic programs in parallel is currently considered a promising strategy for attaining such inference speeds. Logic Programming in turn appears as a suitable programming paradigm for parallel architectures because of the many opportunities for parallel execution present in the implementation of logic programs. This dissertation presents an efficient parallel execution model for logic programs. The model is described from the source language level down to an "Abstract Machine" level suitable for direct implementation on existing parallel systems or for the design of special purpose parallel architectures. Few assumptions are made at the source language level and therefore the techniques developed and the general Abstract Machine design are applicable to a variety of logic (and also functional) languages. These techniques offer efficient solutions to several areas of parallel Logic Programming implementation previously considered problematic or a source of considerable overhead, such as the detection and handling of variable binding conflicts in AND-Parallelism, the specification of control and management of the execution tree, the treatment of distributed backtracking, and goal scheduling and memory management issues, etc. A parallel Abstract Machine design is offered, specifying data areas, operation, and a suitable instruction set. This design is based on extending to a parallel environment the techniques introduced by the Warren Abstract Machine, which have already made very fast and space efficient sequential systems a reality. Therefore, the model herein presented is capable of retaining sequential execution speed similar to that of high performance sequential systems, while extracting additional gains in speed by efficiently implementing parallel execution. These claims are supported by simulations of the Abstract Machine on sample programs.
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