Methods of Design and Testing of Real Time Systems

Teollusuussovelluksissa vaaditaan nykyisin yhä useammin reaaliaikaista tiedon käsittelyä. Luotettavuus on yksi tärkeimmistä reaaliaikaiseen tiedonkäsittelyyn kykenevän järjestelmän ominaisuuksista. Sen saavuttamiseksi on sekä laitteisto, että ohjelmisto testattava. Tämän työn päätavoitteena on laitteiston testaaminen ja laitteiston testattavuus, koska luotettava laitteistoalusta on perusta tulevaisuuden reaaliaikajärjestelmille. Diplomityössä esitetään digitaaliseen signaalinkäsittelyyn soveltuvan prosessorikortin suunnittelu. Prosessorikortti on tarkoitettu sähkökoneiden ennakoivaa kunnonvalvontaa varten. Uusimmat DFT (Desing for Testability) menetelmät esitellään ja niitä sovelletaan prosessorikortin sunnittelussa yhdessä vanhempien menetelmien kanssa. Kokemukset ja huomiot menetelmien soveltuvuudesta raportoidaan työn lopussa. Työn tavoitteena on kehittää osakomponentti web -pohjaiseen valvontajärjestelmään, jota on kehitetty Sähkötekniikan osastolla Lappeenrannan teknillisellä korkeakoululla.

Matkustajainformaatiojärjestelmän toteuttaminen junaan

Matkustajainformaatio junassa koostuu vaunujen ulkopuolisilla kylkinäytöillä esitettävistä junan lähtö-, väli- ja määräasematiedoista yhdessä junan ja vaunujen myyntinumeroiden kanssa sekä vaunujen sisäpuolella automaattisista kuulutuksista ja matkustamon näytöillä esitettävästä staattisesta ja vaihtuvasta informaatiosta. Työssä toteutetaan matkustajainformaatiojärjestelmä käytettäväksi matkustajunissa. Järjestelmään syötetään ennen matkan alkua junan tiedot, jonka jälkeen se toimii automaattisesti ilman tarvetta junahenkilökunnan toimenpiteille. Poikkeustilanteissa junahenkilökunta voi estää järjestelmän toiminnan tai valita esiohjelmointuja erikoiskuulutuksia. Toteuttamismenetelmäksi valittiin C-ohjelmointikieli Linux-käyttöjärjestelmällä varustetulla sulautetulla rautatiekäyttöön suunnitellulla laitealustalla.

A Model-Based Development and Verification Framework for Distributed System-on-Chip Architecture

The capabilities and thus, design complexity of VLSI-based embedded systems have increased tremendously in recent years, riding the wave of Moore’s law. The time-to-market requirements are also shrinking, imposing challenges to the designers, which in turn, seek to adopt new design methods to increase their productivity. As an answer to these new pressures, modern day systems have moved towards on-chip multiprocessing technologies. New architectures have emerged in on-chip multiprocessing in order to utilize the tremendous advances of fabrication technology. Platform-based design is a possible solution in addressing these challenges. The principle behind the approach is to separate the functionality of an application from the organization and communication architecture of hardware platform at several levels of abstraction. The existing design methodologies pertaining to platform-based design approach don’t provide full automation at every level of the design processes, and sometimes, the co-design of platform-based systems lead to sub-optimal systems. In addition, the design productivity gap in multiprocessor systems remain a key challenge due to existing design methodologies. This thesis addresses the aforementioned challenges and discusses the creation of a development framework for a platform-based system design, in the context of the SegBus platform - a distributed communication architecture. This research aims to provide automated procedures for platform design and application mapping. Structural verification support is also featured thus ensuring correct-by-design platforms. The solution is based on a model-based process. Both the platform and the application are modeled using the Unified Modeling Language. This thesis develops a Domain Specific Language to support platform modeling based on a corresponding UML profile. Object Constraint Language constraints are used to support structurally correct platform construction. An emulator is thus introduced to allow as much as possible accurate performance estimation of the solution, at high abstraction levels. VHDL code is automatically generated, in the form of “snippets” to be employed in the arbiter modules of the platform, as required by the application. The resulting framework is applied in building an actual design solution for an MP3 stereo audio decoder application.

FPGA-based object detection using classification circuits

Dans l'apprentissage machine, la classification est le processus d’assigner une nouvelle observation à une certaine catégorie. Les classifieurs qui mettent en œuvre des algorithmes de classification ont été largement étudié au cours des dernières décennies. Les classifieurs traditionnels sont basés sur des algorithmes tels que le SVM et les réseaux de neurones, et sont généralement exécutés par des logiciels sur CPUs qui fait que le système souffre d’un manque de performance et d’une forte consommation d'énergie. Bien que les GPUs puissent être utilisés pour accélérer le calcul de certains classifieurs, leur grande consommation de puissance empêche la technologie d'être mise en œuvre sur des appareils portables tels que les systèmes embarqués. Pour rendre le système de classification plus léger, les classifieurs devraient être capable de fonctionner sur un système matériel plus compact au lieu d'un groupe de CPUs ou GPUs, et les classifieurs eux-mêmes devraient être optimisés pour ce matériel. Dans ce mémoire, nous explorons la mise en œuvre d'un classifieur novateur sur une plate-forme matérielle à base de FPGA. Le classifieur, conçu par Alain Tapp (Université de Montréal), est basé sur une grande quantité de tables de recherche qui forment des circuits arborescents qui effectuent les tâches de classification. Le FPGA semble être un élément fait sur mesure pour mettre en œuvre ce classifieur avec ses riches ressources de tables de recherche et l'architecture à parallélisme élevé. Notre travail montre que les FPGAs peuvent implémenter plusieurs classifieurs et faire les classification sur des images haute définition à une vitesse très élevée.

WCSC 2013: the 3rd World Chess Software Championship

The 3rd World Chess Software Championship took place in Yokohama, Japan during August 2013. It pits chess engines against each other on a common hardware platform - in this instance, the Intel i7 2740 Ivy Bridge with 16GB RAM supporting a potential eight processing threads. It was narrowly won by HIARCS from JUNIOR and PANDIX with JONNY, SHREDDER and MERLIN taking the remaining places. Games, occasionally annotated, are available here.

Infra-estrutura para avaliação e testes de protocolos sociais de comunicação em ambientes tridimencionais compartilhados

The advent of the Internet stimulated the appearance of several services. An example is the communication ones present in the users day-by-day. Services as chat and e-mail reach an increasing number of users. This fact is turning the Net a powerful communication medium. The following work explores the use of communication conventional services into the Net infrastructure. We introduce the concept of communication social protocols applied to a shared virtual environment. We argue that communication tools have to be adapted to the Internet potentialities. To do that, we approach some theories of the Communication area and its applicability in a virtual environment context. We define multi-agent architecture to support the offer of these services, as well as, a software and hardware platform to support the accomplishment of experiments using Mixed Reality. Finally, we present the obtained results, experiments and products

e-Pontos: Uma solução embarcada de automação comercial aplicada a clubes de fidelidade baseado em tecnologia RFID e esmart card

In practically all vertical markets and in every region of the planet, loyalty marketers have adopted the tactic of recognition and reward to identify, maintain and increase the yield of their customers. Several strategies have been adopted by companies, and the most popular among them is the loyalty program, which displays a loyalty club to manage these rewards. But the problem with loyalty programs is that customer identification and transfer of loyalty points are made in a semiautomatic. Aiming at this, this paper presents a master's embedded business automation solution called e-Points. The goal of e-Points is munir clubs allegiances with fully automated tooling technology to identify customers directly at the point of sales, ensuring greater control over the loyalty of associate members. For this, we developed a hardware platform with embedded system and RFID technology to be used in PCs tenant, a smart card to accumulate points with every purchase and a web server, which will provide services of interest to retailers and customers membership to the club

Development of a support vector machine-based navigation system for driving a mobile robot through paths in plantations

The use of mobile robots turns out to be interesting in activities where the action of human specialist is difficult or dangerous. Mobile robots are often used for the exploration in areas of difficult access, such as rescue operations and space missions, to avoid human experts exposition to risky situations. Mobile robots are also used in agriculture for planting tasks as well as for keeping the application of pesticides within minimal amounts to mitigate environmental pollution. In this paper we present the development of a system to control the navigation of an autonomous mobile robot through tracks in plantations. Track images are used to control robot direction by preprocessing them to extract image features. Such features are then submitted to a support vector machine in order to find out the most appropriate route. The overall goal of the project to which this work is connected is to develop a real time robot control system to be embedded into a hardware platform. In this paper we report the software implementation of a support vector machine, which so far presented around 93% accuracy in predicting the appropriate route. © 2012 IEEE.

Desenvolvimento de um sistema de navegação baseado em máquina de vetores de suporte para dirigibilidade de um robô móvel por caminhos em plantações

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Comparing support vector machines and artificial neural networks in the recognition of steering angle for driving of mobile robots through paths in plantations

The use of mobile robots turns out to be interesting in activities where the action of human specialist is difficult or dangerous. Mobile robots are often used for the exploration in areas of difficult access, such as rescue operations and space missions, to avoid human experts exposition to risky situations. Mobile robots are also used in agriculture for planting tasks as well as for keeping the application of pesticides within minimal amounts to mitigate environmental pollution. In this paper we present the development of a system to control the navigation of an autonomous mobile robot through tracks in plantations. Track images are used to control robot direction by pre-processing them to extract image features. Such features are then submitted to a support vector machine and an artificial neural network in order to find out the most appropriate route. A comparison of the two approaches was performed to ascertain the one presenting the best outcome. The overall goal of the project to which this work is connected is to develop a real time robot control system to be embedded into a hardware platform. In this paper we report the software implementation of a support vector machine and of an artificial neural network, which so far presented respectively around 93% and 90% accuracy in predicting the appropriate route. (C) 2013 The Authors. Published by Elsevier B.V. Selection and peer review under responsibility of the organizers of the 2013 International Conference on Computational Science

Desenvolvimento de um sistema para navegação de robôs móveis por caminhos em plantações

The use of mobile robots in the agriculture turns out to be interesting in tasks of cultivation and application of pesticides in minute quantities to reduce environmental pollution. In this paper we present the development of a system to control an autonomous mobile robot navigation through tracks in plantations. Track images are used to control robot direction by preprocessing them to extract image features, and then submitting such characteristic features to a support vector machine to find out the most appropriate route. As the overall goal of the project to which this work is connected is the robot control in real time, the system will be embedded onto a hardware platform. However, in this paper we report the software implementation of a support vector machine, which so far presented around 93% accuracy in predicting the appropriate route.

Sviluppo di algoritmi avanzati di analisi e diagnosi combustione in tempo reale per motori endotermici alternativi

Increasingly stringent exhaust emission limits and higher fuel economy are the main drivers of the engine development process. As a consequence, the complexity of the propulsion units and its subsystems increase, due to the extensive use of sensors and actuators needed to obtain a precise control over the combustion phase. Since engine calibration process consumes most of the development time, new tools and methodologies are needed to shorten the development time and increase the performance attainable. Real time combustion analysis, based on the in-cylinder pressure signal, can significantly improve the calibration of the engine control strategies and the development of new algorithms, giving instantaneous feedback on the engine behavior. A complete combustion analysis and diagnosis system has been developed, capable of evaluating the most important indicators about the combustion process, such as indicated mean effective pressure, heat release, mass fraction burned and knock indexes. Such a tool is built on top of a flexible, modular and affordable hardware platform, capable of satisfying the requirements needed for accuracy and precision, but also enabling the use directly on-board the vehicle, due to its small form factor.

Entwicklung eines Versuchsfelds für große Systeme intelligenter Behälter

Im Rahmen dieses Artikels werden aktuelle Forschungsarbeiten zum Einsatz von Energy-Harvesting und Ultra-Low-Power-Geräten in Materialflusssystemen beschrieben. Ein besonderes Augenmerk wird auf die inBin-Plattform, das Energy-Harvesting und deren Auswirkungen auf die Leistungsverfügbarkeit gelegt. Dazu werden die Hardwareplattform und Architektur der inBin-Plattform sowie der Aufbau eines Versuchsfelds detailliert erläutert. Des Weiteren wird ein Ansatz zur Modellierung und Simulation von Systemen mit einer großen Anzahl von inBin-Plattformen vorgestellt. Darüber hinaus werden die Ergebnisse zweier simulierter Szenarien und mögliche Folgen für die Planung zukünftiger Materialflusssysteme betrachtet.

Real Time FPGA Implementation of an Modulation Classifier for Electronic Warfare Applications

This paper presents an automatic modulation classifier for electronic warfare applications. It is a pattern recognition modulation classifier based on statistical features of the phase and instantaneous frequency. This classifier runs in a real time operation mode with sampling rates in excess of 1 Gsample/s. The hardware platform for this application is a Field Programmable Gate Array (FPGA). This AMC is subsidiary of a digital channelised receiver also implemented in the same platform.

Area-delay Trade-offs of Texture Decompressors for a Graphics Processing Unit

Graphics Processing Units have become a booster for the microelectronics industry. However, due to intellectual property issues, there is a serious lack of information on implementation details of the hardware architecture that is behind GPUs. For instance, the way texture is handled and decompressed in a GPU to reduce bandwidth usage has never been dealt with in depth from a hardware point of view. This work addresses a comparative study on the hardware implementation of different texture decompression algorithms for both conventional (PCs and video game consoles) and mobile platforms. Circuit synthesis is performed targeting both a reconfigurable hardware platform and a 90nm standard cell library. Area-delay trade-offs have been extensively analyzed, which allows us to compare the complexity of decompressors and thus determine suitability of algorithms for systems with limited hardware resources.