Operator and organizational maintenance manual : test set, electronic circuit plug-in unit, AN/GRM-55.

"5 November 1962."

Operator's and organizational maintenance manual : test set, electronic circuit plug-in unit, TS-3317( )/TSQ-73 (NSN 1430-01-033-1078).

"14 May 1984."

Functional circuits and oscillators.

Includes bibliography.

Efficient Voltage/Current Spike Reduction by Active Gate Signaling

This paper presents an Active Gate Signaling scheme to reduce voltage/current spikes across insulated gate power switches in hard switching power electronic circuits. Voltage and/or current spikes may cause EMI noise. In addition, they increase voltage/current stress on the switch. Traditionally, a higher gate resistance is chosen to reduce voltage/current spikes. Since the switching loss will increase remarkably, an active gate voltage control scheme is developed to improve efficiency of hard switching circuits while the undesirable voltage and/or current spikes are minimized.

Reversible Conversion of Dominant Polarity in Ambipolar Polymer/Graphene Oxide Hybrids

The possibility to selectively modulate the charge carrier transport in semiconducting materials is extremely challenging for the development of high performance and low-power consuming logic circuits. Systematical control over the polarity (electrons and holes) in transistor based on solution processed layer by layer polymer/graphene oxide hybrid system has been demonstrated. The conversion degree of the polarity is well controlled and reversible by trapping the opposite carriers. Basically, an electron device is switched to be a hole only device or vice versa. Finally, a hybrid layer ambipolar inverter is demonstrated in which almost no leakage of opposite carrier is found. This hybrid material has wide range of applications in planar p-n junctions and logic circuits for high-throughput manufacturing of printed electronic circuits.

An ultra-stable Cu nanowire under thermo-mechanical loading: A molecular dynamic study

We report on the formation of a stable Body-Centered Heptahedral (BCH) crystalline nanobridge structure of diameter ~ 1nm under high strain rate tensile loading to a <100> Cu nanowire. Extensive Molecular Dynamics (MD) simulations are performed. Six different cross-sectional dimensions of Cu nanowires are analyzed, i.e. 0.3615 x 0.3615 nm2, 0.723 x 0.723 nm2, 1.0845 x 1.0845 nm2, 1.446 x 1.446 nm2, 1.8075 x 1.8075 nm2, and 2.169 x 2.169 nm2. The strain rates used in the present simulations are 1 x 109 s-1, 1 x 108 s-1, and 1 x 107 s-1. We have shown that the length of the nanobridge can be characterized by larger plastic strain. A large plastic deformation is an indication that the structure is highly stable. The BCH nanobridge structure also shows enhanced mechanical properties such as higher fracture toughness and higher failure strain. The effect of temperature, strain rate and size of the nanowire on the formation of BCH structure is also explained in details. We also show that the initial orientation of the nanowires play an important role on the formation of BCH crystalline structure. Results indicate that proper tailoring of temperature and strain rate during processing or in the device can lead to very long BCH nanobridge structure of Cu with enhanced mechanical properties, which may find potential application for nano-scale electronic circuits.

Maze solving automatons for self-healing of open interconnects: Modular add-on for circuit boards

We present the circuit board integration of a self-healing mechanism to repair open faults. The electric field driven mechanism physically restores fractured interconnects in electronic circuits and has the ability to solve mazes. The repair is performed by conductive particles dispersed in an insulating fluid. We demonstrate the integration of the healing module onto printed circuit boards and the ability of maze solving. We model and perform experiments on the influence of the geometry of conductive particles as well as the terminal impedances of the route on the healing efficiency. The typical heal rate is 10 mu m/s with healed route having mean resistance of 8 k Omega across a 200 micron gap and depending on the materials and concentrations used. (C) 2015 AIP Publishing LLC.

Plataforma de desenvolvimento de circuitos eletrônicos adaptativos.

Este trabalho apresenta uma arquitetura geral para evolução de circuitos eletrônicos analógicos baseada em algoritmos genéticos. A organização lógica privilegia a interoperabilidade de seus principais componentes, incluindo a possibilidade de substituição ou melhorias internas de suas funcionalidades. A plataforma implementada utiliza evolução extrínseca, isto é, baseada em simulação de circuitos, e visa facilidade e flexibilidade para experimentação. Ela viabiliza a interconexão de diversos componentes aos nós de um circuito eletrônico que será sintetizado ou adaptado. A técnica de Algoritmos Genéticos é usada para buscar a melhor forma de interconectar os componentes para implementar a função desejada. Esta versão da plataforma utiliza o ambiente MATLAB com um toolbox de Algoritmos Genéticos e o PSpice como simulador de circuitos. Os estudos de caso realizados apresentaram resultados que demonstram a potencialidade da plataforma no desenvolvimento de circuitos eletrônicos adaptativos.

Diseño de un sistema de monitorización de estructuras de procesamiento paralelo.

[ES]Este proyecto consiste en el diseño de un sistema de monitorización de estructuras (SHM) con procesamiento paralelo. Los sistemas SHM sirven para analizar la integridad de estructuras y detectar daños en las mismas. El sistema diseñado utiliza la técnica de ondas ultrasónicas superficiales. Integra todos los circuitos electrónicos para generar y adquirir las señales. También incluye un procesador para tratar las señales y detectar los daños de la estructura. El sistema se ha diseñado para conectar varios equipos en paralelo

Síntese evolucionária de circuitos sequenciais inspirada nos princípios da computação quântica.

Esta dissertação investiga a aplicação dos algoritmos evolucionários inspirados na computação quântica na síntese de circuitos sequenciais. Os sistemas digitais sequenciais representam uma classe de circuitos que é capaz de executar operações em uma determinada sequência. Nos circuitos sequenciais, os valores dos sinais de saída dependem não só dos valores dos sinais de entrada como também do estado atual do sistema. Os requisitos cada vez mais exigentes quanto à funcionalidade e ao desempenho dos sistemas digitais exigem projetos cada vez mais eficientes. O projeto destes circuitos, quando executado de forma manual, se tornou demorado e, com isso, a importância das ferramentas para a síntese automática de circuitos cresceu rapidamente. Estas ferramentas conhecidas como ECAD (Electronic Computer-Aided Design) são programas de computador normalmente baseados em heurísticas. Recentemente, os algoritmos evolucionários também começaram a ser utilizados como base para as ferramentas ECAD. Estas aplicações são referenciadas na literatura como eletrônica evolucionária. Os algoritmos mais comumente utilizados na eletrônica evolucionária são os algoritmos genéticos e a programação genética. Este trabalho apresenta um estudo da aplicação dos algoritmos evolucionários inspirados na computação quântica como uma ferramenta para a síntese automática de circuitos sequenciais. Esta classe de algoritmos utiliza os princípios da computação quântica para melhorar o desempenho dos algoritmos evolucionários. Tradicionalmente, o projeto dos circuitos sequenciais é dividido em cinco etapas principais: (i) Especificação da máquina de estados; (ii) Redução de estados; (iii) Atribuição de estados; (iv) Síntese da lógica de controle e (v) Implementação da máquina de estados. O Algoritmo Evolucionário Inspirado na Computação Quântica (AEICQ) proposto neste trabalho é utilizado na etapa de atribuição de estados. A escolha de uma atribuição de estados ótima é tratada na literatura como um problema ainda sem solução. A atribuição de estados escolhida para uma determinada máquina de estados tem um impacto direto na complexidade da sua lógica de controle. Os resultados mostram que as atribuições de estados obtidas pelo AEICQ de fato conduzem à implementação de circuitos de menor complexidade quando comparados com os circuitos gerados a partir de atribuições obtidas por outros métodos. O AEICQ e utilizado também na etapa de síntese da lógica de controle das máquinas de estados. Os circuitos evoluídos pelo AEICQ são otimizados segundo a área ocupada e o atraso de propagação. Estes circuitos são compatíveis com os circuitos obtidos por outros métodos e em alguns casos até mesmo superior em termos de área e de desempenho, sugerindo que existe um potencial de aplicação desta classe de algoritmos no projeto de circuitos eletrônicos.

Channels that heat up

This paper considers an additive noise channel where the time-κ noise variance is a weighted sum of the squared magnitudes of the previous channel inputs plus a constant. This channel model accounts for the dependence of the intrinsic thermal noise on the data due to the heat dissipation associated with the transmission of data in electronic circuits: the data determine the transmitted signal, which in turn heats up the circuit and thus influences the power of the thermal noise. The capacity of this channel (both with and without feedback) is studied at low transmit powers and at high transmit powers. At low transmit powers, the slope of the capacity-versus-power curve at zero is computed and it is shown that the heating-up effect is beneficial. At high transmit powers, conditions are determined under which the capacity is bounded, i.e., under which the capacity does not grow to infinity as the allowed average power tends to infinity. © 2009 IEEE.

A finite element model of magnetization of superconducting bulks using a solid-state flux pump

Superconductors have a bright future; they are able to carry very high current densities, switch rapidly in electronic circuits, detect extremely small perturbations in magnetic fields, and sustain very high magnetic fields. Of most interest to large-scale electrical engineering applications are the ability to carry large currents and to provide large magnetic fields. There are many projects that use the first property, and these have concentrated on power generation, transmission, and utilization; however, there are relatively few, which are currently exploiting the ability to sustain high magnetic fields. The main reason for this is that high field wound magnets can and have been made from both BSCCO and YBCO, but currently, their cost is much higher than the alternative provided by low-Tc materials such as Nb3Sn and NbTi. An alternative form of the material is the bulk form, which can be magnetized to high fields. This paper explains the mechanism, which allows superconductors to be magnetized without the need for high field magnets to perform magnetization. A finite-element model is presented, which is based on the E-J current law. Results from this model show how magnetization of the superconductor builds up cycle upon cycle when a traveling magnetic wave is induced above the superconductor. © 2011 IEEE.

HIRFL-CSR前端总线控制器的SD驱动

The HIRFL-CSR EVME bus controller, which runs Embedded Linux OS, is based on AT91RM9200 microprocessor, whose core is ARM920T. There are hardware interface electronic circuits connecting AT91RM9200 microprocessor and Security Digital Memory Card (SD Card). This article analyzes Operation System kernel and Linux device driver’s structure, designs SD Card driver based on Embedded Linux, which runs on AT91RM9200 microprocessor.中文文摘：简要论述了用于兰州重离子加速器冷却储存环(HIRFL-CSR)控制系统的前端总线控制器。该控制器是基于ARM920T核心的AT91RM9200处理器,运行嵌入式Linux操作系统。描述了AT91RM9200处理器与Security Digital MemoryCard(SD卡)的硬件接口电路,分析了操作系统内核和Linux驱动程序结构,设计和实现了嵌入式Linux下基于AT91RM9200处理器的SD卡驱动程序。

Reasoning Modeled as a Society of Communicating Experts

This report describes a domain independent reasoning system. The system uses a frame-based knowledge representation language and various reasoning techniques including constraint propagation, progressive refinement, natural deduction and explicit control of reasoning. A computational architecture based on active objects which operate by exchanging messages is developed and it is shown how this architecture supports reasoning activity. The user interacts with the system by specifying frames and by giving descriptions defining the problem situation. The system uses its reasoning capacity to build up a model of the problem situation from which a solution can interactively be extracted. Examples are discussed from a variety of domains, including electronic circuits, mechanical devices and music. The main thesis is that a reasoning system is best viewed as a parallel system whose control and data are distributed over a large network of processors that interact by exchanging messages. Such a system will be metaphorically described as a society of communicating experts.

Causal and Teleological Reasoning in Circuit Recognition

This thesis presents a theory of human-like reasoning in the general domain of designed physical systems, and in particular, electronic circuits. One aspect of the theory, causal analysis, describes how the behavior of individual components can be combined to explain the behavior of composite systems. Another aspect of the theory, teleological analysis, describes how the notion that the system has a purpose can be used to aid this causal analysis. The theory is implemented as a computer program, which, given a circuit topology, can construct by qualitative causal analysis a mechanism graph describing the functional topology of the system. This functional topology is then parsed by a grammar for common circuit functions. Ambiguities are introduced into the analysis by the approximate qualitative nature of the analysis. For example, there are often several possible mechanisms which might describe the circuit's function. These are disambiguated by teleological analysis. The requirement that each component be assigned an appropriate purpose in the functional topology imposes a severe constraint which eliminates all the ambiguities. Since both analyses are based on heuristics, the chosen mechanism is a rationalization of how the circuit functions, and does not guarantee that the circuit actually does function. This type of coarse understanding of circuits is useful for analysis, design and troubleshooting.