On optimizing micropower MOS regulated cascode circuits on switched current techniques

Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.

Advanced Control for Very Fast DC-DC Converters Based on Hysteresis of the C-out Current

The bandwidth achievable by using voltage mode control or current mode control in switch-mode power supply is limited by the switching frequency. Fast transient response requires high switching frequency, although lower switching frequencies could be more suitable for higher efficiency. This paper proposes the use of hysteretic control of the output capacitor $(C_{out})$ current to improve the dynamic response of the buck converter. An external voltage loop is required to accurately regulate the output voltage. The design of the hysteretic loop and the voltage loop are presented. Besides, it is presented a non-invasive current sensor that allows measuring the current in the capacitor. This strategy has been applied for DVS (dynamic voltage scaling) on a 5 MHz buck converter. Experimental results validate the proposed control technique and show fast transient response from 1.5 V to 2.5 V in 2 $mu{rm s}$.

Improvement of the Dynamic Performance of a Multiphase Current Controlled Buck Converter using an Auxiliary Synchronous Buck Converter as an Additional Energy Path

This work is related to the output impedance improvement of a Multiphase Buck converter with Peak Current Mode Control (PCMC) by means of introducing an additional power path that virtually increases the output capacitance during transients. Various solutions that can be employed to improve the dynamic behavior of the converter system exist, but nearly all solutions are developed for a Single Phase Buck converter with Voltage Mode Control (VMC), while in the VRM applications, due to the high currents, the system is usually implemented as a Multiphase Buck Converter with Current Mode Control. The additional energy path, as presented here, is introduced with the Output Impedance Correction Circuit (OICC) based on the Controlled Current Source (CCS). The OICC is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. Furthermore, this work extends the OICC concept to a Multiphase Buck Converter system while comparing proposed solution with the system that has n times bigger output capacitor. In addition, the OICC is implemented as a Synchronous Buck Converter with PCMC, thus reducing its influence on the system efficiency.

Multiphase Current Controlled Buck Converter with energy recycling Output Impedance Correction Circuit (OICC)

This work is related to the output impedance improvement of a Multiphase Buck converter with Peak Current Mode Control (PCMC) by means of introducing an additional power path that virtually increases the output capacitance during transients. Various solutions that can be employed to improve the dynamic behavior of the converter system exist, but nearly all solutions are developed for a Single Phase Buck converter with Voltage Mode Control (VMC), while in the VRM applications, due to the high currents, the system is usually implemented as a Multiphase Buck Converter with Current Mode Control. The Output Impedance Correction Circuit (OICC) is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. Furthermore, this work extends the OICC concept to a Multiphase Buck Converter system while comparing proposed solution with the system that has n times bigger output capacitor. In addition, the OICC is implemented as a Synchronous Buck Converter with PCMC, thus reducing its influence on the system efficiency

Metering of alternating current.

On cover: Extension course on metering of alternating current.

Design and characterization of wideband Hall current sensors in BCD technology for smart power and metering applications

Power electronic circuits are moving towards higher switching frequencies, exploiting the capabilities of novel devices to shrink the dimension of passive components. This trend demands sensors capable enough to operate at such high frequencies. This thesis aims to demonstrate through experimental characterization, the broadband capability of a fully integrated CMOS X-Hall current sensor in current mode interfaced with a transimpedance amplifier (TIA), chip CH09, realized in CMOS technology for power electronics applications such as power converters. The system exploits a common-mode control system to operate the dual supply system, 5-V for the X-Hall probe and 1.2-V for the readout. The developed prototype achieves a maximum acquisition bandwidth of 12 MHz, a power consumption of 11.46 mW, resolution of 39 mArms, a sensitivity of 8 % /T, and a FoM of 569-MHz/A2mW, significantly higher than current state-of-the-art. Further enhancements were proposed to CH09 as a new chip CH100, aiming for accuracy levels prerequisite for a real-time power electronic application. The TIA was optimized for a wider bandwidth of 26.7 MHz with nearly 30% reduction of the integrated input referred noise of 26.69 nArms at the probe-AFE interface in the frequency band of DC-30 MHz, and a 10% improvement in the dynamic range. The expected input range is 5-A. The chip incorporates a dual sensing chain for differential sensing to overcome common mode interferences. A novel offset cancellation technique is proposed that would require switching of polarity of bias currents. Thermal gain drift was improved by a factor of 8 and will be digitally calibrated utilizing a new built-in temperature sensor with a post calibration measurement accuracy greater than 1%. The estimated power consumption of the entire system is 55.6 mW. Both prototypes have been implemented through a 90-nm microelectronic process from STMicroelectronics and occupy a silicon area of 2.4 mm2.

WEXSYS - Web Expert System

Desde o início que os sistemas periciais não foram vistos apenas como sistemas que poderiam substituir os peritos. Os peritos por sua vez, independentemente da área em que operam, eram tidos como indivíduos que atingiram a excelência através da experiência, estudo e total dedicação, por vezes durante anos. Hoje, mais do que assumir o papel de um perito na excelência de uma área de actuação, os sistemas periciais sobressaem pela disponibilidade contínua, acessos facilitados, custos reduzidos, estabilidade de funcionamento e coerência de raciocínio. Empurrados pelos avanços actuais das redes em termos de velocidade e propagação global, estes sistemas são hoje disponibilizados de forma mais simples e acessível. Este trabalho é realizado com o propósito de evoluir o actual sistema para uma versão mais apelativa, funcional e fiável. Um dos objectivos passa pela evolução do actual modo de funcionamento, utilização local e apenas um utilizador, para um modo de funcionamento que permita uma disponibilização num ambiente de acesso global, acessível a qualquer hora e em qualquer local.

Reference-free high-speed cmos pipeline analog-to-digital converters

Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de Lisboa

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Hakkuriteholähteen säädön suunnittelu

Diplomityö on tehty osana ETX-tutkimushanketta: 'Volyymiteholähteen suunnittelumetodien kehitys ja optimointi DFM-viitekehyksessä'. Työssä suunnitellaan hakkuriteholähteelle säätäjä. Tähän suunnittelun sektoriin syventyminen on teollisuudessa jäänyt monesti vähälle. Säätö on tavallisesti ajan puutteen ja apuvälineiden käytön osaamattomuuden tai puuttumisen takia suunniteltu kokeilemalla. Työssä muodostetaan jännitemuotoisesti säädetylle hakkurille piensignaalimallilla linearisoidut siirtofunktiot, joiden perusteella voidaan tarkastella hakkurin stabiilisuutta takaisinkytketyssä säätösilmukassa. Stabiiliustarkastelu tehdään taajuustasossa käyttäen Bode-kuvaajia. Näiden kuvaajien perusteella viritetään järjestelmään säätäjä. Säätäjän toimintaa aikatasossa tarkastellaan simuloimalla ja reaalisen laitteen toimimista laboratorioprototyypin avulla. Tulosten perusteella voidaan todeta, että jännitemuotoisella säädöllä flyback-hakkuri saadaan nopeaksi epäjatkuvalla käämivirralla. Mikäli halutaan hakkurin toimivan jatkuvalla käämivirralla, on syytä käyttää muita säätömenetelmiä, esimerkiksi huippuvirtasäätöä.

Modeling and Analysis of Noise and Interconnects for On-Chip Communication Link Design

This thesis considers modeling and analysis of noise and interconnects in onchip communication. Besides transistor count and speed, the capabilities of a modern design are often limited by on-chip communication links. These links typically consist of multiple interconnects that run parallel to each other for long distances between functional or memory blocks. Due to the scaling of technology, the interconnects have considerable electrical parasitics that affect their performance, power dissipation and signal integrity. Furthermore, because of electromagnetic coupling, the interconnects in the link need to be considered as an interacting group instead of as isolated signal paths. There is a need for accurate and computationally effective models in the early stages of the chip design process to assess or optimize issues affecting these interconnects. For this purpose, a set of analytical models is developed for on-chip data links in this thesis. First, a model is proposed for modeling crosstalk and intersymbol interference. The model takes into account the effects of inductance, initial states and bit sequences. Intersymbol interference is shown to affect crosstalk voltage and propagation delay depending on bus throughput and the amount of inductance. Next, a model is proposed for the switching current of a coupled bus. The model is combined with an existing model to evaluate power supply noise. The model is then applied to reduce both functional crosstalk and power supply noise caused by a bus as a trade-off with time. The proposed reduction method is shown to be effective in reducing long-range crosstalk noise. The effects of process variation on encoded signaling are then modeled. In encoded signaling, the input signals to a bus are encoded using additional signaling circuitry. The proposed model includes variation in both the signaling circuitry and in the wires to calculate the total delay variation of a bus. The model is applied to study level-encoded dual-rail and 1-of-4 signaling. In addition to regular voltage-mode and encoded voltage-mode signaling, current-mode signaling is a promising technique for global communication. A model for energy dissipation in RLC current-mode signaling is proposed in the thesis. The energy is derived separately for the driver, wire and receiver termination.

Tuotannonohjausjärjestelmän kehittäminen laivanrakennustelakalla

Diplomityön tavoitteena oli selvittää tuotannon vallitseva toimintatapa, niin organisaation rakenteen, kuin myös sen toimintojen osalta. Vallitsevan toimintatavan epäkohtien perusteella pyrittiin luomaan uusi toimintatapa, jonka mukaan tuotannon tulisi toimia. Työn laajempana tarkoituksena oli edesauttaa tuotannonohjausjärjestelmän kehitystä ja käyttöönottoa STX Europen Turun telakalla. Työssä tutkittiin runkotuotannon tuotanto-organisaation prosesseja ja tuotannon toimintatapaa uuden tuotannonohjausjärjestelmän aikana. Tutkimuksessa selvitettiin tuotannon prosessien toimintaa ja havaintojen perusteella kuvattiin toimintojen epäkohdat. Tuotanto-organisaation toiminta kuvattiin yleisellä tasolla, jolloin epäkohtien vaikutus muuhun organisaatioon ja sen toimintaan ilmenivät. Havaintojen perusteella kävi ilmi, että tuotanto-organisaation toiminta ei ollut tuotannonohjausjärjestelmän vaatimalla tasolla. Tehtävienkuvauksia ei oltu laadittu tarvittavalla tarkkuudella. Asianomaiset henkilöt eivät olleet tietoisia heidän vastuualueistaan ja velvollisuuksistaan toimiessaan uuden tuotannonohjausjärjestelmän kanssa. Kuvauksen perusteella luotiin uusi ehdotus tuotanto-organisaation toimintatavalle. Työn johtopäätöksenä todettiin tarve uudelle tuotantoa tukevalle prosessille sekä prosessikuvauksien luomiselle koko tuotanto-organisaation toiminnasta. Johtopäätöksissä todettiin tuotannonohjausjärjestelmän olevan käyttöönottovalmiudessa, mutta mahdollisiin kehityskohteisiin tulisi ohjata resursseja.

An optically coupled power stimulus isolation unit with high voltage and fast rise time output

Recent technological developments have created new devices that could improve and simplify the construction of stimulus isolators. HEXFET transistors can switch large currents and hundreds of volts in nanoseconds. The newer opto-isolators can give a pulse rise time of a few nanoseconds, with output compatible with MOSFET devices, in which delays are reduced to nanoseconds. Integrated DC/DC converters are now available. Using these new resources we developed a new electrical stimulus isolator circuit with selectable constant-current and constant-voltage modes, which are precise and easy to construct. The circuit works like a regulated power supply in both modes with output switched to zero or to free mode through an opto-isolator device. The isolator analyses showed good practical performance. The output to ground resistance was 1011 ohms and capacitance 35 picofarads. The rise time and fall time were identical (5 µs) and constant. The selectable voltage or current output mode made it very convenient to use. The current mode, with higher output resistance values in low current ranges, permits intracellular stimulation even with tip resistances close to 100 megaohms. The high compliance of 200 V guarantees the value of the current stimulus. The very low output resistance in the voltage mode made the device highly suitable for extracellular stimulation with low impedance electrodes. Most importantly, these characteristics were achieved with a circuit that was easy to build and modify and assembled with components available in Brazil.

Numérisation des dossiers de santé et protection des renseignements personnels:impératifs techniques, intérêts économiques, considérations politiques et émergence de nouvelles normes

Dans son texte, l’auteur tente de répondre à quatre grandes questions : le cadre juridique actuel qui régi la gestion des renseignements personnels dans le réseau de la santé et des services sociaux protège–t–il adéquatement ces données sensibles ? Peut–on tenter d’améliorer cette protection ? Quels facteurs contribuent à l’émergence des nouvelles normes ? Quel rôle les exigences techniques, les intérêts économiques et les considérations politiques jouent–ils dans l’émergence de ces nouvelles normes ? À l’égard de ces interrogations, l’auteur montre que le régime actuel, qui se distingue particulièrement par sa complexité et son opacité, ne protège pas adéquatement les renseignements personnels appelés à circuler dans l’univers numérique en émergence. Il examine donc les facteurs qui contribuent À l’émergence des nouvelles normes alors que les règles juridiques actuelles se trouvent en porte–à–faux par rapport aux développements technologiques. Par la suite, il tente de situer ou de mesurer l’influence des intérêts économiques, des considérations politiques et des impératifs techniques dans l’émergence de ces nouvelles normes. Finalement, il met de l’avant un concept nouveau, celui des aires de partage, qu’il présente comme un moyen de mieux protéger les renseignements personnels et confidentiels dans l’ère de l’information.

A novel single-phase ZCS-PWM high-power-factor boost rectifier

This paper presents a novel single-phase high-power-factor (HPF) pulsewidth-modulated (PWM) boost rectifier featuring soft commutation of the active switches at zero current (ZC), It incorporates the most desirable properties of conventional PWM and soft-switching resonant techniques.The input current shaping is achieved with average current mode control and continuous inductor current mode.This new PWM converter provides ZC turn on and turn off of the active switches, and it is suitable for high-power applications employing insulated gate bipolar transistors (IGBT's),The principle of operation, the theoretical analysis, a design example, and experimental results from a laboratory prototype rated at 1600 W with 400-Vdc output voltage are presented. The measured efficiency and the power factor were 96.2% and 0.99%, respectively, with an input current total harmonic distortion (THD) equal to 3.94%, for an input voltage with THD equal to 3.8%, at rated load.