Static detection of anomalies in transactional memory programs

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática

A framework for memory contention analysis in multi-core platforms

The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

A modular distributed transactional memory framework

Dissertação para obtenção do Grau de Mestre em Engenharia Informática

Effect of surfactant on PDLC films with and without permanent memory effect

Dissertação para obtenção do Grau de Mestre em Engenharia Química e Bioquímica

Improvisation in tightly controlled work environments: The case of medical practice

We present a qualitative analysis of organizational improvisation and provide a preliminary insight into the following question: how is improvisation present in tightly controlled work environments? We conducted in situ observations of, and interviews with, several emergency medical teams and complemented this information with statistical and media data. Using grounded theory, we developed four propositions that were arranged into a model that allowed the identification of two use levels of established routines: (1) the visible side that accommodates contextual requirements, and (2) the improvisational side that provides a response to activity characteristics. This dual process is related to the existence of pressures that operate at the institutional level with practical needs emerging from the operational domain. In contrast with most of the literature, this study reveals that the presence of a broad procedural organizational memory does not restrict improvisation but enables a bureaucratic system to produce flexible improvised performance.

Smart windows with permanent memory effect

Dissertação para obtenção do Grau de Mestre em Engenharia Química e Bioquímica

Rely-guarantee protocols for safe interference over shared memory

Mutable state can be useful in certain algorithms, to structure programs, or for efficiency purposes. However, when shared mutable state is used in non-local or nonobvious ways, the interactions that can occur via aliases to that shared memory can be a source of program errors. Undisciplined uses of shared state may unsafely interfere with local reasoning as other aliases may interleave their changes to the shared state in unexpected ways. We propose a novel technique, rely-guarantee protocols, that structures the interactions between aliases and ensures that only safe interference is possible. We present a linear type system outfitted with our novel sharing mechanism that enables controlled interference over shared mutable resources. Each alias is assigned separate, local roles encoded in a protocol abstraction that constrains how an alias can legally use that shared state. By following the spirit of rely-guarantee reasoning, our rely-guarantee protocols ensure that only safe interference can occur but still allow many interesting uses of shared state, such as going beyond invariant and monotonic usages. This thesis describes the three core mechanisms that enable our type-based technique to work: 1) we show how a protocol models an alias’s perspective on how the shared state evolves and constrains that alias’s interactions with the shared state; 2) we show how protocols can be used while enforcing the agreed interference contract; and finally, 3) we show how to check that all local protocols to some shared state can be safely composed to ensure globally safe interference over that shared memory. The interference caused by shared state is rooted at how the uses of di↵erent aliases to that state may be interleaved (perhaps even in non-deterministic ways) at run-time. Therefore, our technique is mostly agnostic as to whether this interference was the result of alias interleaving caused by sequential or concurrent semantics. We show implementations of our technique in both settings, and highlight their di↵erences. Because sharing is “first-class” (and not tied to a module), we show a polymorphic procedure that enables abstract compositions of protocols. Thus, protocols can be specialized or extended without requiring specific knowledge of the interference produce by other protocols to that state. We show that protocol composition can ensure safety even when considering abstracted protocols. We show that this core composition mechanism is sound, decidable (without the need for manual intervention), and provide an algorithm implementation.

Development of paper transistor with memory effect

This work will discuss the use of different paper membranes as both the substrate and dielectric for field-effect memory transistors. Three different nanofibrillated cellulose membranes (NFC) were used as the dielectric layer of the memory transistors (NFC), one with no additives, one with an added polymer PAE and one with added HCl. Gallium indium zinc oxide (GIZO) was used as the device’s semiconductor and gallium aluminium zinc oxide (GAZO) was used as the gate electrode. Fourier transform infrared spectroscopy (FTIR) was used to access the water content of the paper membranes before and after vacuum. It was found that the devices recovered their water too quickly for a difference to be noticeable in FTIR. The transistor’s electrical performance tests yielded a maximum ION/IOFF ratio of around 3,52x105 and a maximum subthreshold swing of 0,804 V/decade. The retention time of the dielectric charge that grants the transistor its memory capabilities was accessed by the measurement of the drain current periodically during 144 days. During this period the mean drain current did not lower, leaving the retention time of the device indeterminate. These results were compared with similar devices revealing these devices to be at the top tier of the state-of-the-art.

Scaling In-Memory databases on multicores

Current computer systems have evolved from featuring only a single processing unit and limited RAM, in the order of kilobytes or few megabytes, to include several multicore processors, o↵ering in the order of several tens of concurrent execution contexts, and have main memory in the order of several tens to hundreds of gigabytes. This allows to keep all data of many applications in the main memory, leading to the development of inmemory databases. Compared to disk-backed databases, in-memory databases (IMDBs) are expected to provide better performance by incurring in less I/O overhead. In this dissertation, we present a scalability study of two general purpose IMDBs on multicore systems. The results show that current general purpose IMDBs do not scale on multicores, due to contention among threads running concurrent transactions. In this work, we explore di↵erent direction to overcome the scalability issues of IMDBs in multicores, while enforcing strong isolation semantics. First, we present a solution that requires no modification to either database systems or to the applications, called MacroDB. MacroDB replicates the database among several engines, using a master-slave replication scheme, where update transactions execute on the master, while read-only transactions execute on slaves. This reduces contention, allowing MacroDB to o↵er scalable performance under read-only workloads, while updateintensive workloads su↵er from performance loss, when compared to the standalone engine. Second, we delve into the database engine and identify the concurrency control mechanism used by the storage sub-component as a scalability bottleneck. We then propose a new locking scheme that allows the removal of such mechanisms from the storage sub-component. This modification o↵ers performance improvement under all workloads, when compared to the standalone engine, while scalability is limited to read-only workloads. Next we addressed the scalability limitations for update-intensive workloads, and propose the reduction of locking granularity from the table level to the attribute level. This further improved performance for intensive and moderate update workloads, at a slight cost for read-only workloads. Scalability is limited to intensive-read and read-only workloads. Finally, we investigate the impact applications have on the performance of database systems, by studying how operation order inside transactions influences the database performance. We then propose a Read before Write (RbW) interaction pattern, under which transaction perform all read operations before executing write operations. The RbW pattern allowed TPC-C to achieve scalable performance on our modified engine for all workloads. Additionally, the RbW pattern allowed our modified engine to achieve scalable performance on multicores, almost up to the total number of cores, while enforcing strong isolation.

Connecting free volume with shape memory properties in noncytotoxic gamma-irradiated polycyclooctene

The free volume holes of a shape memory polymer have been analysed considering that the empty space between molecules is necessary for the molecular motion, and the shape memory response is based on polymer segments acting as molecular switches through variable flexibility with temperature or other stimuli. Therefore, thermomechanical analysis (TMA) and positron annihilation lifetime spectroscopy (PALS) have been applied to analyse shape recovery and free volume hole sizes in gamma irradiated polycyclooctene (PCO) samples, as a non-cytotoxic alternative to more conventional PCO crosslinked via peroxide for future applications in medicine. Thus, a first approach relating structure, free volume holes and shape memory properties in gamma irradiated PCO is presented. The results suggest that free volume holes caused by gamma irradiation in PCO samples facilitate the recovery process by improving movement of polymer chains and open t possibilities for the design and control of the macroscopic response.

Enhanced resistive switching and multilevel behavior in bilayered HfAlO/HfAlOx structures for non-volatile memory applications

In this work, hafnium aluminum oxide (HfAlO) thin films were deposited by ion beam sputtering deposition technique on Si substrate. The presence of oxygen vacancies in the HfAlOx layer deposited in oxygen deficient environment is evidenced from the photoluminescence spectra. Furthermore, HfAlO(oxygen rich)/HfAlOx(oxygen poor) bilayer structures exhibit multilevel resistive switching (RS), and the switching ratio becomes more prominent with increasing the HfAlO layer thickness. The bilayer structure with HfAlO/HfAlOx thickness of 30/40 nm displays the enhanced multilevel resistive switching characteristics, where the high resistance state/ intermediate resistance state (IRS) and IRS/low resistance state resistance ratios are 102 and 5 105 , respectively. The switching mechanisms in the bilayer structures were investigated by the temperature dependence of the three resistance states. This study revealed that the multilevel RS is attributed to the coupling of ionic conduction and the metallic conduction, being the first associated to the formation and rupture of conductive filaments related to oxygen vacancies and the second with the formation of a metallic filament. Moreover, the bilayer structures exhibit good endurance and stability in time.

Transcranial direct current stimulation based metaplasticity protocols in working memory

It has been already shown that delivering tDCS that are spaced by an interval alters its impact on motor plasticity. These effects can be explained, based on metaplasticity in which a previous modification of activity in a neuronal network can change the effects of subsequent interventions in the same network. But to date there is limited data assessing metaplasticity effects in cognitive functioning.

Abnormal interactions between context, memory structure, and mood in schizophrenia: an ERP investigation

This study used event-related potentials to examine interactions between mood, sentence context, and semantic memory structure in schizophrenia. Seventeen male chronic schizophrenia and 15 healthy control subjects read sentence pairs after positive, negative, or neutral mood induction. Sentences ended with expected words (EW), within-category violations (WCV), or between-category violations (BCV). Across all moods, patients showed sensitivity to context indexed by reduced N400 to EW relative to both WCV and BCV. However, they did not show sensitivity to the semantic memory structure. N400 abnormalities were particularly enhanced under a negative mood in schizophrenia. These findings suggest abnormal interactions between mood, context processing, and connections within semantic memory in schizophrenia, and a specific role of negative mood in modulating semantic processes in this disease.

As disfunções da memória organizacional e suas implicações no uso dos sistemas de informação: um caso de estudo

Dissertação de mestrado integrado em Engenharia e Gestão de Sistemas de Informação

The use of canonical correlation analysis to assess the relationship between executive functioning and verbal memory in older adults

Executive functioning (EF), which is considered to govern complex cognition, and verbal memory (VM) are constructs assumed to be related. However, it is not known the magnitude of the association between EF and VM, and how sociodemographic and psychological factors may affect this relationship, including in normal aging. In this study, we assessed different EF and VM parameters, via a battery of neurocognitive/psychological tests, and performed a Canonical Correlation Analysis (CCA) to explore the connection between these constructs, in a sample of middle- aged and older healthy individuals without cognitive impairment (N = 563, 50+ years of age). The analysis revealed a positive and moderate association between EF and VM independently of gender, age, education, global cognitive performance level, and mood. These results confirm that EF presents a significant association with VM performance.