Memory as discourse in Harold Pinter's old times, betrayal and a kind of Alaska

This paper aims at developing the topic of identity and the narration of the self through the other in Harold Pinter’s plays Old Times, Betrayal and A Kind of Alaska. In these plays Pinter deploys strategies to convey multiple implications which are based on the power of memory in which the structure of the plays is concocted.

Historical Heritage: A Study to Conservation

Considering ancient monuments and historical buildings, it seems that these mortars have proved to be durable and reliable materials. The restoration and maintenance of old renders is one of the key aspects of correct rehabilitation practice. The ideal course of action is to replace the damaged material by a material with compatible characteristics.The study in development presents the chemical, physical and morphologic analysis performed for ancient air lime mortars belonging to historical monuments: Santa Marta Fortress in the coast line Lisbon-Cascais dated from XVII century and Defense Wall of Lisbon dated from XI century, which layout could be associated to roman period. It is important to underline that the studied samples of ancient portuguese air lime mortars, have been submitted during centuries to very severe maritime environment that includes daily cycles of wet/dry, wind, friction and the constant presence of salts, generally aggressive. However, they show very good performance and conservation state, unlike most of the new air lime mortars, which are generally considered weak, not very durable, materials. This work is included in a study intending to determine key factors to the durability of these ancient materials in presence of water. Visible reaction rims around some aggregates suggests the occurrence of pozzolanic reactions between aggregates and the lime binder that creates neoformation products, such as calcium-silico-aluminates, which seems be, besides the pores filling, the responsible for the resistance and cohesion of these ancient mortars submitted to aggressive humid environments.

Runtime Elision of Transactional Barriers for Captured Memory

In this paper, we propose a new technique that can identify transaction-local memory (i.e. captured memory), in managed environments, while having a low runtime overhead. We implemented our proposal in a well known STM framework (Deuce) and we tested it in STMBench7 with two different STMs: TL2 and LSA. In both STMs the performance improved significantly (4 times and 2.6 times, respectively). Moreover, running the STAMP benchmarks with our approach shows improvements of 7 times in the best case for the Vacation application.

Projeto raízes : um olhar sobre. Mediação cultural e educação patrimonial na ilha de S. Miguel, Açores

II Congreso Internacional de Educación y Accesibilidad en Museos y Patrimonio: En y con todos los sentidos, hacia la integración social en igualdad. Huesca, 2, 3 y 4 de mayo de 2014.

Sistema de aquisição de dados em tempo real

Neste trabalho propus-me realizar um Sistema de Aquisição de Dados em Tempo Real via Porta Paralela. Para atingir com sucesso este objectivo, foi realizado um levantamento bibliográfico sobre sistemas operativos de tempo real, salientando e exemplificando quais foram marcos mais importantes ao longo da sua evolução. Este levantamento permitiu perceber o porquê da proliferação destes sistemas face aos custos que envolvem, em função da sua aplicação, bem como as dificuldades, científicas e tecnológicas, que os investigadores foram tendo, e que foram ultrapassando com sucesso. Para que Linux se comporte como um sistema de tempo real, é necessário configura-lo e adicionar um patch, como por exemplo o RTAI ou ADEOS. Como existem vários tipos de soluções que permitem aplicar as características inerentes aos sistemas de tempo real ao Linux, foi realizado um estudo, acompanhado de exemplos, sobre o tipo de arquitecturas de kernel mais utilizadas para o fazer. Nos sistemas operativos de tempo real existem determinados serviços, funcionalidades e restrições que os distinguem dos sistemas operativos de uso comum. Tendo em conta o objectivo do trabalho, e apoiado em exemplos, fizemos um pequeno estudo onde descrevemos, entre outros, o funcionamento escalonador, e os conceitos de latência e tempo de resposta. Mostramos que há apenas dois tipos de sistemas de tempo real o ‘hard’ que tem restrições temporais rígidas e o ‘soft’ que engloba as restrições temporais firmes e suaves. As tarefas foram classificadas em função dos tipos de eventos que as despoletam, e evidenciando as suas principais características. O sistema de tempo real eleito para criar o sistema de aquisição de dados via porta paralela foi o RTAI/Linux. Para melhor percebermos o seu comportamento, estudamos os serviços e funções do RTAI. Foi dada especial atenção, aos serviços de comunicação entre tarefas e processos (memória partilhada e FIFOs), aos serviços de escalonamento (tipos de escalonadores e tarefas) e atendimento de interrupções (serviço de rotina de interrupção - ISR). O estudo destes serviços levou às opções tomadas quanto ao método de comunicação entre tarefas e serviços, bem como ao tipo de tarefa a utilizar (esporádica ou periódica). Como neste trabalho, o meio físico de comunicação entre o meio ambiente externo e o hardware utilizado é a porta paralela, também tivemos necessidade de perceber como funciona este interface. Nomeadamente os registos de configuração da porta paralela. Assim, foi possível configura-lo ao nível de hardware (BIOS) e software (módulo do kernel) atendendo aos objectivos do presente trabalho, e optimizando a utilização da porta paralela, nomeadamente, aumentando o número de bits disponíveis para a leitura de dados. No desenvolvimento da tarefa de hard real-time, foram tidas em atenção as várias considerações atrás referenciadas. Foi desenvolvida uma tarefa do tipo esporádica, pois era pretendido, ler dados pela porta paralela apenas quando houvesse necessidade (interrupção), ou seja, quando houvesse dados disponíveis para ler. Desenvolvemos também uma aplicação para permitir visualizar os dados recolhidos via porta paralela. A comunicação entre a tarefa e a aplicação é assegurada através de memória partilhada, pois garantindo a consistência de dados, a comunicação entre processos do Linux e as tarefas de tempo real (RTAI) que correm ao nível do kernel torna-se muito simples. Para puder avaliar o desempenho do sistema desenvolvido, foi criada uma tarefa de soft real-time cujos tempos de resposta foram comparados com os da tarefa de hard real-time. As respostas temporais obtidas através do analisador lógico em conjunto com gráficos elaborados a partir destes dados, mostram e comprovam, os benefícios do sistema de aquisição de dados em tempo real via porta paralela, usando uma tarefa de hard real-time.

Fábrica da Baleia de São Vicente Ferreira : a destruição de um património industrial

Dissertação de Mestrado, Património, Museologia e Desenvolvimento, 25 de Fevereiro de 2016, Universidade dos Açores.

TimeMesh: an educational historical game

The TIMEMESH game, developed in the scope of the European Project SELEAG, is an educational game for learning history, culture and social relations. It is supported by an extensible, online, multi-language, multi-player, collaborative and social platform for sharing and acquiring knowledge of the history of European regions. The game has been already used, with remarkable success, in different European countries like Portugal, Spain, England, Slovenia, Estonia and Belgium.

Effects of early life permethrin exposure on spatial working memory and on monoamine levels in different brain areas of pre-senescent rats

Pesticide exposure during brain development could represent an important risk factor for the onset of neurodegenerative diseases. Previous studies investigated the effect of permethrin (PERM) administered at 34 mg/kg, a dose close to the no observable adverse effect level (NOAEL) from post natal day (PND) 6 to PND 21 in rats. Despite the PERM dose did not elicited overt signs of toxicity (i.e. normal body weight gain curve), it was able to induce striatal neurodegeneration (dopamine and Nurr1 reduction, and lipid peroxidation increase). The present study was designed to characterize the cognitive deficits in the current animal model. When during late adulthood PERM treated rats were tested for spatial working memory performances in a T-maze-rewarded alternation task they took longer to choose for the correct arm in comparison to age matched controls. No differences between groups were found in anxiety-like state, locomotor activity, feeding behavior and spatial orientation task. Our findings showing a selective effect of PERM treatment on the T-maze task point to an involvement of frontal cortico-striatal circuitry rather than to a role for the hippocampus. The predominant disturbances concern the dopamine (DA) depletion in the striatum and, the serotonin (5-HT) and noradrenaline (NE) unbalance together with a hypometabolic state in the medial prefrontal cortex area. In the hippocampus, an increase of NE and a decrease of DA were observed in PERM treated rats as compared to controls. The concentration of the most representative marker for pyrethroid exposure (3-phenoxybenzoic acid) measured in the urine of rodents 12 h after the last treatment was 41.50 µ/L and it was completely eliminated after 96 h.

Software transactional memory as a building block for parallel embedded realtime systems

The recent trends of chip architectures with higher number of heterogeneous cores, and non-uniform memory/non-coherent caches, brings renewed attention to the use of Software Transactional Memory (STM) as a fundamental building block for developing parallel applications. Nevertheless, although STM promises to ease concurrent and parallel software development, it relies on the possibility of aborting conflicting transactions to maintain data consistency, which impacts on the responsiveness and timing guarantees required by embedded real-time systems. In these systems, contention delays must be (efficiently) limited so that the response times of tasks executing transactions are upper-bounded and task sets can be feasibly scheduled. In this paper we assess the use of STM in the development of embedded real-time software, defending that the amount of contention can be reduced if read-only transactions access recent consistent data snapshots, progressing in a wait-free manner. We show how the required number of versions of a shared object can be calculated for a set of tasks. We also outline an algorithm to manage conflicts between update transactions that prevents starvation.

WCET analysis considering contention on memory bus in COTS-based multicores

The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.

Response time analysis of COTS-Based multicores considering the contention on the shared memory bus

The current industry trend is towards using Commercially available Off-The-Shelf (COTS) based multicores for developing real time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

Finding an upper bound on the increase in execution time due to contention on the memory bus in COTS-based multicore systems

Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).

Managing contention of software transactional memory in real-time systems

The foreseen evolution of chip architectures to higher number of, heterogeneous, cores, with non-uniform memory and non-coherent caches, brings renewed attention to the use of Software Transactional Memory (STM) as an alternative to lock-based synchronisation. However, STM relies on the possibility of aborting conflicting transactions to maintain data consistency, which impacts on the responsiveness and timing guarantees required by real-time systems. In these systems, contention delays must be (efficiently) limited so that the response times of tasks executing transactions are upperbounded and task sets can be feasibly scheduled. In this paper we defend the role of the transaction contention manager to reduce the number of transaction retries and to help the real-time scheduler assuring schedulability. For such purpose, the contention management policy should be aware of on-line scheduling information.

In-situ X-ray diffraction studies during growth of Ni-Ti shape memory alloy films and their complementary ex-situ characterization

Shape Memory Alloy (SMA) Ni-Ti films have attracted much interest as functional and smart materials due to their unique properties. However, there are still important issues unresolved like formation of film texture and its control as well as substrate effects. Thus, the main challenge is not only the control of the microstructure, including stoichiometry and precipitates, but also the identification and control of the preferential orientation since it is a crucial factor in determining the shape memory behaviour. The aim of this PhD thesis is to study the optimisation of the deposition conditions of films of Ni-Ti in order to obtain the material fully crystallized at the end of the deposition, and to establish a clear relationship between the substrates and texture development. In order to achieve this objective, a two-magnetron sputter deposition chamber has been used allowing to heat and to apply a bias voltage to the substrate. It can be mounted into the six-circle diffractometer of the Rossendorf Beamline (ROBL) at the European Synchrotron Radiation Facility (ESRF), Grenoble, France, enabling an in-situ characterization by X-ray diffraction(XRD) of the films during their growth and annealing. The in-situ studies enable us to identify the different steps of the structural evolution during deposition with a set of parameters as well as to evaluate the effect of changing parameters on the structural characteristics of the deposited film. Besides the in-situ studies, other complementary ex-situ characterization techniques such as XRD at a laboratory source, Rutherford backscattering spectroscopy(RBS), Auger electron spectroscopy (AES), cross-sectional transmission electron microscopy (X-TEM), scanning electron microscopy (SEM), and electrical resistivity (ER) measurements during temperature cycling have been used for a fine structural characterization. In this study, mainly naturally and thermally oxidized Si(100) substrates, TiN buffer layers with different thicknesses (i.e. the TiN topmost layer crystallographic orientation is thickness dependent) and MgO(100) single crystals were used as substrates. The chosen experimental procedure led to a controlled composition and preferential orientation of the films. The type of substrate plays an important role for the texture of the sputtered Ni-Ti films and according to the ER results, the distinct crystallographic orientations of the Ni-Ti films influence their phase transformation characteristics.

Consistent state software transactional memory

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática