Runtime Elision of Transactional Barriers for Captured Memory
Data(s) |
01/11/2013
01/11/2013
01/08/2013
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Resumo |
In this paper, we propose a new technique that can identify transaction-local memory (i.e. captured memory), in managed environments, while having a low runtime overhead. We implemented our proposal in a well known STM framework (Deuce) and we tested it in STMBench7 with two different STMs: TL2 and LSA. In both STMs the performance improved significantly (4 times and 2.6 times, respectively). Moreover, running the STAMP benchmarks with our approach shows improvements of 7 times in the best case for the Vacation application. |
Identificador |
CARVALHO, Fernando Miguel; CACHOPO, Joao - Runtime Elision of Transactional Barriers for Captured Memory. ACM Sigplan Notices. ISSN 0362-1340. Vol. 48, nr. 8 (2013), p. 303-304 0362-1340 10.1145/2517327.2442556 |
Idioma(s) |
eng |
Publicador |
Association Computing Machinery |
Direitos |
restrictedAccess |
Palavras-Chave | #Neutrino Physics #Discrete and Finite Symmetries Performance #Transactions #Software Transactional Memory #Runtime Optimizations |
Tipo |
article |