Armazenamento de sementes de cerejas-do-mato (Eugenia involucrata) DC. submetidas ao recobrimento com biofilmes e embalagem a vácuo

Fruteiras como Eugenia involucrata ainda continuam inexploradas, necessitando-se de informações técnicas que incentivem o agricultor a utilizá-las. O método de propagação por sementes é o normalmente adotado; porém, elas devem ser imediatamente semeadas, pois corre-se o risco de perda de sua viabilidade com o armazenamento. O objetivo deste trabalho foi avaliar o hidrocondicionamento e as técnicas de conservação (vácuo e biofilme), durante armazenamento, aos cinco e aos 30 dias, de sementes de cerejeira-do-mato. O trabalho foi realizado na Universidade Tecnológica Federal do Paraná - Câmpus Dois Vizinhos. O delineamento experimental foi em blocos ao acaso, em fatorial 2 × 4 × 2 (pré-hidrocondicionamento x técnica de armazenamento x tempo de armazenamento), com quatro repetições, de 50 sementes por unidade experimental. As sementes extraídas foram separadas em dois lotes, sendo um submetido ao pré-hidrocondicionamento, em água destilada, durante 24 horas, e, outro, não. Sementes hidrocondicionadas, ou não, foram submetidas a quatro técnicas de armazenamento, sendo, estas, a embalagem plástica a vácuo, o revestimento com biofilme de fécula de mandioca (3% m/v), a embalagem plástica a vácuo + biofilme de fécula de mandioca e sem tratamento (controle). Posteriormente, as sementes foram mantidas em câmara fria, em temperatura de 5 ºC e UR 85%, durante cinco e 30 dias. Aos 110 dias após a semeadura, avaliou-se a percentagem de germinação, o índice de velocidade de emergência e a massa da matéria seca total das plântulas. Para o armazenamento das sementes de cerejeira-do-mato, devem-se utilizar técnicas a vácuo, isoladamente, ou com revestimento de biofilme.

Limiting Internal Supply Voltage Spikes in DC-DC Converters

Implementing monolithic DC-DC converters for low power portable applications with a standard low voltage CMOS technology leads to lower production costs and higher reliability. Moreover, it allows miniaturization by the integration of two units in the same die: the power management unit that regulates the supply voltage for the second unit, a dedicated signal processor, that performs the functions required. This paper presents original techniques that limit spikes in the internal supply voltage on a monolithic DC-DC converter, extending the use of the same technology for both units. These spikes are mainly caused by fast current variations in the path connecting the external power supply to the internal pads of the converter power block. This path includes two parasitic inductances inbuilt in bond wires and in package pins. Although these parasitic inductances present relative low values when compared with the typical external inductances of DC-DC converters, their effects can not be neglected when switching high currents at high switching frequency. The associated overvoltage frequently causes destruction, reliability problems and/or control malfunction. Different spike reduction techniques are presented and compared. The proposed techniques were used in the design of the gate driver of a DC-DC converter included in a power management unit implemented in a standard 0.35 mu m CMOS technology.

Repetitive Solid State Pulse Modulator Based on a DC Voltage Multiplier

A newly developed solid-state repetitive high-voltage (HV) pulse modulator topology created from the mature concept of the d.c. voltage multiplier (VM) is described. The proposed circuit is based in a voltage multiplier type circuit, where a number of d.c. capacitors share a common connection with different voltage rating in each one. Hence, besides the standard VM rectifier and coupling diodes, two solid-state on/off switches are used, in each stage, to switch from the typical charging VM mode to a pulse mode with the d.c. capacitors connected in series with the load. Due to the on/off semiconductor configuration, in half-bridge structures, the maximum voltage blocked by each one is the d.c. capacitor voltage in each stage. A 2 kV prototype is described and the results are compared with PSPICE simulations.

Grid Integration of Offshore Wind Farms Using Modular Marx Multilevel Converters

This paper proposes the use of a Modular Marx Multilevel Converter, as a solution for energy integration between an offshore Wind Farm and the power grid network. The Marx modular multilevel converter is based on the Marx generator, and solves two typical problems in this type of multilevel topologies: modularity and dc capacitor voltage balancing. This paper details the strategy for dc capacitor voltage equalization. The dynamic models of the converter and power grid are presented in order to design the converter ac output voltages and the dc capacitor voltage controller. The average current control is presented and used for power flow control, harmonics and reactive power compensation. Simulation results are presented in order to show the effectiveness of the proposed (MC)-C-3 topology.

A DC-DC Step-Up mu-Power Converter for Energy Harvesting Applications, Using Maximum Power PointTracking, Based on Fractional Open Circuit Voltage

A DC-DC step-up micro power converter for solar energy harvesting applications is presented. The circuit is based on a switched-capacitorvoltage tripler architecture with MOSFET capacitors, which results in an, area approximately eight times smaller than using MiM capacitors for the 0.131mu m CMOS technology. In order to compensate for the loss of efficiency, due to the larger parasitic capacitances, a charge reutilization scheme is employed. The circuit is self-clocked, using a phase controller designed specifically to work with an amorphous silicon solar cell, in order to obtain themaximum available power from the cell. This will be done by tracking its maximum power point (MPPT) using the fractional open circuit voltage method. Electrical simulations of the circuit, together with an equivalent electrical model of an amorphous silicon solar cell, show that the circuit can deliver apower of 1132 mu W to the load, corresponding to a maximum efficiency of 66.81%.

Fast optimum-predictive control and capacitor voltage balancing strategy for bipolar back-to-back NPC converters in high-voltage direct current transmission systems

Multilevel power converters have been introduced as the solution for high-power high-voltage switching applications where they have well-known advantages. Recently, full back-to-back connected multilevel neutral point diode clamped converters (NPC converter) have been used inhigh-voltage direct current (HVDC) transmission systems. Bipolar-connected back-to-back NPC converters have advantages in long-distance HVDCtransmission systems over the full back-to-back connection, but greater difficulty to balance the dc capacitor voltage divider on both sending and receiving end NPC converters. This study shows that power flow control and dc capacitor voltage balancing are feasible using fast optimum-predictive-based controllers in HVDC systems using bipolar back-to-back-connected five-level NPC multilevel converters. For both converter sides, the control strategytakes in account active and reactive power, which establishes ac grid currents in both ends, and guarantees the balancing of dc bus capacitor voltages inboth NPC converters. Additionally, the semiconductor switching frequency is minimised to reduce switching losses. The performance and robustness of the new fast predictive control strategy, and its capability to solve the DC capacitor voltage balancing problem of bipolar-connected back-to-back NPCconverters are evaluated.

HVDC transmission systems: Bipolar back-to-back diode clamped multilevel converter with fastoptimum-predictive control and capacitor balancing strategy

Voltage source multilevel power converter structures are being considered for high power high voltage applications where they have well known advantages. Recently, full back-to-back connected multilevel neutral diode clamped converters (NPC) have been used in high voltage direct current (HVDC) transmission systems. Bipolar back-to-back connection of NPCs have advantages in long distance HVDC transmission systems, but highly increased difficulties to balance the dc capacitor voltage dividers on both sending and receiving end NPCs. This paper proposes a fast optimum-predictive controller to balance the dc capacitor voltages and to control the power flow in a long distance HVDCsystem using bipolar back-to-back connected NPCs. For both converter sides, the control strategy considers active and reactive power to establish ac grid currents on sending and receiving ends, while guaranteeing the balancing of both NPC dc bus capacitor voltages. Furthermore, the fast predictivecontroller minimizes the semiconductor switching frequency to reduce global switching losses. The performance and robustness of the new fast predictive control strategy and the associated dc capacitors voltage balancing are evaluated. (C) 2011 Elsevier B.V. All rights reserved.

Matrix Converter-Based Unified Power-Flow Controllers: Advanced Direct Power Control Method

This paper presents a direct power control (DPC) for three-phase matrix converters operating as unified power flow controllers (UPFCs). Matrix converters (MCs) allow the direct ac/ac power conversion without dc energy storage links; therefore, the MC-based UPFC (MC-UPFC) has reduced volume and cost, reduced capacitor power losses, together with higher reliability. Theoretical principles of direct power control (DPC) based on sliding mode control techniques are established for an MC-UPFC dynamic model including the input filter. As a result, line active and reactive power, together with ac supply reactive power, can be directly controlled by selecting an appropriate matrix converter switching state guaranteeing good steady-state and dynamic responses. Experimental results of DPC controllers for MC-UPFC show decoupled active and reactive power control, zero steady-state tracking error, and fast response times. Compared to an MC-UPFC using active and reactive power linear controllers based on a modified Venturini high-frequency PWM modulator, the experimental results of the advanced DPC-MC guarantee faster responses without overshoot and no steady-state error, presenting no cross-coupling in dynamic and steady-state responses.

Transformador para fonte de alta-tensão contínua

Dissertação para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Study of vanadium doped ZnO films prepared by dc reactive magnetron sputtering at different substrate temperatures

ZnO films doped with vanadium (ZnO:V) have been prepared by dc reactive magnetron sputtering technique at different substrate temperatures (RT–500 C). The effects of the substrate temperature on ZnO:V films properties have been studied. XRD measurements show that only ZnO polycrystalline structure has been obtained, no V2O5 or VO2 crystal phase can be observed. It has been found that the film prepared at low substrate temperature has a preferred orientation along the (002) direction. As the substrate temperature is increased, the (002) peak intensity decreases. When the substrate temperature reaches the 500 C, the film shows a random orientation. SEM measurements show a clear formation of the nano-grains in the sample surface when the substrate temperature is higher than 400 C. The optical properties of the films have been studied by measuring the specular transmittance. The refractive index has been calculated by fitting the transmittance spectra using OJL model combined with harmonic oscillator.

Effects of sulphurization time on Cu2ZnSnS4 absorbers and thin films solar cells obtained from metallic precursors

We report the results of a study of the sulphurization time effects on Cu2ZnSnS4 absorbers and thin film solar cells prepared from dc-sputtered tackedmetallic precursors. Three different time intervals, 10 min, 30min and 60 min, at maximum sulphurization temperature were considered. The effects of this parameter' change were studied both on the absorber layer properties and on the final solar cell performance. The composition, structure, morphology and thicknesses of the CZTS layers were analyzed. The electrical characterization of the absorber layer was carried out by measuring the transversal electrical resistance of the samples as a function of temperature. This study shows an increase of the conductivity activation energy from 10 meV to 54meV for increasing sulphurization time from 10min to 60min. The solar cells were built with the following structure: SLG/Mo/CZTS/CdS/i-ZnO/ZnO:Al/Ni:Al grid. Several ac response equivalent circuit models were tested to fit impedance measurements. The best results were used to extract the device series and shunt resistances and capacitances. Absorber layer's electronic properties were also determined using the Mott–Schottky method. The results show a decrease of the average acceptor doping density and built-in voltage, from 2.0 1017 cm−3 to 6.5 1015 cm−3 and from 0.71 V to 0.51 V, respectively, with increasing sulphurization time. These results also show an increase of the depletion region width from approximately 90 nm–250 nm.

CuxSnSx+1 (x = 2, 3) thin films grown by sulfurization of metallic precursors deposited by dc magnetron sputtering

We report the results of the growth of Cu-Sn-S ternary chalcogenide compounds by sulfurization of dc magnetron sputtered metallic precursors. Tetragonal Cu2SnS3 forms for a maximum sulfurization temperature of 350 ºC. Cubic Cu2SnS3 is obtained at sulfurization temperatures above 400 ºC. These results are supported by XRD analysis and Raman spectroscopy measurements. The latter analysis shows peaks at 336 cm-1, 351 cm-1 for tetragonal Cu2SnS3, and 303 cm-1, 355 cm-1 for cubic Cu2SnS3. Optical analysis shows that this phase change lowers the band gap from 1.35 eV to 0.98 eV. At higher sulfurization temperatures increased loss of Sn is expected in the sulphide form. As a consequence, higher Cu content ternary compounds like Cu3SnS4 grow. In these conditions, XRD and Raman analysis only detected orthorhombic (Pmn21) phase (petrukite). This compound has Raman peaks at 318 cm-1, 348 cm-1 and 295 cm-1. For a sulfurization temperature of 450 ºC the samples present a multi-phase structure mainly composed by cubic Cu2SnS3 and orthorhombic (Pmn21) Cu3SnS4. For higher temperatures, the samples are single phase and constituted by orthorhombic (Pmn21) Cu3SnS4. Transmittance and reflectance measurements were used to estimate a band gap of 1.60 eV. For comparison we also include the results for Cu2ZnSnS4 obtained using similar growth conditions.

Cu2ZnSnS4 solar cells prepared with sulphurized dc-sputtered stacked metallic precursors

In the present work we report the details of the preparation and characterization results of Cu2ZnSnS4 (CZTS) based solar cells. The CZTS absorber was obtained by sulphurization of dc magnetron sputtered Zn/Sn/Cu precursor layers. The morphology, composition and structure of the absorber layer were studied by scanning electron microscopy, energy dispersive spectroscopy, X-ray diffraction and Raman scattering. The majority carrier type was identified via a hot point probe analysis. The hole density, space charge region width and band gap energy were estimated from the external quantum efficiency measurements. A MoS2 layer that formed during the sulphurization process was also identified and analyzed in this work. The solar cells had the following structure: soda lime glass/Mo/CZTS/CdS/i-ZnO/ZnO:Al/Al grid. The best solar cell showed an opencircuit voltage of 345 mV, a short-circuit current density of 4.42 mA/cm2, a fill factor of 44.29% and an efficiency of 0.68% under illumination in simulated standard test conditions: AM 1.5 and 100 mW/cm2.

Inquerito por telefone: pesos de pos-estratificacao para corrigir vicios de baixa cobertura em Rio Branco, AC

OBJETIVO: Analisar efeitos do uso de pesos de pós-estratificação para corrigir vícios decorrentes da baixa cobertura de domicílios com telefone. MÉTODOS: Comparação dos resultados levantados pelo Inquérito Domiciliar com o Sistema de Vigilância de Fatores de Risco e Proteção para Doenças Crônicas por Inquérito Telefônico (Vigitel), em Rio Branco, AC, 2007, cuja cobertura era de 40% de telefonia fixa. O vício potencial do Vigitel foi expresso pela diferença entre as prevalências do Vigitel e do Inquérito Domiciliar, calculada a raiz quadrática do erro quadrático médio como medida de acurácia da estimativa. RESULTADOS: O procedimento de ponderação do Vigitel corrigiu o vício potencial nas prevalências de consumo de frutas, legumes e verduras, de carnes com gordura visível, o ser fumante, a autoavaliação do estado de saúde ruim e da morbidade referida de colesterol ou triglicéride. O procedimento adotado pelo Vigitel não reduziu o vício nas prevalências da prática de atividade física no tempo livre e de morbidade referida de asma, bronquite asmática, bronquite crônica ou enfisema. CONCLUSÕES: É necessário o uso de métodos alternativos de ponderação e a estratégia de seleção de variáveis externas para construção de pesos de pós-estratificação que minimizem o vício potencial das estimativas das variáveis decorrentes da baixa cobertura de domicílios com telefone fixo.

A CMOS micro power switched-capacitor DC-DC step-up converter for indoor light energy harvesting applications

This paper presents a micro power light energy harvesting system for indoor environments. Light energy is collected by amorphous silicon photovoltaic (a-Si:H PV) cells, processed by a switched capacitor (SC) voltage doubler circuit with maximum power point tracking (MPPT), and finally stored in a large capacitor. The MPPT fractional open circuit voltage (V-OC) technique is implemented by an asynchronous state machine (ASM) that creates and dynamically adjusts the clock frequency of the step-up SC circuit, matching the input impedance of the SC circuit to the maximum power point condition of the PV cells. The ASM has a separate local power supply to make it robust against load variations. In order to reduce the area occupied by the SC circuit, while maintaining an acceptable efficiency value, the SC circuit uses MOSFET capacitors with a charge sharing scheme for the bottom plate parasitic capacitors. The circuit occupies an area of 0.31 mm(2) in a 130 nm CMOS technology. The system was designed in order to work under realistic indoor light intensities. Experimental results show that the proposed system, using PV cells with an area of 14 cm(2), is capable of starting-up from a 0 V condition, with an irradiance of only 0.32 W/m(2). After starting-up, the system requires an irradiance of only 0.18 W/m(2) (18 mu W/cm(2)) to remain operating. The ASM circuit can operate correctly using a local power supply voltage of 453 mV, dissipating only 0.085 mu W. These values are, to the best of the authors' knowledge, the lowest reported in the literature. The maximum efficiency of the SC converter is 70.3 % for an input power of 48 mu W, which is comparable with reported values from circuits operating at similar power levels.