988 resultados para Client-side architecture


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A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

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Emergent architectures and paradigms targeting reconfigurable manufacturing systems increasingly rely on intelligent modules to maximize the robustness and responsiveness of modern installations. Although intelligent behaviour significantly minimizes the occurrence of faults and breakdowns it does not exclude them nor can prevent equipment’s normal wear. Adequate maintenance is fundamental to extend equipments’ life cycle. It is of major importance the ability of each intelligent device to take an active role in maintenance support. Further this paradigm shift towards “embedded intelligence”, supported by cross platform technologies, induces relevant organizational and functional changes on local maintenance teams. On the one hand, the possibility of outsourcing maintenance activities, with the warranty of a timely response, through the use of pervasive networking technologies and, on the other hand, the optimization of local maintenance staff are some examples of how IT is changing the scenario in maintenance. The concept of e-maintenance is, in this context, emerging as a new discipline with defined socio-economic challenges. This paper proposes a high level maintenance architecture supporting maintenance teams’ management and offering contextualized operational support. All the functionalities hosted by the architecture are offered to the remaining system as network services. Any intelligent module, implementing the services’ interface, can report diagnostic, prognostic and maintenance recommendations that enable the core of the platform to decide on the best course of action.

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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica

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This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.

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A non-coherent vector delay/frequency-locked loop architecture for GNSS receivers is proposed. Two dynamics models are considered: PV (position and velocity) and PVA (position, velocity, and acceleration). In contrast with other vector architectures, the proposed approach does not require the estimation of signals amplitudes. Only coarse estimates of the carrier-to-noise ratios are necessary.

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Prototype validation is a major concern in modern electronic product design and development. Simulation, structural test, functional and timing debug are all forming parts of the validation process, although very often addressed as dissociated tasks. In this paper we describe an integrated approach to board-level prototype validation, based on a set of mandatory/optional BST instructions and a built-in controller for debug and test, that addresses the late mentioned tasks as inherent parts of a whole process

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In this article, physical layer awareness in access, core, and metro networks is addressed, and a Physical Layer Aware Network Architecture Framework for the Future Internet is presented and discussed, as proposed within the framework of the European ICT Project 4WARD. Current limitations and shortcomings of the Internet architecture are driving research trends at a global scale toward a novel, secure, and flexible architecture. This Future Internet architecture must allow for the co-existence and cooperation of multiple networks on common platforms, through the virtualization of network resources. Possible solutions embrace a full range of technologies, from fiber backbones to wireless access networks. The virtualization of physical networking resources will enhance the possibility of handling different profiles, while providing the impression of mutual isolation. This abstraction strategy implies the use of well elaborated mechanisms in order to deal with channel impairments and requirements, in both wireless (access) and optical (core) environments.

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Institutions have been creating their own specific weblab infrastructures. Usually, they use distinct software and hardware architectures comprehending instruments and modules (I&M) able to be parameterized but difficult to be shared. These aspects are impairing their widespread in education, since collaboration between institutions, in developing and sharing resources, is still low. To handle both aspects, this paper proposes the adoption of the IEEE1451.0 Std. with FPGA technology for creating reconfigurable weblab infrastructures. It is suggested the adoption of an IEEE1451.0 infrastructure with compatible instruments, described in Hardware Description Languages (HDL), to be reconfigured in FPGA-based boards. Besides an overview of the IEEE1451.0 Std., this paper presents a solution currently under development which seeks to enable the reconfiguration and the remote control of weblab infrastructures using a set of IEEE1451.0 HTTP commands.

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Concepts like E-learning and M-learning are changing the traditional learning place. No longer restricted to well-defined physical places, education on Automation and other Engineering areas is entering the so-called ubiquitous learning place, where even the more practical knowledge (acquired at lab classes) is now moving into, due to emergent concepts such as Remote Experimentation or Mobile Experimentation. While Remote Experimentation is traditionally regarded as the remote access to real-world experiments through a simple web browser running on a PC connected to the Internet, Mobile Experimentation may be seen as the access to those same (or others) experiments, through mobile devices, used in M-learning contexts. These two distinct client types (PCs versus mobile devices) pose specific requirements for the remote lab infrastructure, namely the ability to tune the experiment interface according to the characteristics (e.g. display size) of the accessing device. This paper addresses those requirements, namely by proposing a new architecture for the remote lab infrastructure able to accommodate both Remote and Mobile Experimentation scenarios.

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As the variety of mobile devices connected to the Internet growts there is a correponding increase in the need to deliver content tailored to their heterogeneous characteristics. At the same time, we watch to the increase of e-learning in universities through the adoption of electronic platforms and standards. Not surprisingly, the concept of mLearning (Mobile Learning) appeared in recent years decreasing the limitation of learning location with the mobility of general portable devices. However, this large number and variety of Web-enabled devices poses several challenges for Web content creators who want to automatic get the delivery context and adapt the content to the client mobile devices. In this paper we analyze several approaches to defining delivery context and present an architecture for deliver uniform mLearning content to mobile devices denominated eduMCA - Educational Mobile Content Adaptation. With the eduMCA system the Web authors will not need to create specialized pages for each kind of device, since the content is automatically transformed to adapt to any mobile device capabilities from WAP to XHTML MP-compliant devices.

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Thesis to obtain the Master of Science Degree in Computer Science and Engineering

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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática

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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Química e Bioquímica

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Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.

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Beam-like structures are the most common components in real engineering, while single side damage is often encountered. In this study, a numerical analysis of single side damage in a free-free beam is analysed with three different finite element models; namely solid, shell and beam models for demonstrating their performance in simulating real structures. Similar to experiment, damage is introduced into one side of the beam, and natural frequencies are extracted from the simulations and compared with experimental and analytical results. Mode shapes are also analysed with modal assurance criterion. The results from simulations reveal a good performance of the three models in extracting natural frequencies, and solid model performs better than shell while shell model performs better than beam model under intact state. For damaged states, the natural frequencies captured from solid model show more sensitivity to damage severity than shell model and shell model performs similar to the beam model in distinguishing damage. The main contribution of this paper is to perform a comparison between three finite element models and experimental data as well as analytical solutions. The finite element results show a relatively well performance.