“Post silicon debug of SOC designs”

Continuous advances in VLSI technology have made implementation of very complicated systems possible. Modern System-on -Chips (SoCs) have many processors, IP cores and other functional units. As a result, complete verification of whole systems before implementation is becoming infeasible; hence it is likely that these systems may have some errors after manufacturing. This increases the need to find design errors in chips after fabrication. The main challenge for post-silicon debug is the observability of the internal signals. Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall verification effort on large designs, and the problem is growing worse.Traditional post-silicon debug methods concentrate on functional parts of systems and provide mechanisms to increase the observability of internal state of systems. Those methods may not be sufficient as modern SoCs have lots of blocks (processors, IP cores, etc.) which are communicating with one another and communication is another source of design errors. This tutorial will be provide an insight into various observability enhancement techniques, on chip instrumentation techniques and use of high level models to support the debug process targeting both inside blocks and communication among them. It will also cover the use of formal methods to help debug process.

Electron paramagnetic resonance study of porous silicon

Electron paramagnetic resonance studies under ambient conditions of boron‐doped porous silicon show anisotropic Zeeman (g) and hyperfine (A) tensors, signaling localization of the charge carriers due to quantum confinement.

Bypass operation in bridge convertors for high-voltage d.c. transmission

Bypass operation with the aid of a special bypass valve is an important part of present-day schemes of protection for h.v. d.c. transmission systems. In this paper, the possibility of using two valves connected to any phase in the bridge convertor for the purpose of bypass operation is studied. The scheme is based on the use of logic circuits in conjunction with modified methods of fault detection. Analysis of the faults in a d.c. transmission system is carried out with the object of determining the requirements of such a logic-circuit control system. An outline of the scheme for the logic-circuit control of the bypass operation for both rectifier and invertor bridges is then given. Finally, conclusions are drawn regarding the advantages of such a system, which include reduction in the number of valves, prevention of severe faults and fast clearance of faults, in addition to the immediate location of the fault and its nature.

Growth of silicon nanowires by electron beam evaporation using indium catalyst

For the first time silicon nanowires have been grown on indium (In) coated Si (100) substrates using e-beam evaporation at a low substrate temperature of 300 degrees C. Standard spectroscopic and microscopic techniques have been employed for the structural, morphological and compositional properties of as grown Si nanowires. The as grown Si nanowires have randomly oriented with an average length of 600 nm for a deposition time of 15 min. As grown Si nanowires have shown indium nanoparticle (capped) on top of it confirming the Vapor Liquid Solid (VLS) growth mechanism. Transmission Electron Microscope (TEM) measurements have revealed pure and single crystalline nature of Si nanowires. The obtained results have indicated good progress towards finding alternative catalyst to gold for the synthesis of Si nanowires. (C) 2011 Elsevier B.V. All rights reserved.

Amorphous Hydrogenated Silicon: A Perspective on Circuit Synthesis

Abstract | Non-crystalline or glassy semiconductors are of great research interest for the fabrication of large area electronic systems such as displays and image sensors. Good uniformity over large areas, low temperature fabrication and the promise of low cost electronics on large area mechanically flexible and rigid substrates are some attractive features of these technologies. The article focusses on amorphous hydrogenated silicon thin film transistors, and reviews the problems, solutions and applications of these devices.

A Five-Level Inverter Topology with Single-DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

Physics-Based Band Gap Model for Relaxed and Strained 100] Silicon Nanowires

In this paper, we propose a physics-based simplified analytical model of the energy band gap and electron effective mass in a relaxed and strained rectangular 100] silicon nanowires (SiNWs). Our proposed formulation is based on the effective mass approximation for the nondegenerate two-band model and 4 x 4 Luttinger Hamiltonian for energy dispersion relation of conduction band electrons and the valence band heavy and light holes, respectively. Using this, we demonstrate the effect of the uniaxial strain applied along 100]-direction and a biaxial strain, which is assumed to be decomposed from a hydrostatic deformation along 001] followed by a uniaxial one along the 100]-direction, respectively, on both the band gap and the transport and subband electron effective masses in SiNW. Our analytical model is in good agreement with the extracted data using the extended-Huckel-method-based numerical simulations over a wide range of device dimensions and applied strain.

Evaluation of damage in reinforced concrete bridge beams using acoustic emission technique

Acoustic emission (AE) testing is a well-known method for damage identification of various concrete structures including bridges. This article presents a method to assess damage in reinforced concrete (RC) bridge beams subjected to incremental cyclic loading. The specifications in the standard NDIS-2421 were used to classify the damage in RC bridge beams. Earlier researchers classified the damage occurring in bridge beams by using crack mouth opening displacement (CMOD) and AE released and proposed a standard (NDIS-2421: the Japanese Society for NonDestructive Inspection). In general, multiple cracks take place in RC beams under bending; therefore, utilisation of CMOD for crack detection may not be appropriate. In the present study, the damage in RC beams is classified by using the AE released, deflection, strains in steel and concrete, because the measurement of the strains in steel and concrete is easy and the codes of practice are specified for different limit states (IS-456:2000). The observations made in the present experimental study have some important practical applications in assessing the state of damage of concrete structural members.

Signal-Powered Low-Drop-Diode Equivalent Circuit for Full-Wave Bridge Rectifier

Piezoelectric-device-based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The proposed circuit is a low-drop-diode equivalent, which mimics a diode using linear region-operated MOSFET. The proposed diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a bare minimum to have an overall output power improvement. Diode equivalent was used to replace the four diodes in a full-wave bridge rectifier, which is the basic full- wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers. Simulation in 130-nm technology and experiment with discrete components show that a bridge rectifier with the proposed diode provides a 30-169% increase in output power extracted from piezoelectric device, as compared to a bridge rectifier with diode-connected MOSFETs. The bridge rectifier with the proposed diode can extract 90% of the maximum available power from an ideal piezoelectric device-bridge rectifier circuit. Setting aside the constraint of power loss, simulations indicate that diode drop as low as 10 mV at 38 mu A can be achieved.

Efficient generation and guiding of megaampere relativistic electron current by silicon nanowires

We demonstrate 30 times enhanced flux of relativistic electrons by a silicon nanowire coated target excited by 30 fs, 800 nm laser pulses at an intensity of 3 x 10(18) W cm(-2). A measurement of the megaampere electron current via induced megagauss magnetic field supports the enhancement feature observed in the electron energy spectrum. The relativistic electrons generated at the front of nanowire coated surface are shown to travel efficiently over 500 mu m in the insulating substrate. The enhanced hot electron temperature is explained using a simple model and is supported by recent simulations. (C) 2012 American Institute of Physics. http://dx.doi.org/10.1063/1.4729010]

Synthesis and characterization of nano silicon and titanium nitride powders using atmospheric microwave plasma technique

We have demonstrated a simple, scalable and inexpensive method based on microwave plasma for synthesizing 5 to 10 g/h of nanomaterials. Luminescent nano silicon particles were synthesized by homogenous nucleation of silicon vapour produced by the radial injection of silicon tetrachloride vapour and nano titanium nitride was synthesized by using liquid titanium tetrachloride as the precursor. The synthesized nano silicon and titanium nitride powders were characterized by XRD, XPS, TEM, SEM and BET. The characterization techniques indicated that the synthesized powders were indeed crystalline nanomaterials.

Threshold voltage modeling under size quantization for ultra-thin silicon double-gate metal-oxide-semiconductor field-effect transistor

We report on the threshold voltage modeling of ultra-thin (1 nm-5 nm) silicon body double-gate (DG) MOSFETs using self-consistent Poisson-Schrodinger solver (SCHRED). We define the threshold voltage (V th) of symmetric DG MOSFETs as the gate voltage at which the center potential (Φ c) saturates to Φ c (s a t), and analyze the effects of oxide thickness (t ox) and substrate doping (N A) variations on V th. The validity of this definition is demonstrated by comparing the results with the charge transition (from weak to strong inversion) based model using SCHRED simulations. In addition, it is also shown that the proposed V t h definition, electrically corresponds to a condition where the inversion layer capacitance (C i n v) is equal to the oxide capacitance (C o x) across a wide-range of substrate doping densities. A capacitance based analytical model based on the criteria C i n v C o x is proposed to compute Φ c (s a t), while accounting for band-gap widening. This is validated through comparisons with the Poisson-Schrodinger solution. Further, we show that at the threshold voltage condition, the electron distribution (n(x)) along the depth (x) of the silicon film makes a transition from a strong single peak at the center of the silicon film to the onset of a symmetric double-peak away from the center of the silicon film. © 2012 American Institute of Physics.

Bismuth catalyzed growth of silicon nanowires by electron beam evaporation

Silicon nanowires (NWs) have been grown in the vapor phase for the first time with bismuth (Bi) as a catalyst using the electron beam evaporation method at a low substrate temperature of 280 degrees C. The grown Si nanowires were randomly oriented on the substrate with an average length of 900 nm for a deposition time of 15 min. Bi faceted nanoparticles (crowned) at the end of the grown Si nanowires have been observed and attributed to the Vapor-Liquid-Solid (VLS) growth mechanism. Transmission Electron Microscopy analysis on the nanowires revealed their single crystalline nature and interestingly bismuth particles were observed in Si nanowires. The obtained results have shown a new window for Si nanowires growth with bismuth as a catalyst. (C) 2012 Elsevier B.V. All rights reserved.

Substrate temperature influenced physical properties of silicon MOS devices with TiO2 gate dielectric

DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.