839 resultados para coincident timing task


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In this paper, the approach for assigning cooperative communication of Uninhabited Aerial Vehicles (UAV) to perform multiple tasks on multiple targets is posed as a combinatorial optimization problem. The multiple task such as classification, attack and verification of target using UAV is employed using nature inspired techniques such as Artificial Immune System (AIS), Particle Swarm Optimization (PSO) and Virtual Bee Algorithm (VBA). The nature inspired techniques have an advantage over classical combinatorial optimization methods like prohibitive computational complexity to solve this NP-hard problem. Using the algorithms we find the best sequence in which to attack and destroy the targets while minimizing the total distance traveled or the maximum distance traveled by an UAV. The performance analysis of the UAV to classify, attack and verify the target is evaluated using AIS, PSO and VBA.

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The subiculum is a structure that forms a bridge between the hippocampus and the entorhinal cortex (EC), and plays a major role in the memory consolidation process. Here, we demonstrate spike-timing-dependent plasticity (STDP) at the proximal excitatory inputs on the subicular pyramidal neurons of juvenile rat. Causal (positive) pairing of a single EPSP with a single back-propagating action potential (bAP) after a time interval of 10 ms (+10 ms) failed to induce plasticity. However, increasing the number of bAPs in a burst to three, at two different frequencies of 50 Hz (bAP burst) and 150 Hz, induced long-term depression (LTD) after a time interval of +10 ms in both the regular-firing (RF), and the weak burst firing (WBF) neurons. The LTD amplitude decreased with increasing time interval between the EPSP and the bAP burst. Reversing the order of the pairing of the EPSP and the bAP burst induced LTP at a time interval of -10 ms. This finding is in contrast with reports at other synapses, wherein prebefore postsynaptic (causal) pairing induced LTP and vice versa. Our results reaffirm the earlier observations that the relative timing of the pre- and postsynaptic activities can lead to multiple types of plasticity profiles. The induction of timing-dependent LTD (t-LTD) was dependent on postsynaptic calcium change via NMDA receptors in the WBF neurons, while it was independent of postsynaptic calcium change, but required active L-type calcium channels in the RF neurons. Thus the mechanism of synaptic plasticity may vary within a hippocampal subfield depending on the postsynaptic neuron involved. This study also reports a novel mechanism of LTD induction, where L-type calcium channels are involved in a presynaptically induced synaptic plasticity. The findings may have strong implications in the memory consolidation process owing to the central role of the subiculum and LTD in this process.

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We investigate the problem of timing recovery for 2-D magnetic recording (TDMR) channels. We develop a timing error model for TDMR channel considering the phase and frequency offsets with noise. We propose a 2-D data-aided phase-locked loop (PLL) architecture for tracking variations in the position and movement of the read head in the down-track and cross-track directions and analyze the convergence of the algorithm under non-separable timing errors. We further develop a 2-D interpolation-based timing recovery scheme that works in conjunction with the 2-D PLL. We quantify the efficiency of our proposed algorithms by simulations over a 2-D magnetic recording channel with timing errors.

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Many studies of reaching and pointing have shown significant spatial and temporal correlations between eye and hand movements. Nevertheless, it remains unclear whether these correlations are incidental, arising from common inputs (independent model); whether these correlations represent an interaction between otherwise independent eye and hand systems (interactive model); or whether these correlations arise from a single dedicated eye-hand system (common command model). Subjects were instructed to redirect gaze and pointing movements in a double-step task in an attempt to decouple eye-hand movements and causally distinguish between the three architectures. We used a drift-diffusion framework in the context of a race model, which has been previously used to explain redirect behavior for eye and hand movements separately, to predict the pattern of eye-hand decoupling. We found that the common command architecture could best explain the observed frequency of different eye and hand response patterns to the target step. A common stochastic accumulator for eye-hand coordination also predicts comparable variances, despite significant difference in the means of the eye and hand reaction time (RT) distributions, which we tested. Consistent with this prediction, we observed that the variances of the eye and hand RTs were similar, despite much larger hand RTs (similar to 90 ms). Moreover, changes in mean eye RTs, which also increased eye RT variance, produced a similar increase in mean and variance of the associated hand RT. Taken together, these data suggest that a dedicated circuit underlies coordinated eye-hand planning.

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Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector (SV) structures have advantages like extension of linear modulation range, elimination of fifth and seventh harmonics in phase voltages and currents for the full modulation range including extreme 12-step operation, reduced device voltage ratings, lesser dv/dt stresses on devices and motor phase windings resulting in lower EMI/EMC problems, and lower switching frequency-making it more suitable for high-power drive applications. This paper proposes a simple method to obtain pulsewidth modulation (PWM) timings for a dodecagonal voltage SV structure using only sampled reference voltages. In addition to this, a carrier-based method for obtaining the PWM timings for a general N-level dodecagonal structure is proposed in this paper for the first time. The algorithm outputs the triangle information and the PWM timing values which can be set as the compare values for any carrier-based hardware PWM module to obtain SV PWM like switching sequences. The proposed method eliminates the need for angle estimation, computation of modulation indices, and iterative search algorithms that are typical in multilevel dodecagonal SV systems. The proposed PWM scheme was implemented on a five-level dodecagonal SV structure. Exhaustive simulation and experimental results for steady-state and transient conditions are presented to validate the proposed method.

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Circadian oscillators provide rhythmic temporal cues for a range of biological processes in plants and animals, enabling anticipation of the day/night cycle and enhancing fitness-associated traits. We have used engineering models to understand the control principles of a plant's response to seasonal variation. We show that the seasonal changes in the timing of circadian outputs require light regulation via feed-forward loops, combining rapid light-signaling pathways with entrained circadian oscillators. Linear time-invariant models of circadian rhythms were computed for 3,503 circadian-regulated genes and for the concentration of cytosolic-free calcium to quantify the magnitude and timing of regulation by circadian oscillators and light-signaling pathways. Bioinformatic and experimental analysis show that rapid light-induced regulation of circadian outputs is associated with seasonal rephasing of the output rhythm. We identify that external coincidence is required for rephasing of multiple output rhythms, and is therefore important in general phase control in addition to specific photoperiod-dependent processes such as flowering and hypocotyl elongation. Our findings uncover a fundamental design principle of circadian regulation, and identify the importance of rapid light-signaling pathways in temporal control.

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A novel slope delay model for CMOS switch-level timing verification is presented. It differs from conventional methods in being semianalytic in character. The model assumes that all input waveforms are trapezoidal in overall shape, but that they vary in their slope. This simplification is quite reasonable and does not seriously affect precision, but it facilitates rapid solution. The model divides the stages in a switch-level circuit into two types. One corresponds to the logic gates, and the other corresponds to logic gates with pass transistors connected to their outputs. Semianalytic modeling for both cases is discussed.

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The paper describes a semianalytic slope delay model for CMOS switch-level timing verification. It is characterised by classification of the effects of the input slope, internal size and load capacitance of a logic gate on delay time, and then the use of a series of carefully chosen analytic functions to estimate delay times under different circumstances. In the field of VLSI analysis, this model achieves improvements in speed and accuracy compared with conventional approaches to transistor-level and switch-level simulation.

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This paper describes a novel hierarchical approach to timing verification. Four types of relationship existing among signal paths are distinguished, based on a classification of the degree of interdependency in the circuit. In this way, irrelevant path delays can be excluded through consideration of the interaction between critical paths and others. Furthermore, under suitable conditions, bounded delay values for large hierarchical systems can be deduced using bounded delays determined for their constituent cells. Finally, we discuss the impact on design strategy of the hierarchical delay model presented in this paper.

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