969 resultados para Sluice gate


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The semiconductor industry's urge towards faster, smaller and cheaper integrated circuits has lead the industry to smaller node devices. The integrated circuits that are now under volume production belong to 22 nm and 14 nm technology nodes. In 2007 the 45 nm technology came with the revolutionary high- /metal gate structure. 22 nm technology utilizes fully depleted tri-gate transistor structure. The 14 nm technology is a continuation of the 22 nm technology. Intel is using second generation tri-gate technology in 14 nm devices. After 14 nm, the semiconductor industry is expected to continue the scaling with 10 nm devices followed by 7 nm. Recently, IBM has announced successful production of 7 nm node test chips. This is the fashion how nanoelectronics industry is proceeding with its scaling trend. For the present node of technologies selective deposition and selective removal of the materials are required. Atomic layer deposition and the atomic layer etching are the respective techniques used for selective deposition and selective removal. Atomic layer deposition still remains as a futuristic manufacturing approach that deposits materials and lms in exact places. In addition to the nano/microelectronics industry, ALD is also widening its application areas and acceptance. The usage of ALD equipments in industry exhibits a diversi cation trend. With this trend, large area, batch processing, particle ALD and plasma enhanced like ALD equipments are becoming prominent in industrial applications. In this work, the development of an atomic layer deposition tool with microwave plasma capability is described, which is a ordable even for lightly funded research labs.

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"The following is my understanding of scripture teaching in harmony with shaker principles and practice. A.G. Hollister."--Pref.

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This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

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Successful implementation of fault-tolerant quantum computation on a system of qubits places severe demands on the hardware used to control the many-qubit state. It is known that an accuracy threshold Pa exists for any quantum gate that is to be used for such a computation to be able to continue for an unlimited number of steps. Specifically, the error probability Pe for such a gate must fall below the accuracy threshold: Pe < Pa. Estimates of Pa vary widely, though Pa ∼ 10−4 has emerged as a challenging target for hardware designers. I present a theoretical framework based on neighboring optimal control that takes as input a good quantum gate and returns a new gate with better performance. I illustrate this approach by applying it to a universal set of quantum gates produced using non-adiabatic rapid passage. Performance improvements are substantial comparing to the original (unimproved) gates, both for ideal and non-ideal controls. Under suitable conditions detailed below, all gate error probabilities fall by 1 to 4 orders of magnitude below the target threshold of 10−4. After applying the neighboring optimal control theory to improve the performance of quantum gates in a universal set, I further apply the general control theory in a two-step procedure for fault-tolerant logical state preparation, and I illustrate this procedure by preparing a logical Bell state fault-tolerantly. The two-step preparation procedure is as follow: Step 1 provides a one-shot procedure using neighboring optimal control theory to prepare a physical qubit state which is a high-fidelity approximation to the Bell state |β01⟩ = 1/√2(|01⟩ + |10⟩). I show that for ideal (non-ideal) control, an approximate |β01⟩ state could be prepared with error probability ϵ ∼ 10−6 (10−5) with one-shot local operations. Step 2 then takes a block of p pairs of physical qubits, each prepared in |β01⟩ state using Step 1, and fault-tolerantly prepares the logical Bell state for the C4 quantum error detection code.

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The Toledo Gate of Ciudad Real, Spain, constructed between the late 13th and early 14th centuries, is the last remaining portion of a once complete medieval city wall. It represents the long history of the city and constitutes its main heritage symbol, dividing the historic city centre from the later 19th and 20th century expansions. In October 2012, the Town Hall and the Montemadrid Foundation started the conservation works to preserve this important monument. The preliminary phase of this project included an in-depth series of scientific studies which were carried out by a multidisciplinary team focusing on archival research, historic investigations, archaeological excavations as well as material composition analysis and main treatment application tests. As a result of these studies a series of virtual 3D models were created to inform, discuss and study the monument. A first digital model permitted visualization of the gate in the 19th century and how the main entrance to the city was integrated as a fundamental part of the city walls. This virtual reconstruction also became an important part of the campaign to raise awareness among the citizens towards a monument that had remained in the shadows for the last century, isolated in a roundabout after the systematic demolition of the city walls in the late 19th century. Over the last three years and as a result of these archaeological and historic investigations and subsequent virtual models, surprisingly new and interesting data were brought to light thus permitting the establishment and corroboration of a new and updated hypothesis of the Toledo Gate that goes beyond the previous ideas. As a result of these studies a new architectural typology with construction techniques of has been suggested. This paper describes how the results of this continuous and interdisciplinary documentation process have benefitted from a computer graphic reconstruction of the gate. It highlights how virtual reconstruction can be a powerful tool for conservation decision making and awareness raising. Furthermore, the interesting results of the final reconstruction hypothesis convinced the technical team responsible for the conservation to alter some aspects of the final project physical interventions in order to focus on some of the features and conclusions discovered through the virtual model study.

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Radiation dosimetry is crucial in many fields, where the exposure of ionizing radiation must be precisely controlled to avoid health and environmental safety issues. Radiotherapy and radioprotection are two examples in which fast and reliable detectors are needed. Compact and large area wearable detectors are being developed to address real-life radiation dosimetry applications, their ideal properties include flexibility, lightness, and low-cost. This thesis contributed to the development of Radiation sensitive OXide Field Effect Transistors (ROXFETs), which are detectors able to provide fast and real-time radiation read out. ROXFETs are based on thin film transistors fabricated with high-mobility amorphous oxide semiconductor, making them compatible with large area, flexible, and low cost production over plastic substrates. The gate dielectric material has high dielectric constant and high atomic number, which results in high performances and high radiation sensitivity, respectively. The aim of this work was to establish a stable and reliable fabrication process for ROXFETs made with atomic layer deposited gate dielectric. A study on the effect of gate dielectric materials was performed, focusing the attention on the properties of the dielectric-semiconductor interface. Single and multi layer dielectric structures were compared during this work. Furthermore, the effect of annealing temperature was studied. The device performances were tested to understand the underlying physical processes. In this way, it was possible to determine a reliable fabrication procedure and an optimal structure for ROXFETs. An outstanding sensitivity of (65±3)V/Gy was measured in detectors with a bi-layer Ta₂O₅-Al₂O₃ gate dielectric with low temperature annealing performed at 180°C.

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This study presents the results of a cost-effectiveness analysis in a controlled clinical trial on the effectiveness of a modified glass ionomer resin sealant ( Vitremer, 3M ESPE) and the application of fluoride varnish (Duraphat, Colgate) on occlusal surfaces of first permanent molars in children 6-8 years of age (N = 268), according to caries risk (high versus low). Children were examined semiannually by the same calibrated dentist for 24 months after allocation in six groups: high and low risk controls (oral health education every three months); high and low risk with varnish (oral health education every three months + varnish biannually); and high and low risk with sealant (oral health education every three months + a single application of sealant). Economic analysis showed that sealing permanent first molars of high-risk schoolchildren showed a C/E ratio of US$ 119.80 per saved occlusal surface and an incremental C/E ratio of US$ 108.36 per additional saved occlusal surface. The study concluded that sealing permanent first molars of high-risk schoolchildren was the most cost-effective intervention.

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In the last 15 years, the use of doubly fed induction machines in modern variable-speed wind turbines has increased rapidly. This development has been driven by the cost reduction as well as the low-loss generation of Insulated Gate Bipolar Transistors (IGBT). According to new grid code requirements, wind turbines must remain connected to the grid during grid disturbances. Moreover, they must also contribute to voltage support during and after grid faults. The crowbar system is essential to avoid the disconnection of the doubly fed induction wind generators from the network during faults. The insertion of the crowbar in the rotor circuits for a short period of time enables a more efficient terminal voltage control. As a general rule, the activation and the deactivation of the crowbar system is based only on the DC-link voltage level of the back-to-back converters. In this context, the authors discuss the critical rotor speed to analyze the instability of doubly fed induction generators during grid faults.

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Fin field effect transistors (FinFETS) are silicon-on-insulator (SOI) transistors with three-dimensional structures. As a result of some fabrication-process limitations (as nonideal anisotropic overetch) some FinFETs have inclined surfaces, which results in trapezoidal cross sections instead of rectangular sections, as expected. This geometric alteration results in some device issues, like carrier profile, threshold voltage, and corner effects. This work analyzes these consequences based on three-dimensional numeric simulation of several dual-gate and triple-gate FinFETs. The simulation results show that the threshold voltage depends on the sidewall inclination angle and that this dependence varies according to the body doping level. The corner effects also depend on the inclination angle and doping level. (C) 2008 The Electrochemical Society.

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Background: High-throughput SNP genotyping has become an essential requirement for molecular breeding and population genomics studies in plant species. Large scale SNP developments have been reported for several mainstream crops. A growing interest now exists to expand the speed and resolution of genetic analysis to outbred species with highly heterozygous genomes. When nucleotide diversity is high, a refined diagnosis of the target SNP sequence context is needed to convert queried SNPs into high-quality genotypes using the Golden Gate Genotyping Technology (GGGT). This issue becomes exacerbated when attempting to transfer SNPs across species, a scarcely explored topic in plants, and likely to become significant for population genomics and inter specific breeding applications in less domesticated and less funded plant genera. Results: We have successfully developed the first set of 768 SNPs assayed by the GGGT for the highly heterozygous genome of Eucalyptus from a mixed Sanger/454 database with 1,164,695 ESTs and the preliminary 4.5X draft genome sequence for E. grandis. A systematic assessment of in silico SNP filtering requirements showed that stringent constraints on the SNP surrounding sequences have a significant impact on SNP genotyping performance and polymorphism. SNP assay success was high for the 288 SNPs selected with more rigorous in silico constraints; 93% of them provided high quality genotype calls and 71% of them were polymorphic in a diverse panel of 96 individuals of five different species. SNP reliability was high across nine Eucalyptus species belonging to three sections within subgenus Symphomyrtus and still satisfactory across species of two additional subgenera, although polymorphism declined as phylogenetic distance increased. Conclusions: This study indicates that the GGGT performs well both within and across species of Eucalyptus notwithstanding its nucleotide diversity >= 2%. The development of a much larger array of informative SNPs across multiple Eucalyptus species is feasible, although strongly dependent on having a representative and sufficiently deep collection of sequences from many individuals of each target species. A higher density SNP platform will be instrumental to undertake genome-wide phylogenetic and population genomics studies and to implement molecular breeding by Genomic Selection in Eucalyptus.

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We observe a large positive magnetoresistance in a bilayer electron system (double quantum well) as the latter is driven by the external gate from double to single layer configuration. Both classical and quantum contributions to magnetotransport are found to be important for explanation of this effect. We demonstrate that these contributions can be separated experimentally by studying the magnetic-field dependence of the resistance at different gate voltages. The experimental results are analyzed and described by using the theory of low-field magnetotransport in the systems with two occupied subbands.

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We experimentally study the Aharonov-Bohm-conductance oscillations under external gate voltage in a semiconductor quantum ring with a radius of 80 nm. We find that, in the linear regime, the resistance-oscillation plot in the voltage-magnetic-field plane corresponds to the quantum ring energy spectra. The chessboard pattern assembled by resistance diamonds, while loading the ring, is attributed to a short electron lifetime in the open configuration, which agrees with calculations within the single-particle model. Remarkably, the application of a small dc current allows observing strong deviations in the oscillation plot from this pattern accompanied by a magnetic-field symmetry break. We relate such behavior to the higher-order-conductance coefficients determined by electron-electron interactions in the nonlinear regime.

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We present the experimental and theoretical studies of the magnetoresistance oscillations induced by the resonance transitions of electrons between the tunnel-coupled states in double quantum wells. The suppression of these oscillations with increasing temperature is irrelevant to the thermal broadening of the Fermi distribution and reflects the temperature dependence of the quantum lifetime of electrons. The gate control of the period and amplitude of the oscillations is demonstrated.

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We have performed ab initio molecular dynamics simulations to generate an atomic structure model of amorphous hafnium oxide (a-HfO(2)) via a melt-and-quench scheme. This structure is analyzed via bond-angle and partial pair distribution functions. These results give a Hf-O average nearest-neighbor distance of 2.2 angstrom, which should be compared to the bulk value, which ranges from 1.96 to 2.54 angstrom. We have also investigated the neutral O vacancy and a substitutional Si impurity for various sites, as well as the amorphous phase of Hf(1-x)Si(x)O(2) for x=0.25, 0375, and 0.5.