CLADP - THE CAMBRIDGE LINEAR ANALYSIS AND DESIGN PROGRAMS USER REFERENCE MANUAL (4TH ISSUE: APRIL 1983).

CLADP is an engineering software program developed at Cambridge University for the interactive computer aided design of feedback control systems. CLADP contains a wide range of tools for the analysis of complex systems, and the assessment of their performance when feedback control is applied, thus enabling control systems to be designed to meet difficult performance objectives. The range of tools within CLADP include the latest techniques in the field whose central theme is the extension of classical frequency domain concepts (well known and well proven for single loop systems) to multivariable or multiloop systems, and by making extensive use of graphical presentation information is provided in a readily understood form.

CLADP: THE CAMBRIDGE LINEAR ANALYSIS AND DESIGN PROGRAMS.

An interactive software facility for designing multivariable control systems is described. The paper discusses the desirable characteristics of such a facility, the particular capabilities of CLADP and the numerical algorithms which lie behind them.

Some further considerations in the development of an experimental design for sensory evaluation of fish quality

An experimental procedure along with a method of analysis to judge the suitability of an individual to be included in a taste panel is described. The procedure is based on comparison of the organoleptic scores assigned by the individual to pairs of fish samples whose qualities are known and a set of physical measurements of the same samples. Fisher's Exact Probability Test provides a criterion for the judgement.

Biofluid behaviour in 3D microchannel systems: Numerical analysis and design development of 3D microchannel biochip separators

This paper describes the design and development cycle of a 3D biochip separator and the modelling analysis of flow behaviour in the biochip microchannel features. The focus is on identifying the difference between 2D and 3D implementations as well as developing basic forms of 3D microfluidic separators. Five variants, based around the device are proposed and analysed. These include three variations of the branch channels (circular, rectangular, disc) and two variations of the main channel (solid and concentric). Ignoring the initial transient behaviour and assuming steady state flow has been established, the efficiencies of the flow between the main and side channels for the different designs are analysed and compared with regard to relevant biomicrofluidic laws or effects (bifurcation law, Fahraeus effect, cell-free phenomenon, bending channel effect and laminar flow behaviour). The modelling results identify flow features in microchannels, a constriction and bifurcations and show detailed differences in flow fields between the various designs. The manufacturing process using injection moulding for the initial base case design is also presented and discussed. The work reported here is supported as part of the UK funded 3D-MINTEGRATION project. © 2010 IEEE.

Mode Analysis and Design of a Low-Loss Photonic Crystal 60 degrees Waveguide Bend

The guided modes of a two-dimensional photonic crystal straight waveguide and a waveguide bend are studied in order to find the high transmission mechanism for the waveguide bend. We find that high transmission occurs when the mode patterns and wave numbers match, while the single-mode condition in the waveguide bend is not necessarily required. According to the mechanism, a simply modified bend structure with broad high transmission band is proposed. The bandwidth is significantly increased from 19 to 116 nm with transmission above 90%, and covers the entire C band of optical communication.

On the performance analysis and design of a novel shared-layer integrated devices using RCE-p-i-n-PD/SHBT - art. no. 67820J

We have explored the shared-layer integration fabrication of an resonant-cavity-enhanced p-i-n photodector (RCE- p-i-n-PD) and a single heterojunction bipolar transistor (SHBT) with the same epitaxy grown layer structure. MOCVD growth of the different layer structure for the GaAs based RCE- p-i-n-PD/SHBT require compromises to obtain the best performance of the integrated devices. The SHBT is proposed with super-lattice in the collector, and the structure of the base and the collector of the SHBT is used for the RCE. Up to now, the DC characteristics of the integrated device have been obtained.

Design and Evaluation of the Hamal Parallel Computer

Parallel shared-memory machines with hundreds or thousands of processor-memory nodes have been built; in the future we will see machines with millions or even billions of nodes. Associated with such large systems is a new set of design challenges. Many problems must be addressed by an architecture in order for it to be successful; of these, we focus on three in particular. First, a scalable memory system is required. Second, the network messaging protocol must be fault-tolerant. Third, the overheads of thread creation, thread management and synchronization must be extremely low. This thesis presents the complete system design for Hamal, a shared-memory architecture which addresses these concerns and is directly scalable to one million nodes. Virtual memory and distributed objects are implemented in a manner that requires neither inter-node synchronization nor the storage of globally coherent translations at each node. We develop a lightweight fault-tolerant messaging protocol that guarantees message delivery and idempotence across a discarding network. A number of hardware mechanisms provide efficient support for massive multithreading and fine-grained synchronization. Experiments are conducted in simulation, using a trace-driven network simulator to investigate the messaging protocol and a cycle-accurate simulator to evaluate the Hamal architecture. We determine implementation parameters for the messaging protocol which optimize performance. A discarding network is easier to design and can be clocked at a higher rate, and we find that with this protocol its performance can approach that of a non-discarding network. Our simulations of Hamal demonstrate the effectiveness of its thread management and synchronization primitives. In particular, we find register-based synchronization to be an extremely efficient mechanism which can be used to implement a software barrier with a latency of only 523 cycles on a 512 node machine.