938 resultados para Operating leverage
Resumo:
Service providers make use of cost-effective wireless solutions to identify, localize, and possibly track users using their carried MDs to support added services, such as geo-advertisement, security, and management. Indoor and outdoor hotspot areas play a significant role for such services. However, GPS does not work in many of these areas. To solve this problem, service providers leverage available indoor radio technologies, such as WiFi, GSM, and LTE, to identify and localize users. We focus our research on passive services provided by third parties, which are responsible for (i) data acquisition and (ii) processing, and network-based services, where (i) and (ii) are done inside the serving network. For better understanding of parameters that affect indoor localization, we investigate several factors that affect indoor signal propagation for both Bluetooth and WiFi technologies. For GSM-based passive services, we developed first a data acquisition module: a GSM receiver that can overhear GSM uplink messages transmitted by MDs while being invisible. A set of optimizations were made for the receiver components to support wideband capturing of the GSM spectrum while operating in real-time. Processing the wide-spectrum of the GSM is possible using a proposed distributed processing approach over an IP network. Then, to overcome the lack of information about tracked devices’ radio settings, we developed two novel localization algorithms that rely on proximity-based solutions to estimate in real environments devices’ locations. Given the challenging indoor environment on radio signals, such as NLOS reception and multipath propagation, we developed an original algorithm to detect and remove contaminated radio signals before being fed to the localization algorithm. To improve the localization algorithm, we extended our work with a hybrid based approach that uses both WiFi and GSM interfaces to localize users. For network-based services, we used a software implementation of a LTE base station to develop our algorithms, which characterize the indoor environment before applying the localization algorithm. Experiments were conducted without any special hardware, any prior knowledge of the indoor layout or any offline calibration of the system.
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Service providers make use of cost-effective wireless solutions to identify, localize, and possibly track users using their carried MDs to support added services, such as geo-advertisement, security, and management. Indoor and outdoor hotspot areas play a significant role for such services. However, GPS does not work in many of these areas. To solve this problem, service providers leverage available indoor radio technologies, such as WiFi, GSM, and LTE, to identify and localize users. We focus our research on passive services provided by third parties, which are responsible for (i) data acquisition and (ii) processing, and network-based services, where (i) and (ii) are done inside the serving network. For better understanding of parameters that affect indoor localization, we investigate several factors that affect indoor signal propagation for both Bluetooth and WiFi technologies. For GSM-based passive services, we developed first a data acquisition module: a GSM receiver that can overhear GSM uplink messages transmitted by MDs while being invisible. A set of optimizations were made for the receiver components to support wideband capturing of the GSM spectrum while operating in real-time. Processing the wide-spectrum of the GSM is possible using a proposed distributed processing approach over an IP network. Then, to overcome the lack of information about tracked devices’ radio settings, we developed two novel localization algorithms that rely on proximity-based solutions to estimate in real environments devices’ locations. Given the challenging indoor environment on radio signals, such as NLOS reception and multipath propagation, we developed an original algorithm to detect and remove contaminated radio signals before being fed to the localization algorithm. To improve the localization algorithm, we extended our work with a hybrid based approach that uses both WiFi and GSM interfaces to localize users. For network-based services, we used a software implementation of a LTE base station to develop our algorithms, which characterize the indoor environment before applying the localization algorithm. Experiments were conducted without any special hardware, any prior knowledge of the indoor layout or any offline calibration of the system.
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BACKGROUND AND METHODS We conducted a focus group analysis with students and surgeons on factors which influence medical school students' education in the operating room (OR). The interviews were analyzed using grounded theory. RESULTS The analysis resulted in 18 detailed and easily applyable themes, which were grouped into the four categories: "Students' preparation and organizational aspects", "Learning objectives", "Educational strategies for the teacher", and "Social-environmental aspects". CONCLUSION By including students and surgeons, we were able to extend existing knowledge and enable better understanding of factors influencing teaching in the OR.
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Noise peaks are powerful distractors. This study focuses on the impact of noise peaks on surgical teams' communication during 109 long abdominal surgeries. We related measured noise peaks during 5-min intervals to the amount of observed communication during the same interval. Results show that noise peaks are associated with less case-relevant communication; this effect is moderated by the level of surgical experience; case-relevant communications decrease under high noise peak conditions among junior, but not among senior surgeons. However, case-irrelevant communication did not decrease under high noise level conditions, rather there was a trend to more case-irrelevant communication under high noise peaks. The results support the hypothesis that noise peaks impair communication because they draw on attentional resources rather than impairing understanding of communication. As case-relevant communication is important for surgical performance, exposure to high noise peaks in the OR should be minimised especially for less experienced surgeons. Practitioner Summary: This study investigated whether noise during surgeries influenced the communication within surgical teams. During abdominal surgeries, noise levels were measured and communication was observed. Results showed that high noise peaks reduced the frequency of patient-related communication, but did not reduce patient-irrelevant communication. Noise may negatively affect team coordination in surgeries.
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This paper extends the existing research on real estate investment trust (REIT) operating efficiencies. We estimate a stochastic-frontier panel-data model specifying a translog cost function, covering 1995 to 2003. The results disagree with previous research in that we find little evidence of scale economies and some evidence of scale diseconomies. Moreover, we also generally find smaller inefficiencies than those shown by other REIT studies. Contrary to previous research, the results also show that self-management of a REIT associates with more inefficiency when we measure output with assets. When we use revenue to measure output, selfmanagement associates with less inefficiency. Also contrary with previous research, higher leverage associates with more efficiency. The results further suggest that inefficiency increases over time in three of our four specifications.
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This paper extends the existing research on real estate investment trust (REIT) operating efficiencies. We estimate stochastic-frontier, panel-data models specifying a translog cost function. The specified model updates the cost frontier with new information as it becomes available over time. The model can identify frontier cost improvements, returns to scale, and cost inefficiencies over time. The results disagree with most previous research in that we find no evidence of scale economies and some evidence of scale diseconomies. Moreover, we also generally find smaller inefficiencies than those shown by other REIT studies. Contrary to previous research, higher leverage associates with more efficiency.
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The Tara Oceans Expedition (2009-2013) sampled the world oceans on board a 36 m long schooner, collecting environmental data and organisms from viruses to planktonic metazoans for later analyses using modern sequencing and state-of-the-art imaging technologies. Tara Oceans Data are particularly suited to study the genetic, morphological and functional diversity of plankton. The present data set provides continuous measurements made with a FRRF instrument, operating in a flow-through mode during the 2009-2012 part of the expedition. It operates by exciting chlorophyll fluorescence using a series of short flashes of controlled energy and time intervals (Kolber et al, 1998). The fluorescence transients produced by this excitation signal were analysed in real-time to provide estimates of abundance of photosynthetic pigments, the photosynthetic yields (Fv/Fm), the functional absorption cross section (a proxy for efficiency of photosynthetic energy acquisition), the kinetics of photosynthetic electron transport between Photosystem II and Photosystem I, and the size of the PQ pool. These parameters were measured at excitation wavelength of 445 nm, 470nm, 505 nm, and 535 nm, allowing to assess the presence and the photosynthetic performance of different phytoplankton taxa based on the spectral composition of their light harvesting pigments. The FRRF-derived photosynthetic characteristics were used to calculate the initial slope, the half saturation, and the maximum level of Photosynthesis vs Irradiance relationship. FRRF data were acquired continuously, at 1-minute time intervals.
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Gasification is a technology that can replace traditional management alternatives used up to date to deal with this waste (landfilling, composting and incineration) and which fulfils the social, environmental and legislative requirements. The main products of sewage sludge gasification are permanent gases (useful to generate energy or to be used as raw material in chemical synthesis processes), liquids (tars) and char. One of the main problems to be solved in gasification is tar production. Tars are organic impurities which can condense at relatively high temperatures making impossible to use the produced gases for most applications. This work deals with the effect of some primary tar removal processes (performed inside the gasifier) on sewage sludge gasification products. For this purpose, analysis of the gas composition, tar production, cold gas efficiency and carbon conversion were carried out. The tests were performed with air in a laboratory scale plant consisting mainly of a bubbling bed gasifier. No catalyzed and catalyzed (10% wt of dolomite in the bed and in the feeding) tests were carried out at different temperatures (750ºC, 800ºC and 850ºC) in order to know the effect of these parameters in the gasification products. As far as tars were concerned, qualitative and quantitative tar composition was determined. In all tests the Equivalence Ratio (ER) was kept at 0.3. Temperature is one of the most influential variables in sewage sludge gasification. Higher temperatures favoured hydrogen and CO production while CO2 content decreased, which might be partially explained by the effect of the cracking, Boudouard and CO2 reforming reactions. At 850ºC, cold gas efficiency and carbon conversion reached 49% and 76%, respectively. The presence of dolomite as catalyst increased the production of H2 reaching contents of 15.5% by volume at 850 °C. Similar behaviour was found for CO whereas CO2 and CnHm (light hydrocarbons) production decreased. In the presence of dolomite, a tar reduction of up to 51% was reached in comparison with no catalyzed tests, as well as improvements on cold gas efficiency and carbon conversion. Several assays were developed in order to test catalyst performance under more rough gasification conditions. For this purpose, the throughput value (TR), defined as kg sludge “as received” fed to the gasifier per hour and per m2 of cross sectional area of the gasifier, was modified. Specifically, the TR values used were 110 (reference value), 215 and 322 kg/h·m2. When TR increased, the H2, CO and CH4 production decreased while the CO2 and the CnHm production increased. Tar production increased drastically with TR during no catalysed tests what is related to the lower residence time of the gas inside the reactor. Nevertheless, even at TR=322 kg/h·m2, tar production decreased by nearly 50% with in-bed use of dolomite in comparison with no catalyzed assays under the same operating conditions. Regarding relative tar composition, there was an increase in benzene and naphthalene content when temperature increased while the content of the rest of compounds decreased. The dolomite seemed to be effective all over the range of molecular weight studied showing tar removal efficiencies between 35-55% in most cases. High values of the TR caused a significant increase in tar production but a slight effect on tar composition.
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Polysilicon cost impacts significantly on the photovoltaics (PV) cost and on the energy payback time. Nowadays, the besetting production process is the so called Siemens process, polysilicon deposition by chemical vapor deposition (CVD) from Trichlorosilane. Polysilicon purification level for PV is to a certain extent less demanding that for microelectronics. At the Instituto de Energía Solar (IES) research on this subject is performed through a Siemens process-type laboratory reactor. Through the laboratory CVD prototype at the IES laboratories, valuable information about the phenomena involved in the polysilicon deposition process and the operating conditions is obtained. Polysilicon deposition by CVD is a complex process due to the big number of parameters involved. A study on the influence of temperature and inlet gas mixture composition on the polysilicon deposition growth rate, based on experimental experience, is shown. Moreover, CVD process accounts for the largest contribution to the energy consumption of the polysilicon production. In addition, radiation phenomenon is the major responsible for low energetic efficiency of the whole process. This work presents a model of radiation heat loss, and the theoretical calculations are confirmed experimentally through a prototype reactor at our disposal, yielding a valuable know-how for energy consumption reduction at industrial Siemens reactors.
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This article aims to quantify the efficiency of mobile operators in Spain and other European countries such as France and Germany. The period considered is from 2002 to 2008. Linear regression is used to analyze the relationship between growth in revenue and gross operating margin (EBITDA) generated by the relevant operators and the aggregate industry in each country. At the industry level, it is shown that (i) there is a strong correlation between revenue and margin; and (ii) this correlation weakens when competitive intensity grows. At the operator level, those which achieved larger increases in revenues did not sacrifice their margins, but offset the additional investments and costs required to achieve said growth through economies of scale.
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The Bologna Declaration and the implementation of the European Higher Education Area are promoting the use of active learning methodologies. The aim of this study is to evaluate the effects obtained after applying active learning methodologies to the achievement of generic competences as well as to the academic performance. This study has been carried out at the Universidad Politécnica de Madrid, where these methodologies have been applied to the Operating Systems I subject of the degree in Technical Engineering in Computer Systems. The fundamental hypothesis tested was whether the implementation of active learning methodologies (cooperative learning and problem based learning) favours the achievement of certain generic competences (‘teamwork’ and ‘planning and time management’) and also whether this fact improved the academic performance of our students. The original approach of this work consists in using psychometric tests to measure the degree of acquired student’s generic competences instead of using opinion surveys, as usual. Results indicated that active learning methodologies improve the academic performance when compared to the traditional lecture/discussion method, according to the success rate obtained. These methods seem to have as well an effect on the teamwork competence (the perception of the behaviour of the other members in the group) but not on the perception of each students’ behaviour. Active learning does not produce any significant change in the generic competence ‘planning and time management'.
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En un mundo donde el cambio es constante y cada vez más vertiginoso, la innovación es el combustible que utilizan las empresas que permite su renovación constante y, como consecuencia, su supervivencia en el largo plazo. La innovación es sin dudas un elemento fundamental para determinar la capacidad de las empresas en crear valor a lo largo del tiempo, y por ello, las empresas suelen dedicar esfuerzos considerables y recursos de todo tipo para identificar nuevas alternativas de innovación que se adapten a su estrategia, cultura, objetivos y ambiciones corporativas. Una forma específica para llevar a cabo la innovación es la innovación abierta. Esta se entiende como la innovación que se realiza de manera conjunta con otras empresas o participantes del ecosistema. Cabe la aclaración que en este documento se toma la definición de ecosistema referida al conjunto de clientes, proveedores, competidores y otros participantes que interactúan en un mismo entorno donde existen posiciones de liderazgo que pueden cambiar a lo largo del tiempo (Moore 1996). El termino de innovación abierta fue acuñado por Henry Chesbrough hace algo mas de una década para referirse a esta forma particular de organizar la innovación corporativa. Como se observa en el presente trabajo la innovación abierta es un nuevo paradigma que ha capturado el interés académico y empresarial desde algo más de una década. Se verán varios casos de innovación abierta que se están llevando a cabo en diversos países y sectores de la economía. El objetivo principal de este trabajo de investigación es el de desarrollar y explicar un modelo de relación entre la innovación abierta y la creación de valor en las empresas. Para ello, y como objetivos secundarios, se ha investigado los elementos de un Programa de Innovación Abierta, los impulsores 1 de creación de valor, el proceso de creación de valor y, finalmente, la interacción entre estos tres elementos. Como producto final de la investigación se ha desarrollado un marco teórico general para establecer la conexión entre la innovación abierta y la creación de valor que facilita la explicación de la interacción entre ambos elementos. Se observa a partir de los casos de estudio que la innovación abierta puede abarcar todos los sectores de la economía, múltiples geografías y empresas de distintos tamaños (grandes empresas, pequeñas y medianas empresas, incluso empresas de reciente creación) cada una de ellas con distinta relevancia dentro del ecosistema en el que participan. Elementos de un Programa de Innovación Abierta La presente investigación comienza con la enumeración de los distintos elementos que se encuentran presentes en los Programas de Innovación Abierta. De esta manera, se describen los diversos elementos que se han identificado a través de la revisión de la literatura académica que se ha llevado a cabo. En función de una serie de características comunes, los distintos elementos se agrupan en cuatro niveles diferentes para lograr un mejor entendimiento de los Programas de Innovación Abierta. A continuación se detallan estos elementos § Organización del Programa. En primer lugar se menciona la existencia de una estructura organizativa capaz de cumplir una serie de objetivos establecidos previamente. Por su naturaleza de innovación abierta deberá existir cierto grado de interacción entre los distintos miembros que participen en el proceso de innovación. § Talento Interno. El talento interno asociado a los programas de innovación abierta juega un rol fundamental en la ejecución y éxito del programa. Bajo este nivel se asocian elementos como la cultura de innovación abierta y el liderazgo como mecanismo para entender uno de los elementos que explica el grado de adopción de innovación en una empresa. Estrechamente ligados al liderazgo se encuentran los comportamientos organizacionales como elementos diferenciadores para aumentar las posibilidades de creación de innovación abierta. § Infraestructura. En este nivel se agrupan los elementos relacionados con la infraestructura tecnológica necesaria para llevar a cabo el programa incluyendo los procesos productivos y las herramientas necesarias para la gestión cotidiana. § Instrumentos. Por último, se mencionan los instrumentos o vehículos que se utilizan en el entorno corporativo para implementar innovación abierta. Hay varios instrumentos disponibles como las incubadoras corporativas, los acuerdos de licenciamiento o las áreas de capital de riesgo corporativo. Para este último caso se hará una mención especial por el creciente y renovado interés que ha despertado tanto en el entorno académico como empresarial. Se ha identificado al capital de riesgo corporativo como un de los elementos diferenciales en el desarrollo de la estrategia de innovación abierta de las empresas ya que suele aportar credibilidad, capacidad y soporte tecnológico. Estos cuatro elementos, interactuando de manera conjunta y coordinada, tienen la capacidad de crear, potenciar e incluso desarrollar impulsores de creación de valor que impactan en la estrategia y organización de la empresa y partir de aquí en su desempeño financiero a lo largo del tiempo. Los Impulsores de Creación de Valor Luego de identificar, ordenar y describir los distintos elementos presentes en un Programa de Innovación Abierta se ha avanzado en la investigación con los impulsores de creación de valor. Estos pueden definirse como elementos que potencian o determinan la capacidad de crear valor dentro del entorno empresarial. Como se puede observar, se detallan estos impulsores como punto de interacción entre los elementos del programa y el proceso de creación de valor corporativo. A lo largo de la presente investigación se han identificado 6 impulsores de creación de valor presentes en un Programa de Innovación Abierta. § Nuevos Productos y Servicios. El impulsor de creación de valor más directo y evidente en un Programa de Innovación Abierta es la capacidad de crear nuevos productos y servicios dado que se relacionan directamente con el proceso de innovación de la empresa § Acceso a Mercados Adyacentes. El proceso de innovación también puede ser una fuente de valor al permitir que la empresa acceda a mercados cercanos a su negocio tradicional, es decir satisfaciendo nuevas necesidades de sus clientes existentes o de nuevos clientes en otro mercado. § Disponibilidad de Tecnologías. La disponibilidad de tecnologías es un impulsor en si mismo de la creación de valor. Estas pueden ser tanto complementarias como de apalancamiento de tecnologías ya existentes dentro de la empresa y que tengan la función de transformar parte de los componentes de la estrategia de la empresa. § Atracción del Talento Externo. La introducción de un Programa de Innovación Abierta en una empresa ofrece la oportunidad de interactuar con otras organizaciones del ecosistema y, por tanto, de atraer el talento externo. La movilidad del talento es una característica singular de la innovación abierta. § Participación en un Ecosistema Virtuoso. Se ha observado que las acciones realizadas en el entorno por cualquiera de los participantes también tendrán un claro impacto en la creación de valor para el resto de participantes por lo tanto la participación en un ecosistema virtuoso es un impulsor de creación de valor presente en la innovación abierta. § Tecnología “Dentro--‐Fuera”. Como último impulsor de valor es necesario comentar que la dirección que puede seguir la tecnología puede ser desde la empresa hacia el resto del ecosistema generando valor a partir de disponibilizar tecnologías que no son de utilidad interna para la empresa. Estos seis impulsores de creación de valor, presentes en los procesos de innovación corporativos, tienen la capacidad de influir en la estrategia y organización de la empresa aumentando su habilidad de crear valor. El Proceso de Creación de Valor en las Empresas Luego se ha investigado la práctica de la gestión basada en valor que sostiene la necesidad de alinear la estrategia corporativa y el diseño de la organización con el fin de obtener retornos financieros superiores al resto de los competidores de manera sostenida, y finalmente crear valor a lo largo del tiempo. Se describe como los impulsores de creación de valor influyen en la creación y fortalecimiento de las ventajas competitivas de la empresa impactando y alineando su estrategia y organización. Durante la investigación se ha identificado que las opciones reales pueden utilizarse como una herramienta para gestionar entornos de innovación abierta que, por definición, tienen altos niveles de incertidumbre. Las opciones reales aportan una capacidad para la toma de decisiones de forma modular y flexible que pueden aplicarse al entorno corporativo. Las opciones reales han sido particularmente diseñadas para entender, estructurar y gestionar entornos de múltiples incertidumbres y por ello tienen una amplia aplicación en los entornos de innovación. Se analizan los usos potenciales de las opciones reales como complemento a los distintos instrumentos identificados en los Programas de Innovación Abierta. La Interacción Entre los Programas de Innovación Abierta, los Impulsores de Creación de Valor y el Proceso de Creación de Valor A modo de conclusión del presente trabajo se puede mencionar que se ha desarrollado un marco general de creación de valor en el entorno de los Programas de Innovación Abierta. Este marco general incluye tres elementos fundamentales. En primer lugar describe los elementos que se encuentran presentes en los Programas de Innovación Abierta, en segundo lugar como estos programas colaboran en la creación de los seis impulsores de creación de valor que se han identificado y finalmente en tercer lugar como estos impulsores impactan sobre la estrategia y la organización de la empresa para dar lugar a la creación de valor de forma sostenida. A través de un Programa de Innovación Abierta, se pueden desarrollar los impulsores de valor para fortalecer la posición estratégica de la empresa y su capacidad de crear de valor. Es lo que denominamos el marco de referencia para la creación de valor en un Programa de Innovación Abierta. Se presentará la idea que los impulsores de creación de valor pueden colaborar en generar una estrategia óptima que permita alcanzar un desempeño financiero superior y lograr creación de valor de la empresa. En resumen, se ha desarrollado un modelo de relación que describe el proceso de creación de valor en la empresa a partir de los Programas de Innovación Abierta. Para ello, se han identificado los impulsores de creación de valor y se ha descripto la interacción entre los distintos elementos del modelo. ABSTRACT In a world of constant, accelerating change innovation is fuel for business. Year after year, innovation allows firms to renew and, therefore, advance their long--‐term survival. Undoubtedly, innovation is a key element for the firms’ ability to create value over time. Companies often devote considerable effort and diverse resources to identify innovation alternatives that could fit into their strategy, culture, corporate goals and ambitions. Open innovation refers to a specific approach to innovate by collaborating with other firms operating within the same business ecosystem.2 The term open innovation was pioneered by Henry Chesbrough more than a decade ago to refer to this particular mode of driving corporate innovation. Open innovation is a new paradigm that has attracted academic and business interest for over a decade. Several cases of open innovation from different countries and from different economic sectors are included and reviewed in this document. The main objective of this study is to explain and develop a relationship model between open innovation and value creation. To this end, and as secondary objectives, we have explored the elements of an Open Innovation Program, the drivers of value creation, the process of value creation and, finally, the interaction between these three elements. As a final product of the research we have developed a general theoretical framework for establishing the connection between open innovation and value creation that facilitates the explanation of the interaction between the two. From the case studies we see that open innovation can encompass all sectors of the economy, multiple geographies and varying businesses – large companies, SMEs, including (even) start--‐ups – each with a different relevance within the ecosystem in which they participate. Elements of an Open Innovation Program We begin by listing and describing below the items that can be found in an Open Innovation Program. Many of such items have been identified through the review of relevant academic literature. Furthermore, in order to achieve a better understanding of Open Innovation, we have classified those aspects into four different categories according to the features they share. § Program Organization. An organizational structure must exist with a degree of interaction between the different members involved in the innovation process. This structure must be able to meet a number of previously established objectives. § Internal Talent. Internal talent plays a key role in the implementation and success of any Open Innovation program. An open innovation culture and leadership skills are essential for adopting either radical or incremental innovation. In fact, leadership is closely linked to organizational behavior and it is essential to promote open innovation. § Infrastructure. This category groups the elements related to the technological infrastructure required to carry out the program, including production processes and daily management tools. § Instruments. Finally, we list the instruments or vehicles used in the corporate environment to implement open innovation. Several instruments are available, such as corporate incubators, licensing agreements or venture capital. There has been a growing and renewed interest in the latter, both in academia and business circles. The use of corporate venture capital to sustain the development of the open innovation strategy brings ability, credibility, and technological support to the process. The combination of elements from these four categories, interacting in a coordinated way, makes it possible to create, enhance and develop value creation drivers that may impact the company’s strategy and organization and affect its financial performance over time. The Drivers of Value Creation After identifying describing and categorizing the different elements present in an Open Innovation Program our research examines the drivers of value creation. These can be defined as elements that enhance or determine the ability to create value in the business environment. As can be seen, these drivers can act as interacting points between the elements of the program and the process of value creation. The study identifies six drivers of value creation that might be found in an Open Innovation Program. § New Products and Services. The more direct and obvious driver of value creation in any Open Innovation Program is the ability to create new products and services. This is directly related to the company’s innovation process. § Access to Adjacent Markets. The innovation process can also serve as a source of value by granting access to adjacent markets through satisfying new needs for existing customers or attracting new customers from other markets. § Availability of Technologies. The availability of technology is in itself a driver for value creation. New technologies can either be complementary and/or can leverage existing technologies within the firm. They can partly transform certain elements of the company’s strategy. § External Talent Strategy. Incorporating an Open Innovation Program offers the opportunity to interact with other organizations operating in the same ecosystem and can therefore attract external skilled resources. Talent mobility is a unique feature of open innovation. § Becoming Part of a Virtuous Circle. The actions carried out in the environment by any of its members will also have a clear impact on value creation for the other participants. Participation in a virtuous ecosystem is thus a driver for value creation in an open innovation strategy. § Inside--‐out Technology. Value creation may also evolve by allowing other firms in the ecosystem to incorporate internally developed under--‐utilized technologies into their own innovation processes. These six drivers that are present in the innovation process can influence the strategy and the organization of the company, increasing its ability to create value. The Value Creation Process Value--‐based management is the management approach that requires aligning the corporate strategy and the organizational design to create value and obtain sustained financial returns (at least, higher returns than its competitors). We describe how the drivers of value creation can enhance corporate advantages by aligning its strategy and organization. During this study, we were able to determine that real options can be used as managing tools in open innovation environments which, by definition, have high uncertainty levels. Real options provide capability for flexible and modular decision--‐making in the business environment. In particular, real options have been designed for uncertainty management and, therefore, they may be widely applied in innovation environments. We analyze potential uses of real options to supplement the various instruments identified in the Open Innovation programs. The Interaction Between Open Innovation Programs, Value Creation drivers and Value Creation Process As a result of this study, we have developed a general framework for value creation in Open Innovation Programs. This framework includes three key elements. We first described the elements that are present in Open Innovation Programs. Next, we showed how these programs can boost six drivers of value creation that have been identified. Finally, we analyzed how the drivers impact on the strategy and organization of the company in order to lead to the creation of sustainable value. Through an Open Innovation Program, value drivers can be developed to strengthen a company’s strategic position and its ability to create value. That is what we call the framework for value creation in the Open Innovation Program. Value drivers can collaborate in generating an optimal strategy that helps foster a superior financial performance and a sustained value creation process. In sum, we have developed a relationship model that describes the process of creating value in a firm with an Open Innovation Program. We have identified the drivers of value creation and described how the different elements of the model interact with each other.
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The operating theatres are the engine of the hospitals; proper management of the operating rooms and its staff represents a great challenge for managers and its results impact directly in the budget of the hospital. This work presents a MILP model for the efficient schedule of multiple surgeries in Operating Rooms (ORs) during a working day. This model considers multiple surgeons and ORs and different types of surgeries. Stochastic strategies are also implemented for taking into account the uncertain in surgery durations (pre-incision, incision, post-incision times). In addition, a heuristic-based methods and a MILP decomposition approach is proposed for solving large-scale ORs scheduling problems in computational efficient way. All these computer-aided strategies has been implemented in AIMMS, as an advanced modeling and optimization software, developing a user friendly solution tool for the operating room management under uncertainty.
Resumo:
Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.