986 resultados para METAL-INSULATOR-SEMICONDUCTOR DEVICES


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One of the main challenges in the development of metal-oxide gas sensors is enhancement of selectivity to a particular gas. Currently, two general approaches exist for enhancing the selective properties of sensors. The first one is aimed at preparing a material that is specifically sensitive to one compound and has low or zero cross-sensitivity to other compounds that may be present in the working atmosphere. To do this, the optimal temperature, doping elements, and their concentrations are investigated. Nonetheless, it is usually very difficult to achieve an absolutely selective metal oxide gas sensor in practice. Another approach is based on the preparation of materials for discrimination between several analyte in a mixture. It is impossible to do this by using one sensor signal. Therefore, it is usually done either by modulation of sensor temperature or by using sensor arrays. The present work focus on the characterization of n-type semiconducting metal oxides like Tungsten oxide (WO3), Zinc Oxide (ZnO) and Indium oxide (In2O3) for the gas sensing purpose. For the purpose of gas sensing thick as well as thin films were fabricated. Two different gases, NO2 and H2S gases were selected in order to study the gas sensing behaviour of these metal oxides. To study the problem associated with selectivity the metal oxides were doped with metals and the gas sensing characteristics were investigated. The present thesis is entitled “Development of semiconductor metal oxide gas sensors for the detection of NO2 and H2S gases” and consists of six chapters.

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The Thesis consist of the study of the electrical properties of antimony trisulphide films and the electrical behaviour of different metal contacts to antimony trisulphide films. Since the thermal evapouration of the compound antimony trisulphide as such mayresult in nonstoichiometric compound films , sb2s3 films in the present work were mostly prepared by the three temperature method ,keeping the substrate at different temperature ranging from 3031 to 4231 and evapourating antimony and sulphur simultaneously from separate sources.

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The electrical characterization of a high efficient multilayer polymer light emitting diode using poly[(2-methoxy-5-hexyloxy)-p-phenylenevinylene] as the emissive layer and an anionic fluorinated surfactant as the electron transport layer was performed. For the sake of comparison, a conventional single layer device was fabricated. The density current vs. voltage measurements revealed that the conventional device has a higher threshold voltage and lower current compared to the surfactant modified device. The effective barrier height for electron injection was suppressed. The influence of the interfaces and bulk contributions to the dc and high frequencies conductivities of the devices was also discussed. (c) 2006 Springer Science + Business Media, Inc.

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The Su-Schrieffer-Heeger (SSH) Hamiltonian has been one of most used models to study the electronic structure of polyacetylene (PA) chains. It has been reported in the literature that in the SSH framework a disordered soliton distribution can not produce a metallic regime. However, in this work (using the same SSH model and parameters) we show that this is possible. The necessary conditions for true metals (non-vanishing density of states and extended wavefunctions around the Fermi level) are obtained for soliton concentration higher than 6% through soliton segregation (clustering). These results are consistent with recent experimental data supporting disorder as an essential mechanism behind the high conductivity of conducting polymers. (C) 2001 Elsevier B.V. B.V. All rights reserved.

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In the present work, the electronic structure of polythiophene at several doping levels is investigated by the use of the Huckel Hamiltonian with sigma-bond compressibility. Excess charges are assumed to be stored in conformational defects of the bipolaron type. The Hamiltonian matrix elements representative of a bipolaron are obtained from a previous thiophene oligomer calculation, and then transferred to very long chains. Negative factor counting and inverse iteration techniques have been used to evaluate densities of states and wave functions, respectively. Several types of defect distributions were analyzed. Our results are consistent with the following: (i) the bipolaron lattice does not present a finite density of states at the Fermi energy at any doping level; (ii) bipolaron clusters show an insulator-to-metal transition at 8 mol% doping level; (iii) segregation disorder shows an insulator-to-metal transition for doping levels in the range 20-30 mor %.

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Apresentamos neste trabalho um estudo teórico sobre polímeros orgânicos conjugados. É conhecido que estes sistemas, em geral semicondutores ou isolantes, sob dopagem química podem vir a adquirir propriedades elétricas de material condutor. E ainda, sob ação de campo elétrico, pequenos oligômeros podem apresentar comportamento equivalente ao de dispositivos usuais, mas com inúmeras vantagens como, por exemplo, tamanho extremamente reduzido (alguns nanômetros). Dessa forma no primeiro capítulo faremos uma breve introdução sobre polímeros orgânicos conjugados mostrando alguns resultados experimentais obtidos para o polímero 4-dicianometileno-4,4-ciclopenta [2,1-b: 3,4b’] ditiofeno – CDM, que é o objeto central de estudo desta dissertação. O capítulo 2 trata dos métodos quânticos utilizados. Citaremos a Teoria de Hartre-Fock (HF) e suas derivações semi-empíricas. A técnica de Interação de configuração (CI) e a Teoria do Funcional da Densidade (DFT) também serão tratadas neste capítulo. O capítulo 3 é dedicado a descrever as características de alguns dispositivos usuais como diodos e transistores. Aqui o fundamental é entender a composição, o funcionamento e principalmente, como se comportam suas curvas características corrente versus voltagem (IxV). Citaremos ainda alguns dispositivos eletrônicos extremamente pequenos. No capítulo 4 começa nossos resultados e discussões referentes a análise da transição isolante-metal em CDM sob ação de dopagem. Primeiramente a nível semiempírico, obtivemos a caracterização ótica de oligômeros de CDM neutro e na presença de defeitos conformacionais do tipo bipólarons negativo e positivo. Partindo de geometrias otimizadas via métodos AM1 e PM3 obtivemos o espectro de absorção para sistemas com e sem carga. A nível Hartree-Fock calculamos a Estrutura de Bandas e a Densidade de Estados (DOS) para o PCDM no estado neutro e dopado. O cálculo da DOS e da Dispersão foram realizados através de programas computacionais desenvolvidos aqui no Grupo de Física de Materiais da Amazônia (GFMA). Apresentamos ainda neste capítulo o espectro de absorção teórico para oligômeros de CDM com diversas configurações com geometrias totalmente otimizadas pelo DFT. No capítulo 5 temos os resultados relativos à análise de nanodispositivos baseados em tetrâmeros de CDM com e sem carga. As curvas do deslocamento de carga versus voltagem apresentam características de curvas de dispositivos usuais. Analisamos também o espectro de absorção teórico dos nanodispositivos para valores de tensão nula e em pontos de saturação de corrente nas regiões direta e reversa.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Air conditioning and lighting costs can be reduced substantially by changing the optical properties of "intelligent windows." The electrochromic devices studied to date have used copper as an additive. Copper, used here as an electrochromic material, was dissolved in an aqueous animal protein-derived gel electrolyte. This combination constitutes the electrochromic system for reversible electrodeposition. Cyclic voltammetry, chronoamperometric and chromogenic analyses indicated that were obtained good conditions of transparency (initial transmittance of 70%), optical reversibility, small potential window (2.1 V), variation of transmittance in visible light (63.6%) and near infrared (20%) spectral regions. Permanence in the darkened state was achieved by maintaining a lower pulse potential (-0.16 V) than the deposition potential (-1.0 V). Increasing the number of deposition and dissolution cycles favored the transmittance and photoelectrochemical reversibility of the device. The conductivity of the electrolyte (10(-3) S/cm) at several concentrations of CuCl2 was determined by electrochemical impedance spectroscopy. A thermogravimetric analysis confirmed the good thermal stability of the electrolyte, since the mass loss detected up to 100 degrees C corresponded to water evaporation and decomposition of the gel started only at 200 degrees C. Micrographic and small angle X-ray scattering analyses indicated the formation of a persistent deposit of copper particles on the ITO. (C) 2012 Elsevier B.V. All rights reserved.

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This work studies the gate-induced drain leakage (GIDL) in p- and n-MuGFET structures with different TiN metal gate thickness and high-k gate dielectrics. As a result of this analysis, it was observed that a thinner TiN metal gate showed a larger GIDL due to the different gate oxide thickness and a reduced metal gate work function. In addition, replacing SiON by a high-k dielectric (HfSiON) results for nMuGFETs in a decrease of the GIDL On the other hand, the impact of the gate dielectric on the GIDL for p-channel MuGFETs is marginal. The effect of the channel width was also studied, whereby narrow fin devices exhibit a reduced GIDL current in spite of the larger vertical electric field expected for these devices. Finally, comparing the effect of the channel type, an enhanced GIDL current for pMuGFET devices was observed. (C) 2011 Elsevier Ltd. All rights reserved.

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The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new issues and new challenges are arising, and the conventional ”bulk” architecture is becoming inadequate in order to face them. In order to overcome the limitations related to conventional structures, the researchers community is preparing different solutions, that need to be assessed. Possible solutions currently under scrutiny are represented by: • devices incorporating materials with properties different from those of silicon, for the channel and the source/drain regions; • new architectures as Silicon–On–Insulator (SOI) transistors: the body thickness of Ultra-Thin-Body SOI devices is a new design parameter, and it permits to keep under control Short–Channel–Effects without adopting high doping level in the channel. Among the solutions proposed in order to overcome the difficulties related to scaling, we can highlight heterojunctions at the channel edge, obtained by adopting for the source/drain regions materials with band–gap different from that of the channel material. This solution allows to increase the injection velocity of the particles travelling from the source into the channel, and therefore increase the performance of the transistor in terms of provided drain current. The first part of this thesis work addresses the use of heterojunctions in SOI transistors: chapter 3 outlines the basics of the heterojunctions theory and the adoption of such approach in older technologies as the heterojunction–bipolar–transistors; moreover the modifications introduced in the Monte Carlo code in order to simulate conduction band discontinuities are described, and the simulations performed on unidimensional simplified structures in order to validate them as well. Chapter 4 presents the results obtained from the Monte Carlo simulations performed on double–gate SOI transistors featuring conduction band offsets between the source and drain regions and the channel. In particular, attention has been focused on the drain current and to internal quantities as inversion charge, potential energy and carrier velocities. Both graded and abrupt discontinuities have been considered. The scaling of devices dimensions and the adoption of innovative architectures have consequences on the power dissipation as well. In SOI technologies the channel is thermally insulated from the underlying substrate by a SiO2 buried–oxide layer; this SiO2 layer features a thermal conductivity that is two orders of magnitude lower than the silicon one, and it impedes the dissipation of the heat generated in the active region. Moreover, the thermal conductivity of thin semiconductor films is much lower than that of silicon bulk, due to phonon confinement and boundary scattering. All these aspects cause severe self–heating effects, that detrimentally impact the carrier mobility and therefore the saturation drive current for high–performance transistors; as a consequence, thermal device design is becoming a fundamental part of integrated circuit engineering. The second part of this thesis discusses the problem of self–heating in SOI transistors. Chapter 5 describes the causes of heat generation and dissipation in SOI devices, and it provides a brief overview on the methods that have been proposed in order to model these phenomena. In order to understand how this problem impacts the performance of different SOI architectures, three–dimensional electro–thermal simulations have been applied to the analysis of SHE in planar single and double–gate SOI transistors as well as FinFET, featuring the same isothermal electrical characteristics. In chapter 6 the same simulation approach is extensively employed to study the impact of SHE on the performance of a FinFET representative of the high–performance transistor of the 45 nm technology node. Its effects on the ON–current, the maximum temperatures reached inside the device and the thermal resistance associated to the device itself, as well as the dependence of SHE on the main geometrical parameters have been analyzed. Furthermore, the consequences on self–heating of technological solutions such as raised S/D extensions regions or reduction of fin height are explored as well. Finally, conclusions are drawn in chapter 7.

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The aim of the research activity focused on the investigation of the correlation between the degree of purity in terms of chemical dopants in organic small molecule semiconductors and their electrical and optoelectronic performances once introduced as active material in devices. The first step of the work was addressed to the study of the electrical performances variation of two commercial organic semiconductors after being processed by means of thermal sublimation process. In particular, the p-type 2,2′′′-Dihexyl-2,2′:5′,2′′:5′′,2′′′-quaterthiophene (DH4T) semiconductor and the n-type 2,2′′′- Perfluoro-Dihexyl-2,2′:5′,2′′:5′′,2′′′-quaterthiophene (DFH4T) semiconductor underwent several sublimation cycles, with consequent improvement of the electrical performances in terms of charge mobility and threshold voltage, highlighting the benefits brought by this treatment to the electric properties of the discussed semiconductors in OFET devices by the removal of residual impurities. The second step consisted in the provision of a metal-free synthesis of DH4T, which was successfully prepared without organometallic reagents or catalysts in collaboration with Dr. Manuela Melucci from ISOF-CNR Institute in Bologna. Indeed the experimental work demonstrated that those compounds are responsible for the electrical degradation by intentionally doping the semiconductor obtained by metal-free method by Tetrakis(triphenylphosphine)palladium(0) (Pd(PPh3)4) and Tributyltin chloride (Bu3SnCl), as well as with an organic impurity, like 5-hexyl-2,2':5',2''-terthiophene (HexT3) at, in different concentrations (1, 5 and 10% w/w). After completing the entire evaluation process loop, from fabricating OFET devices by vacuum sublimation with implemented intentionally-doped batches to the final electrical characterization in inherent-atmosphere conditions, commercial DH4T, metal-free DH4T and the intentionally-doped DH4T were systematically compared. Indeed, the fabrication of OFET based on doped DH4T clearly pointed out that the vacuum sublimation is still an inherent and efficient purification method for crude semiconductors, but also a reliable way to fabricate high performing devices.

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The metallization stack Ti/Pd/Ag on n-type Si has been readily used in solar cells due to its low metal/semiconductor specific contact resistance, very high sheet conductance, bondability, long-term durability, and cost-effectiveness. In this study, the use of Ti/Pd/Ag metallization on n-type GaAs is examined, targeting electronic devices that need to handle high current densities and with grid-like contacts with limited surface coverage (i.e., solar cells, lasers, or light emitting diodes). Ti/Pd/Ag (50 nm/50 nm/1000 nm) metal layers were deposited on n-type GaAs by electron beam evaporation and the contact quality was assessed for different doping levels (from 1.3 × 1018 cm−3 to 1.6 × 1019 cm−3) and annealing temperatures (from 300°C to 750°C). The metal/semiconductor specific contact resistance, metal resistivity, and the morphology of the contacts were studied. The results show that samples doped in the range of 1018 cm−3 had Schottky-like I–V characteristics and only samples doped 1.6 × 1019 cm−3 exhibited ohmic behavior even before annealing. For the ohmic contacts, increasing annealing temperature causes a decrease in the specific contact resistance (ρ c,Ti/Pd/Ag ~ 5 × 10−4 Ω cm2). In regard to the metal resistivity, Ti/Pd/Ag metallization presents a very good metal conductivity for samples treated below 500°C (ρ M,Ti/Pd/Ag ~ 2.3 × 10−6 Ω cm); however, for samples treated at 750°C, metal resistivity is strongly degraded due to morphological degradation and contamination in the silver overlayer. As compared to the classic AuGe/Ni/Au metal system, the Ti/Pd/Ag system shows higher metal/semiconductor specific contact resistance and one order of magnitude lower metal resistivity.

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Development of transparent oxide semiconductors (TOS) from Earth-abundant materials is of great interest for cost-effective thin film device applications, such as solar cells, light emitting diodes (LEDs), touch-sensitive displays, electronic paper, and transparent thin film transistors. The need of inexpensive or high performance electrode might be even greater for organic photovoltaic (OPV), with the goal to harvest renewable energy with inexpensive, lightweight, and cost competitive materials. The natural abundance of zinc and the wide bandgap ($sim$3.3 eV) of its oxide make it an ideal candidate. In this dissertation, I have introduced various concepts on the modulations of various surface, interface and bulk opto-electronic properties of ZnO based semiconductor for charge transport, charge selectivity and optimal device performance. I have categorized transparent semiconductors into two sub groups depending upon their role in a device. Electrodes, usually 200 to 500 nm thick, optimized for good transparency and transporting the charges to the external circuit. Here, the electrical conductivity in parallel direction to thin film, i.e bulk conductivity is important. And contacts, usually 5 to 50 nm thick, are optimized in case of solar cells for providing charge selectivity and asymmetry to manipulate the built in field inside the device for charge separation and collection. Whereas in Organic LEDs (OLEDs), contacts provide optimum energy level alignment at organic oxide interface for improved charge injections. For an optimal solar cell performance, transparent electrodes are designed with maximum transparency in the region of interest to maximize the light to pass through to the absorber layer for photo-generation, plus they are designed for minimum sheet resistance for efficient charge collection and transport. As such there is need for material with high conductivity and transparency. Doping ZnO with some common elements such as B, Al, Ga, In, Ge, Si, and F result in n-type doping with increase in carriers resulting in high conductivity electrode, with better or comparable opto-electronic properties compared to current industry-standard indium tin oxide (ITO). Furthermore, improvement in mobility due to improvement on crystallographic structure also provide alternative path for high conductivity ZnO TCOs. Implementing these two aspects, various studies were done on gallium doped zinc oxide (GZO) transparent electrode, a very promising indium free electrode. The dynamics of the superimposed RF and DC power sputtering was utilized to improve the microstructure during the thin films growth, resulting in GZO electrode with conductivity greater than 4000 S/cm and transparency greater than 90 %. Similarly, various studies on research and development of Indium Zinc Tin Oxide and Indium Zinc Oxide thin films which can be applied to flexible substrates for next generation solar cells application is presented. In these new TCO systems, understanding the role of crystallographic structure ranging from poly-crystalline to amorphous phase and the influence on the charge transport and optical transparency as well as important surface passivation and surface charge transport properties. Implementation of these electrode based on ZnO on opto-electronics devices such as OLED and OPV is complicated due to chemical interaction over time with the organic layer or with ambient. The problem of inefficient charge collection/injection due to poor understanding of interface and/or bulk property of oxide electrode exists at several oxide-organic interfaces. The surface conductivity, the work function, the formation of dipoles and the band-bending at the interfacial sites can positively or negatively impact the device performance. Detailed characterization of the surface composition both before and after various chemicals treatment of various oxide electrode can therefore provide insight into optimization of device performance. Some of the work related to controlling the interfacial chemistry associated with charge transport of transparent electrodes are discussed. Thus, the role of various pre-treatment on poly-crystalline GZO electrode and amorphous indium zinc oxide (IZO) electrode is compared and contrasted. From the study, we have found that removal of defects and self passivating defects caused by accumulation of hydroxides in the surface of both poly-crystalline GZO and amorphous IZO, are critical for improving the surface conductivity and charge transport. Further insight on how these insulating and self-passivating defects cause charge accumulation and recombination in an device is discussed. With recent rapid development of bulk-heterojunction organic photovoltaics active materials, devices employing ZnO and ZnO based electrode provide air stable and cost-competitive alternatives to traditional inorganic photovoltaics. The organic light emitting diodes (OLEDs) have already been commercialized, thus to follow in the footsteps of this technology, OPV devices need further improvement in power conversion efficiency and stable materials resulting in long device lifetimes. Use of low work function metals such as Ca/Al in standard geometry do provide good electrode for electron collection, but serious problems using low work-function metal electrodes originates from the formation of non-conductive metal oxide due to oxidation resulting in rapid device failure. Hence, using low work-function, air stable, conductive metal oxides such as ZnO as electrons collecting electrode and high work-function, air stable metals such as silver for harvesting holes, has been on the rise. Devices with degenerately doped ZnO functioning as transparent conductive electrode, or as charge selective layer in a polymer/fullerene based heterojunction, present useful device structures for investigating the functional mechanisms within OPV devices and a possible pathway towards improved air-stable high efficiency devices. Furthermore, analysis of the physical properties of the ZnO layers with varying thickness, crystallographic structure, surface chemistry and grain size deposited via various techniques such as atomic layer deposition, sputtering and solution-processed ZnO with their respective OPV device performance is discussed. We find similarity and differences in electrode property for good charge injection in OLEDs and good charge collection in OPV devices very insightful in understanding physics behind device failures and successes. In general, self-passivating surface of amorphous TCOs IZO, ZTO and IZTO forms insulating layer that hinders the charge collection. Similarly, we find modulation of the carrier concentration and the mobility in electron transport layer, namely zinc oxide thin films, very important for optimizing device performance.

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The semiconductor nanowire has been widely studied over the past decade and identified as a promising nanotechnology building block with application in photonics and electronics. The flexible bottom-up approach to nanowire growth allows for straightforward fabrication of complex 1D nanostructures with interesting optical, electrical, and mechanical properties. III-V nanowires in particular are useful because of their direct bandgap, high carrier mobility, and ability to form heterojunctions and have been used to make devices such as light-emitting diodes, lasers, and field-effect transistors. However, crystal defects are widely reported for III-V nanowires when grown in the common out-of-plane <111>B direction. Furthermore, commercialization of nanowires has been limited by the difficulty of assembling nanowires with predetermined position and alignment on a wafer-scale. In this thesis, planar III-V nanowires are introduced as a low-defect and integratable nanotechnology building block grown with metalorganic chemical vapor deposition. Planar GaAs nanowires grown with gold seed particles self-align along the <110> direction on the (001) GaAs substrate. Transmission electron microscopy reveals that planar GaAs nanowires are nearly free of crystal defects and grow laterally and epitaxially on the substrate surface. The nanowire morphology is shown to be primarily controlled through growth temperature and an ideal growth window of 470 +\- 10 °C is identified for planar GaAs nanowires. Extension of the planar growth mode to other materials is demonstrated through growth of planar InAs nanowires. Using a sacrificial layer, the transfer of planar GaAs nanowires onto silicon substrates with control over the alignment and position is presented. A metal-semiconductor field-effect transistor fabricated with a planar GaAs nanowire shows bulk-like low-field electron transport characteristics with high mobility. The aligned planar geometry and excellent material quality of planar III-V nanowires may lead to highly integrated III-V nanophotonics and nanoelectronics.