Verification of analog circuits in power-down mode

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e Computadores

A low-voltage RF-CMOS receiver front-end for a wireless fall detection microsystem

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e de Computadores, pela Universidade Nova de Ciências e Tecnologia

Design of a CMOS amplifier for breast cancer detection

A transimpedance amplifier (TIA) is used, in radiation detectors like the positron emission tomography(PET), to transform the current pulse produced by a photo-sensitive device into an output voltage pulse with a desired amplitude and shape. The TIA must have the lowest noise possible to maximize the output. To achieve a low noise, a circuit topology is proposed where an auxiliary path is added to the feedback TIA input, In this auxiliary path a differential transconductance block is used to transform the node voltage in to a current, this current is then converted to a voltage pulse by a second feedback TIA complementary to the first one, with the same amplitude but 180º out of phase with the first feedback TIA. With this circuit the input signal of the TIA appears differential at the output, this is used to try an reduced the circuit noise. The circuit is tested with two different devices, the Avalanche photodiodes (APD) and the Silicon photomultiplier (SIPMs). From the simulations we find that when using s SIPM with Rx=20kΩ and Cx=50fF the signal to noise ratio is increased from 59 when using only one feedback TIA to 68.3 when we use an auxiliary path in conjunction with the feedback TIA. This values where achieved with a total power consumption of 4.82mv. While the signal to noise ratio in the case of the SIPM is increased with some penalty in power consumption.

A piezoelectric based energy harvester interface for a CMOS wireless sensor IC

In this thesis a piezoelectric energy harvesting system, responsible for regulating the power output of a piezoelectric transducer subjected to ambient vibration, is designed to power an RF receiver with a 6 mW power consump-tion. The electrical characterisation of the chosen piezoelectric transducer is the starting point of the design, which subsequently presents a full-bridge cross-coupled rectifier that rectifies the AC output of the transducer and a low-dropout regulator responsible for delivering a constant voltage system output of 0.6 V, with low voltage ripple, which represents the receiver’s required sup-ply voltage. The circuit is designed using CMOS 130 nm UMC technology, and the system presents an inductorless architecture, with reduced area and cost. The electrical simulations run for the complete circuit lead to the conclusion that the proposed piezoelectric energy harvesting system is a plausible solution to power the RF receiver, provided that the chosen transducer is subjected to moderate levels of vibration.

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Quadrature generators based on ring oscillators and shift registers

Quadrature oscillators are key elements in modern radio frequency (RF) transceivers and very useful nowadays in wireless communications, since they can provide: low quadrature error, low phase-noise, and wide tuning range (useful to cover several bands). RC oscillators can be fully integrated without the need of external components (external high Q-inductors), optimizing area, cost, and power consumption. The conventional structure of ring oscillator offers poor frequency stability and phasenoise, low quality factor (Q), and besides being vulnerable to process, voltage and temperature (PVT) variations, its performance degrades as the frequency of operation increases. This thesis is devoted to quadrature oscillators and presents a detailed comparative study of ring oscillator and shift register (SR) approaches. It is shown that in SRs both phase-noise and phase error are reduced, while ring oscillators have the advantage of occupying less area and less consumption due to the reduced number of components in the circuit. Thus, although ring oscillators are more suitable for biomedical applications, SRs are more appropriate for wireless applications, especially when specification requirements are more stringent and demanding. The first architecture studied consists in a simple CMOS ring oscillator employing an odd number of static single-ended inverters as delay cells. Subsequently, the quadrature 4-stage ring oscillator concept is shown and post-layout simulations are presented. The 3 and 4-phase single-frequency local oscillator (LO) generators employing SRs are presented, the latter with 50% and 25% duty-cycles. The circuits operate at 600 MHz and 900 MHz, and were designed in a 130 nm standard CMOS technology with a voltage supply of 1.2 V.

Switching mode power amplifier for bluetooth applications

Modern fully integrated transceivers architectures, require circuits with low area, low cost, low power, and high efficiency. A key block in modern transceivers is the power amplifier, which is deeply studied in this thesis. First, we study the implementation of a classical Class-A amplifier, describing the basic operation of an RF power amplifier, and analysing the influence of the real models of the reactive components in its operation. Secondly, the Class-E amplifier is deeply studied. The different types of implementations are reviewed and theoretical equations are derived and compared with simulations. There were selected four modes of operation for the Class-E amplifier, in order to perform the implementation of the output stage, and the subsequent comparison of results. This led to the selection of the mode with the best trade-off between efficiency and harmonics distortion, lower power consumption and higher output power. The optimal choice was a parallel circuit containing an inductor with a finite value. To complete the implementation of the PA in switching mode, a driver was implemented. The final block (output stage together with the driver) got 20 % total efficiency (PAE) transmitting 8 dBm output power to a 50 W load with a total harmonic distortion (THD) of 3 % and a total consumption of 28 mW. All implementations are designed using standard 130 nm CMOS technology. The operating frequency is 2.4 GHz and it was considered an 1.2 V DC power supply. The proposed circuit is intended to be used in a Bluetooth transmitter, however, it has a wider range of applications.

Circuito de leitura digital para MEMS capacitivos

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

Caracterització d'oscil·ladors basats en CMOS-M/NEMS i la seva aplicació com a sensors de massa

El present projecte tracta sobre la caracterització d'oscil·ladors basats en ressonadors micro/nanoelectromecànics (M/NEMS) i la seva aplicació com a sensors de massa. Els oscil·ladors utilitzats es basen en un pont i una palanca ressoants M/NEMS, integrats en tecnologia CMOS. En primer lloc s'ha fet una introducció teòrica als conceptes utilitzats per a entendre el funcionament i la caracterització dels dispositius. A continuació s'han realitzat proves per tal de caracteritzar els paràmetres importants per a l'ús dels oscil·ladors com a sensors de massa, com la seva estabilitat en freqüència. Per acabar s'han aplicat aquests sensors en la caracterització i modelització del flux de massa a través d'obertures de dimensions micromètriques.

Design of Novel Frequency Generation Circuit with Application to Ultra-Wideband Distributed Oscillators

Given the urgence of a new paradigm in wireless digital trasmission which should allow for higher bit rate, lower latency and tigher delay constaints, it has been proposed to investigate the fundamental building blocks that at the circuital/device level, will boost the change towards a more efficient network architecture, with high capacity, higher bandwidth and a more satisfactory end user experience. At the core of each transciever, there are inherently analog devices capable of providing the carrier signal, the oscillators. It is strongly believed that many limitations in today's communication protocols, could be relieved by permitting high carrier frequency radio transmission, and having some degree of reconfigurability. This led us to studying distributed oscillator architectures which work in the microwave range and possess wideband tuning capability. As microvave oscillators are essentially nonlinear devices, a full nonlinear analyis, synthesis, and optimization had to be considered for their implementation. Consequently, all the most used nonlinear numerical techniques in commercial EDA software had been reviewed. An application of all the aforementioned techniques has been shown, considering a systems of three coupled oscillator ("triple push" oscillator) in which the stability of the various oscillating modes has been studied. Provided that a certain phase distribution is maintained among the oscillating elements, this topology permits a rise in the output power of the third harmonic; nevertheless due to circuit simmetry, "unwanted" oscillating modes coexist with the intenteded one. Starting with the necessary background on distributed amplification and distributed oscillator theory, the design of a four stage reverse mode distributed voltage controlled oscillator (DVCO) using lumped elments has been presented. All the design steps have been reported and for the first time a method for an optimized design with reduced variations in the output power has been presented. Ongoing work is devoted to model a wideband DVCO and to implement a frequency divider.

Sistema d'adquisició de temperatures de 2 canals via R.F.

Poder mesurar i enregistrar diferents tipus de magnituds com pressió, força, temperatura etc. s’ha convertit en una necessitat per moltes aplicacions actuals. Aquestes magnituds poden tenir procedències molt diverses, tals com l’entorn, o poden ser generades per sistemes mecànics, elèctrics, etc. Per tal de poder adquirir aquestes magnituds, s’utilitzen els sistemes d’adquisició de dades. Aquests sistemes, prenen mostres analògiques del món real, i les transformen en dades digitals que poden ser manipulades per un sistema electrònic. Pràcticament qualsevol magnitud es pot mesurar utilitzant el sensor adient. Una magnitud molt utilitzada en sistemes d’adquisició de dades, és la temperatura. Els sistemes d’adquisició de temperatures estan molt generalitzats, i podem trobar-los com a sistemes, on l’objectiu és mostrar les dades adquirides, o podem trobar-los formant part de sistemes de control, aportant uns inputs necessaris per el seu correcte funcionament, garantir-ne l’estabilitat, seguretat etc. Aquest projecte, promogut per l’empresa Elausa, s’encarregarà d’adquirir, el senyal d’entrada de 2 Termoparells. Aquests mesuraran temperatures de circuits electrònics, que es trobaran dintre la càmera climàtica de Elausa, sotmesos a diferents condicions de temperatura, per tal de rebre l’homologació del circuit. El sistema haurà de poder mostrar les dades adquirides en temps real, i emmagatzemar-les en un PC que estarà ubicat en una oficina, situada a uns 30 m de distància de la sala on es farà el test. El sistema constarà d’un circuit electrònic que adquirirà, i condicionarà el senyal de sortida dels termoparells, per adaptar-lo a la tensió d’entrada d’un convertidor analògic digital, del microcontrolador integrat en aquesta placa. Seguidament aquesta informació, s’enviarà a través d’un mòdul transmissor de radiofreqüència, cap al PC on es visualitzaran les dades adquirides. Els objectius plantejats són els següents: - Dissenyar el circuit electrònic d’adquisició i condicionament del senyal. - Dissenyar, fabricar i muntar el circuit imprès de la placa d’adquisició. - Realitzar el programa de control del microcontrolador. - Realitzar el programa per presentar i desar les dades en un PC. - El sistema ha d’adquirir 2 temperatures, a través de Termoparells amb un rang d’entrada de -40ºC a +240ºC - S’ha de transmetre les dades via R.F. Els resultats del projecte han estat satisfactoris i s’han complert els objectius plantejats.

A reusable smart interface for gas sensor resistance measurement

The advances of the semiconductor industry enable microelectromechanical systems sensors, signal conditioning logic and network access to be integrated into a smart sensor node. In this framework, a mixed-mode interface circuit for monolithically integrated gas sensor arrays was developed with high-level design techniques. This interface system includes analog electronics for inspection of up to four sensor arrays and digital logic for smart control and data communication. Although different design methodologies were used in the conception of the complete circuit, high-level synthesis tools and methodologies were crucial in speeding up the whole design cycle, enhancing reusability for future applications and producing a flexible and robust component.

Error probability in synchronous digital circuits due to power supply noise

This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits.The analysis here considered gives the timing violation error probability as a new design quality factor in front of conventional techniques that assume the full perfection of the circuit. The evaluation of the error bound can be useful for new design paradigms where retry and self-recoveringtechniques are being applied to the design of high performance processors. The method here described allows to evaluate the performance of these techniques by means of calculating the expected error probability in terms of power supply distribution quality.

Disseny d’un circuit analògic reconfigurable

En l’actualitat, l’electrònica digital s’està apoderant de la majoria de camps de desenvolupament, ja que ofereix un gran ventall de possibilitats que permeten fer front a gran quantitat de problemàtiques. Poc a Poc s’ha anat prescindint el màxim possible de l’electrònica analògica i en el seu lloc s’han utilitzat sistemes microprocessats, PLDs o qualsevol altre dispositiu digital, que proporciona beneficis enlluernadors davant la fatigosa tasca d’implementar una solució analògica.Tot i aquesta tendència, és inevitable la utilització de l’electrònica analògica, ja que el mon que ens envolta és l’entorn en el que han de proporcionar servei els diferents dissenys que es realitzen, i aquest entorn no és discret sinó continu. Partint d’aquest punt ben conegut hem de ser conscients que com a mínim els filtres d’entrada i sortida de senyal juntament amb els convertidors D/A A/D mai desapareixeran.Així doncs, aquests circuits analògics, de la mateixa forma que els digitals, han de sercomprovats un cop dissenyats, és en aquest apartat on el nostre projecte desenvoluparà un paper protagonista, ja que serà la eina que ha de permetre obtenir les diferents senyals característiques d’un determinat circuit, per posteriorment realitzar els tests que determinaran si es compleix el rang de correcte funcionament, i en cas de no complir, poder concretar quin paràmetre és el causant del defecte

Sistema d'adquisició de temperatures de 2 canals via R.F.

Poder mesurar i enregistrar diferents tipus de magnituds com pressió, força, temperatura etc. s’ha convertit en una necessitat per moltes aplicacions actuals. Aquestes magnituds poden tenir procedències molt diverses, tals com l’entorn, o poden ser generades per sistemes mecànics, elèctrics, etc. Per tal de poder adquirir aquestes magnituds, s’utilitzen els sistemes d’adquisició de dades. Aquests sistemes, prenen mostres analògiques del món real, i les transformen en dades digitals que poden ser manipulades per un sistema electrònic. Pràcticament qualsevol magnitud es pot mesurar utilitzant el sensor adient. Una magnitud molt utilitzada en sistemes d’adquisició de dades, és la temperatura. Els sistemes d’adquisició de temperatures estan molt generalitzats, i podem trobar-los com a sistemes, on l’objectiu és mostrar les dades adquirides, o podem trobar-los formant part de sistemes de control, aportant uns inputs necessaris per el seu correcte funcionament, garantir-ne l’estabilitat, seguretat etc. Aquest projecte, promogut per l’empresa Elausa, s’encarregarà d’adquirir, el senyal d’entrada de 2 Termoparells. Aquests mesuraran temperatures de circuits electrònics, que es trobaran dintre la càmera climàtica de Elausa, sotmesos a diferents condicions de temperatura, per tal de rebre l’homologació del circuit. El sistema haurà de poder mostrar les dades adquirides en temps real, i emmagatzemar-les en un PC que estarà ubicat en una oficina, situada a uns 30 m de distància de la sala on es farà el test. El sistema constarà d’un circuit electrònic que adquirirà, i condicionarà el senyal de sortida dels termoparells, per adaptar-lo a la tensió d’entrada d’un convertidor analògic digital, del microcontrolador integrat en aquesta placa. Seguidament aquesta informació, s’enviarà a través d’un mòdul transmissor de radiofreqüència, cap al PC on es visualitzaran les dades adquirides. Els objectius plantejats són els següents: - Dissenyar el circuit electrònic d’adquisició i condicionament del senyal. - Dissenyar, fabricar i muntar el circuit imprès de la placa d’adquisició. - Realitzar el programa de control del microcontrolador. - Realitzar el programa per presentar i desar les dades en un PC. - El sistema ha d’adquirir 2 temperatures, a través de Termoparells amb un rang d’entrada de -40ºC a +240ºC - S’ha de transmetre les dades via R.F. Els resultats del projecte han estat satisfactoris i s’han complert els objectius plantejats.