963 resultados para silica-on-silicon
Resumo:
One of the key technologies to evolve in the displays market in recent years is liquid crystal over silicon (LCOS) microdisplays. Traditional LCOS devices and applications such as rear projection televisions, have been based on intensity modulation electro-optical effects, however, recent developments have shown that multi-level phase modulation from these devices is extremely sought after for applications such as holographic projectors, optical correlators and adaptive optics. Here, we propose alternative device geometry based on the flexoelectric-optic effect in a chiral nematic liquid crystal. This device is capable of delivering a multilevel phase shift at response times less than 100 microsec which has been verified by phase shift interferometry using an LCOS test device. The flexoelectric on silicon device, due to its remarkable characteristics, enables the next generation of holographic devices to be realized.
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In this communication, we describe a new method which has enabled the first patterning of human neurons (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/silicon dioxide substrates. We reveal the details of the nanofabrication processes, cell differentiation and culturing protocols necessary to successfully pattern hNT neurons which are each key aspects of this new method. The benefits in patterning human neurons on silicon chip using an accessible cell line and robust patterning technology are of widespread value. Thus, using a combined technology such as this will facilitate the detailed study of the pathological human brain at both the single cell and network level. © 2010 Elsevier B.V.
Resumo:
It is estimated that the adult human brain contains 100 billion neurons with 5-10 times as many astrocytes. Although it has been generally considered that the astrocyte is a simple supportive cell to the neuron, recent research has revealed new functionality of the astrocyte in the form of information transfer to neurons of the brain. In our previous work we developed a protocol to pattern the hNT neuron (derived from the human teratocarcinoma cell line (hNT)) on parylene-C/SiO(2) substrates. In this work, we report how we have managed to pattern hNT astrocytes, on parylene-C/SiO(2) substrates to single cell resolution. This article disseminates the nanofabrication and cell culturing steps necessary for the patterning of such cells. In addition, it reports the necessary strip lengths and strip width dimensions of parylene-C that encourage high degrees of cellular coverage and single cell isolation for this cell type. The significance in patterning the hNT astrocyte on silicon chip is that it will help enable single cell and network studies into the undiscovered functionality of this interesting cell, thus, contributing to closer pathological studies of the human brain.
Resumo:
Seeded zone-melt recrystallization using a dual electron beam system has been performed on silicon-on-insulator material, which was prepared with single-crystal silicon filling of the seed windows by selective epitaxial growth. The crystal quality has been assessed by a variety of microscopic techniques, and it is shown that single-crystal films 0.5-1.0 μm thick over 1.0 μm of isolating oxide may be prepared by this method. These films have considerably less lateral variation in thickness than standard material, in which the windows are not so filled. The filling method is suitable for both single- and multiple-layer silicon-on-insulator, and gives the advantages of excellent layer uniformity after recrystallization and improved planarity of the whole chip structure. Experiments using various amounts of seed window filling have shown that the lateral variations of silicon film thickness seen in unplanarized material are due to stress relief in the cap oxide when the silicon film is molten, rather than the effect previously postulated in which they were assumed to be due to the contraction of silicon on melting.
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We present experimental measurements on Silicon-on-insulator (SOI) photonic crystal slabs with an active layer containing Er3+ ions-doped Silicon nanoclusters (Si-nc), showing strong enhancement of 1.54 μm emission at room temperature. We provide a systematic theoretical analysis to interpret such results. In order to get further insight, we discuss experimental data on the guided luminescence of unpatterned SOI planar slot waveguides, which show enhanced light emission in transverse-magnetic (TM) modes over transverse-electric (TE) ones. ©2007 IEEE.
Resumo:
This paper reports on the fabrication and characterization of high-resolution strain sensors for steel based on Silicon On Insulator flexural resonators manufactured with chip-level LPCVD vacuum packaging. The sensors present high sensitivity (120 Hz/μ), very high resolution (4 n), low drift, and near-perfect reversibility in bending tests performed in both tensile and compressive strain regimes. © 2013 IEEE.
Resumo:
Based on silicon-on-insulator (SOI) technology, a Mach-Zehnder interferometer (MZI) is fabricated, in which two directional couplers serve as power splitter and combiner. The free carrier plasma dispersion effect of Si is adopted to achieve the phase modulation and the consequent intensity modulation of optical fields. The device presents an insertion loss of 2.61 dB and an extinction ratio of 19.6 dB. The rise time and fall time are 676 ns and 552 ns, respectively. Detailed analysis and explanation of the performance behaviors are also presented. (c) 2007 Society of Photo-Optical Instrumentation Engineers.
Resumo:
The influences of the cavity on the low-temperature photoluminescence of Si0.59Ge0.41/Si multiquantum wells grown on silicon-on-insulator substrates are discussed. The positions of the modulated photoluminescence (PL) peaks not only relate to the nature of SiGe/Si multiquantum wells, but also relate to the characteristic of the cavity. With increasing temperature, a redshift of the modulated PL peak originating from the thermo-optical effect of the cavity is observed.
Resumo:
We demonstrate a type of 2 x 2 multimode interference 3 dB coupler based on silicon-on-insulator. The fabrication tolerance was investigated by the effective index method and the guide mode method. The devices with different lengths were fabricated and near-held output images were obtained. Tolerances to width, length and etch depth are 2, 200 and 2 mum, respectively. The devices show a uniform power distribution.
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One group of SiC films are grown on silicon-on-insulator (SOI) substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over-layer thickness decreases for the SOI substrates. Strain relaxation in the SiC epilayer is explained by force balance approach and near coincidence lattice model.
Resumo:
Integrated multimode interference (MMI) coupler based on silicon-on-insulator(SOI) has been becoming a kind of more and more attractive device in optical systems. SiO2thin cladding layers (<1.0 μm) can be usedin SOI waveguide due to the large index step be-tween Si and SiO2, making them compatible with VLSI technology. The design and fabrica-tion of MMI optical couplers and optical switches in SOI technology are presented in thepa-per. We demonstrated the switching time of 2 × 2 MMI-MZI thermo-optical switch is less than 20 μs:
Resumo:
Integrated multimode interference coupler based on silicon-on-insulator has been become a kind of more and more attractive device in optical systems. Thin cladding layers (<1.0mum) can be used in SOI waveguide due to the large index step between Si and SiO2, making them compatible with the VLSI technology. Here we demonstrate the design and fabrication of multimode interference (MMI) optical couplers and optical switches in SOI technology.
Resumo:
The stress distribution in silica optical waveguides on silicon is calculated by using finite element method (FEM). The waveguides are mainly subjected to compressive stress along the x direction and the z direction, and it is accumulated near the interfaces between the core and cladding layers. The shift of central wavelength of silica arrayed waveguide grating (AWG) on silicon-substrate with the designed wavelength and the polarization dependence are caused by the stress in the silica waveguides.
Resumo:
Desorption/ionization on silicon mass spectrometry (DIOS-MS) is a matrix-free technique that allows for the direct desorption/ionization of low-molecular-weight compounds with little or no fragmentation of analytes. This technique has a relatively high tolerance for contaminants commonly found in biological samples. DIOS-MS has been applied to determine the activity of immobilized enzymes on the porous silicon surface. Enzyme activities were also monitored with the addition of a competitive inhibitor in the substrate solution. It is demonstrated that this method can be applied to the screening of enzyme inhibitors. Furthermore, a method for peptide mapping analysis by in situ digestion of proteins on the porous silicon surface modified by trypsin, combined with matrix-assisted laser desorption/ionization-time of flight-MS has been developed.
Resumo:
Atomic force microscope (AFM)-based scanned probe oxidation (SPO) nanolithography has been carried out on an octadecyl-terminated Si(111) surface to create dot-array patterns under ambient conditions in contact mode. The kinetics investigations indicate that this SPO process involves three stages. Within the steadily growing stage, the height of oxide dots increases logarithmically with pulse duration and linearly with pulse voltage. The lateral size of oxide dots tends to vary in a similar way. Our experiments show that a direct-log kinetic model is more applicable than a power-of-time law model for the SPO process on an alkylated silicon in demonstrating the dependence of oxide thickness on voltage exposure time within a relatively wide range. In contrast with the SPO on the octodecysilated SiO2/silicon surface, this process can be realized by a lower voltage with a shorter exposure time, which will be of great benefit to the fabrication of integrated nanometer-sized electronic devices on silicon-based substrates. This study demonstrates that the alkylated silicon is a new promising substrate material for silicon-based nanolithography.